Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Xu et al., US PGPub 2017/0262172, hereafter “Xu.”
With respect to claim 1, Xu teaches a Mixture-of-Experts model based collective communication method, applied to a communication receiving end, the method comprising:
receiving a data write-in instruction, wherein the data write-in instruction comprises to-be-processed data and first address information (par. 56-58, the access request, which is for storing a target file in the NVM and thus corresponding to a data write-in instruction, the target file corresponding to the to-be-processed data, and the start address corresponding to the first address information);
accessing a virtual expert address in a pre-created virtual address space according to the first address information (pars. 61, 64, and 67 and fig. 2 steps 210, 215, and 220, the start address of the first access request is converted into an access address of the first virtual space, the access address corresponding to the virtual expert address);
applying for a corresponding actual physical space for the virtual expert address based on a size of the to-be-processed data (par. 68 and fig. 2, step 225, the physical address of the first target file to be stored the memory is obtained. This process is further described in fig. 6 and pars. 71-79, where the physical space is chosen based on size required); and
writing the to-be-processed data into the actual physical space (par. 75 and fig. 6, step 615, the to-be-written data is written into the allocated physical page).
With respect to claim 2, Xu teaches the method according to claim 1, wherein the virtual address space comprises a virtual numbered address space and a virtual expert address space (par. 63, the second and first virtual address spaces, respectively); and accessing the virtual expert address in the pre-created virtual address space according to the first address information comprises:
accessing a virtual numbered address in a pre-created virtual numbered address space according to the first address information (par. 67, accessing the address in the first virtual space, according to the start address of the first access request); and
accessing, through mapping between the virtual numbered address space and the virtual expert address space, the virtual expert address in the virtual expert address space (par. 67 and fig. 2, step 220, the access address of the first virtual space).
With respect to claim 3, Xu teaches the method according to claim 2, wherein the data write-in instruction further comprises first routing information (par. 56, the file identifier), and accessing, through mapping between the virtual numbered address space and the virtual expert address space, the virtual expert address in the virtual expert address space comprises:
accessing, in response to the virtual numbered address space corresponding to at least two virtual expert address spaces, the virtual expert address in the virtual expert address spaces through mapping between the virtual numbered address space and the virtual expert address spaces according to the first routing information (pars. 57-58, the first file identifier is used to obtain an index node, which includes information about the first virtual space used to manage the target file).
With respect to claim 4, Xu teaches the method according to claim 1, wherein applying for the corresponding actual physical space for the virtual expert address based on the size of the to-be-processed data comprises:
triggering a page fault interrupt in response to the to-be-processed data being written into the virtual expert address (par. 73, the page fault to allocate a physical page in the NVM);
allocating an actual physical space to the virtual expert address based on the page fault interrupt, and writing a mapping relationship between the virtual expert address and the actual physical space into a page table memory (par. 73 and fig. 6, step 610); and
obtaining the actual physical space corresponding to the virtual expert address based on the page table memory (pars. 72-74 and fig. 6, steps 605 and 610).
With respect to claim 5, Xu teaches the method according to claim 4, wherein allocating the actual physical space to the virtual expert address comprises:
allocating the actual physical space to the virtual expert address through a memory processing module in a processor (par. 73, allocating the physical page by the MMU in the CPU 100),
wherein the memory processing module is a page manager core or a hardware page management engine (par. 38, the MMU 104).
With respect to claim 6, Xu teaches the method according to claim 1, further comprising:
receiving a data read instruction, the data read instruction comprising second address information and weight allocation information (par. 70, the access request is a data read request. Par. 63 describes the preset mapping offset, which corresponds to the weight allocation information);
reading the to-be-processed data from an actual physical address of the virtual expert address in the virtual address space according to the second address information (par. 70, performing the read operation on the target file at the physical address); and
calculating the to-be-processed data based on the weight allocation information to obtain response data (par. 63, calculating the start address based on the preset mapping offset).
With respect to claim 7, Xu teaches the method according to claim 6, wherein the data read instruction further comprises second routing information (par. 56, the file identifier), the virtual address space comprises a virtual numbered address space and a virtual expert address space, and reading the to-be-processed data from the actual physical address of the virtual expert address in the virtual address space according to the second address information comprises:
determining a virtual numbered address in the virtual numbered address space according to the second address information (pars. 57-57, obtaining the address using the file identifier which locates the address of the file);
determining, through mapping between the virtual numbered address space and the virtual expert address space, the virtual expert address from the virtual expert address space according to the second routing information (pars. 57-58, the first file identifier is used to obtain an index node, which includes information about the first virtual space used to manage the target file); and
reading the to-be-processed data from the actual physical address of the virtual expert address (par. 70).
With respect to claim 8, Xu teaches the method according to claim 1, wherein the virtual address space is created based on a total size of all to-be-processed data in a collective communication (par. 68, the size of the virtual space is a virtual size of the target file).
With respect to claim 9, Xu teaches a Mixture-of-Experts model based collective communication system, comprising a plurality of processors and a switch, wherein:
the switch is configured to: receive an instruction, the instruction comprising to-be-processed data, address information and data routing information (par. 56 and fig. 2, step 201, receiving the first access request, the access request including a start address, corresponding to address information, and a file identifier, corresponding to data routing information); and multicast the instruction to a corresponding processor based on the data routing information (par. 56, the access request is sent to the CPU 100); and
the processor is configured to: access a virtual expert address in a pre-created virtual address space according to the address information, in response to the received instruction being a data write-in instruction (pars. 61, 64, and 67 and fig. 2 steps 210, 215, and 220, the start address of the first access request is converted into an access address of the first virtual space, the access address corresponding to the virtual expert address); apply for a corresponding actual physical space for the virtual expert address based on a size of the to-be-processed data (par. 68 and fig. 2, step 225, the physical address of the first target file to be stored the memory is obtained. This process is further described in fig. 6 and pars. 71-79, where the physical space is chosen based on size required); and write the to-be-processed data into the actual physical space (par. 75 and fig. 6, step 615, the to-be-written data is written into the allocated physical page).
With respect to claim 10, Xu teaches the communication system according to claim 9, wherein the virtual address space comprises a virtual numbered address space and a virtual expert address space, and the processor is specifically configured to:
access a virtual numbered address in a pre-created virtual numbered address space based on the address information, in response to the received instruction being the data write-in instruction (par. 67, accessing the address in the first virtual space, according to the start address of the first access request. Par. 70 discloses that the instruction is a write request); and access, through mapping between the virtual numbered address space and the virtual expert address space, the virtual expert address in the virtual expert address space (par. 67 and fig. 2, step 220, the access address of the first virtual space).
With respect to claim 11, Xu teaches the communication system according to claim 10, wherein the routing information comprises an expert bitmap (par. 58, index node of the first target file) and a number bitmap (par. 58, first file identifier),
the switch is specifically configured to: multicast the instruction to the corresponding processor based on the number bitmap (par. 58, the CPU 100 corresponding to the corresponding processor, which receives the access request with file identifier), and
the processor is specifically configured to: access the virtual numbered address in the pre-created virtual numbered address space based on the address information, in response to the received instruction being the data write-in instruction and in response to the virtual numbered address space corresponding to at least two virtual expert address spaces (pars. 61, 64, and 67 and fig. 2 steps 210, 215, and 220, the start address of the first access request is converted into an access address of the first virtual space, the access address corresponding to the virtual expert address. Par. 49 discloses that each process has its own dedicated virtual address space); and accessing the virtual expert address in the virtual expert address spaces through mapping between the virtual numbered address space and the virtual expert address spaces according to the expert bitmap (pars. 56-58, accessing the first virtual space using the index node, corresponding to the expert bitmap).
With respect to claim 12, Xu teaches the communication system according to claim 9, wherein the processor comprises a communication interface, a memory management unit and a memory processing module,
the communication interface is configured to: access the memory management unit based on an access bus of the virtual expert address (par. 68, the MMU is accessed based on the file management register, corresponding to the access bus),
the memory management unit is configured to: trigger a page fault interrupt in response to the to-be-processed data being written into the virtual expert address, and send the interrupt to the memory processing module (par. 73, the page fault to allocate a physical page in the NVM), and
the memory processing module is configured to: allocate an actual physical space to the virtual expert address, write a mapping relationship between the virtual expert address and the actual physical space into a page table memory (par. 73 and fig. 6, step 610), and obtain the actual physical space corresponding to the virtual expert address based on the page table memory (pars. 72-74 and fig. 6, steps 605 and 610).
With respect to claim 13, Xu teaches the communication system according to claim 9, wherein the processor is further configured to: read the to-be-processed data from an actual physical address of the virtual expert address in the virtual address space according to the address information, in response to the instruction being a data read instruction, wherein the data read instruction further comprises weight allocation information (ar. 70, the access request is a data read request. Par. 63 describes the preset mapping offset, which corresponds to the weight allocation information); and calculate the to-be-processed data based on the weight allocation information to obtain response data (par. 63, calculating the start address based on the preset mapping offset), and
the switch is further configured to: perform a Reduce calculation on the response data, and feed back a Reduce calculation result to an instruction sending end (par. 67, converting the start address into an access address).
With respect to claim 14, Xu teaches an electronic device, comprising:
at least one processor (par. 38, CPU 100); and
a memory (par. 38, DRAM 300), in communication with the at least one processor, wherein the memory stores instructions executable by the at least one processor (the CPU execution 102 is an execution component of the CPU and is configured to execute a stored program), and the instructions when executed by the at least one processor, cause the at least one processor to perform operations, the operations comprising:
receiving a data write-in instruction, wherein the data write-in instruction comprises to-be-processed data and first address information (par. 56-58, the access request, which is for storing a target file in the NVM and thus corresponding to a data write-in instruction, the target file corresponding to the to-be-processed data, and the start address corresponding to the first address information);
accessing a virtual expert address in a pre-created virtual address space according to the first address information (pars. 61, 64, and 67 and fig. 2 steps 210, 215, and 220, the start address of the first access request is converted into an access address of the first virtual space, the access address corresponding to the virtual expert address);
applying for a corresponding actual physical space for the virtual expert address based on a size of the to-be-processed data (par. 68 and fig. 2, step 225, the physical address of the first target file to be stored the memory is obtained. This process is further described in fig. 6 and pars. 71-79, where the physical space is chosen based on size required); and
writing the to-be-processed data into the actual physical space (par. 75 and fig. 6, step 615, the to-be-written data is written into the allocated physical page).
Claims 15-19 are electronic device claims that depend from claim 14, that correspond to dependent claims 2-6, and are rejected using similar logic.
Claim 20 is a non-transitory computer readable storage medium corresponding to claim 1, and is rejected using similar logic.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wong et al., US Patent 12,547,547 teaches a multi-address space collectives engine. Gelado Fernandez, US Patent 12,602,332 teaches a distributed page table, memory map and routing table for multiple node computing systems.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RYAN DARE whose telephone number is (571)272-4069. The examiner can normally be reached M-F 9:00-5:00.
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/RYAN DARE/Examiner, Art Unit 2132
/HOSAIN T ALAM/Supervisory Patent Examiner, Art Unit 2132
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