DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Applicant’s claim for the benefit of a provisional application 63/665,999 filed on 06/28/2024 is acknowledged.
Claim Interpretation
Claim 23, a method claim, recites the limitation “in response to the type of the data being associated with the partition”. Since this is contingent limitation, the BRI of the claim only requires the steps to be performed when the contingent condition is met. The Office suggests positively reciting the limitations.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 10-11 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as failing to set forth the subject matter which the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the applicant regards as the invention.
Claim 10 recite the limitation “refrain from storing the plurality of pointers to non-
volatile memory within the memory system.”.
Claim 11 recites the limitation “refrain, after a power event for the memory system, from
recovering the plurality of pointers in accordance with the plurality of pointers being associated with the partition.”.
A person of ordinary skill in the art would not have known the meets and bounds of
“refrain from storing the plurality of pointers to non-volatile memory within the memory system” and “refrain from recovering the plurality of pointers in accordance with the plurality of pointers being associated with the partition.”
Specifically, one of ordinary skill would not have known how these limitations are manifested in the technology.
For claim 10, one would not have known “refrain from storing the plurality of pointers to non-volatile memory within the memory system” means prevent/stop/forbid storing of the pointers to non-volatile memory? And how the limitation is manifested in the technology. For the purpose of examination, the Office interpret the limitation as storing the plurality of pointers to volatile memory, instead of non-volatile memory, within the memory system.
For claim 11, one would not have known what does it mean to “refrain, after a power event for the memory system, from recovering the plurality of pointers in accordance with the plurality of pointers being associated with the partition”. What the recovering the plurality of pointers entails? For the purpose of examination, the Office interpret the limitation as the pointers are not recovered/rebuild/restored after a power event for the memory system.
Correction is required to show these limitations are manifested in the technology such that one of ordinary skill would have known the positive manifestation.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-8, 10-21, 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lim (US 20120151127), in view of Palmer (US 20240061767).
Regarding Claim 1, Lim teaches
An apparatus for memory operations, comprising: processing circuitry associated with one or more memory devices and configured to cause the apparatus to: (Lim FIG. 1: host 200 CPU 210, Main memory 220, Storage Device 300, Controller 310)
receive a command to write data to a memory system, wherein the data is associated with one or more logical addresses; (Lim [0005] a swap operation may be performed if an unused region of a main memory is not enough to load the new page. The swap operation may store a loaded page from the main memory to a storage device to obtain storage space of the main memory for the new page. [0012] to determine whether the received data are the swap data, a logical address of the received data may be translated into a physical address, and whether the physical address exists in the swap address table may be determined.)
detect a type of the data in accordance with whether the one or more logical addresses are within a range of logical addresses associated with a partition of one or more partitions of the memory system, the one or more partitions of the memory system for storing data associated with one or more volatile memory operations; (Lim [0005] a swap operation may be performed if an unused region of a main memory is not enough to load the new page. [0008] an address of a swap partition may be read from a partition table stored in the nonvolatile memory device [0012] to determine whether the received data are the swap data, a logical address of the received data may be translated into a physical address, and whether the physical address exists in the swap address table may be determined.) (i.e., the swap data is a type of data, swap partitions are for storing swap data associated with main memory operations)
[write swap data to swap partition], in response to the type of the data being associated with the partition, (Lim [0083] If the received data are the swap data (S420: YES), the storage device 300 may store the received data in the volatile memory device 320 (S430).)
and update one or more pointers of a plurality of pointers in response to writing the data, wherein each sub-partition of the plurality of sub-partitions is associated with a corresponding pointer of the plurality of pointers. (Lim [0008] an address of a swap partition may be read from a partition table stored in the nonvolatile memory device, and the swap address table may be generated based on the read address of the swap partition.) (i.e., entries in swap address table are pointers)
Lim does not teach determine, in response to the type of the data being associated with the partition, whether the one or more logical addresses align with one or more of a plurality of sub-partitions of the partition; write the data to the one or more logical addresses in accordance with whether the one or more logical addresses align with one or more sub-partitions of the plurality of sub-partitions; and update one or more pointers of a plurality of pointers in response to writing the data,
However, Palmer teaches
determine whether the one or more logical addresses align with one or more of a plurality of sub-partitions of the partition; (Palmer [0049] For a write command designating a partition, a starting address (e.g., starting LBA), an address length (“length”) and data to be written, the memory sub-system 110 can determine whether head data of the data to be written and tail data of the data to be written is aligned to the granularity configuration of the partition.)
write the data to the one or more logical addresses in accordance with whether the one or more logical addresses align with one or more sub-partitions of the plurality of sub-partitions; (Palmer [0050] If the head data and the tail data are both aligned, then the memory sub-system controller can write the data directly to the memory device. Otherwise, if the head data and/or the tail data is unaligned with respect to the logical address granularity of the partition, then the memory sub-system 110 can perform read/modify/write (RMW) updates.)
and update one or more pointers of a plurality of pointers in response to writing the data, (Palmer [0050] The memory sub-system 110 can update the logical to physical mapping table for the associated partition, and then return a write command status to the host system 120.) (i.e., the entries in address mapping table are the pointers)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 2, Lim and Palmer teach
Lim does not teach but Palmer teaches write the data directly to the one or more logical addresses in the one or more sub-partitions of the plurality of sub-partitions in response to determining that the one or more logical addresses align with the one or more sub-partitions. (Palmer [0001] Embodiments of the disclosure relate generally to memory sub-systems, and more specifically, relate to implementing logical address granularity configurations for logical address space partitions. [0050] If the head data and the tail data are both aligned, then the memory sub-system controller can write the data directly to the memory device.)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 3, Lim and Palmer teach
Lim does not teach but Palmer teaches read second data from a sub-partition that comprises at least a portion of the one or more logical addresses in response to determining that the one or more logical addresses do not align with the one or more sub-partitions of the plurality of sub-partitions; update the second data to include at least a portion of the data associated with the portion of the one or more logical addresses; and write the second data to the sub-partition. (Palmer [0050] if the head data and/or the tail data is unaligned with respect to the logical address granularity of the partition, then the memory sub-system 110 can perform read/modify/write (RMW) updates.)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 4, Lim and Palmer teach
Lim does not teach but Palmer teaches store, in one or more memory locations accessible to a host system, one or more descriptors associated with the partition of the memory system, wherein the one or more descriptors indicate one or more of a capability of the memory system to support the partition and the plurality of pointers, a threshold size of the partition, a size for each of the plurality of sub-partitions, a logical unit of the memory system associated with the partition, a beginning logical address of the partition, an ending logical address of the partition, or any combination thereof. (Palmer [0020] a host system can be operatively coupled to the memory sub-system [0021] the memory sub-system can receive, from the host system, a request for usable capacity information for a logical address space. The memory sub-system can provide the usable capacity information in response to receiving the request for the usable capacity information. The memory sub-system can receive, from the host system, a request for supported logical address granularity information from configuration descriptors. [0042] the usable capacity information and the supported logical address granularity information can include device descriptor data and partition descriptor data. The partition descriptor data can include a partition descriptor field indicating a logical address granularity configuration for a partition.)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 5, Lim and Palmer teach
Lim does not teach but Palmer teaches receive, from the host system, one or more commands to update the logical unit of the memory system associated with the partition, update the beginning logical address of the partition, update the ending logical address of the partition, or any combination thereof. (Palmer [0020] a host system can be operatively coupled to the memory sub-system. Embodiments described herein provide for a mechanism that can enable the host system to provide information notifying the memory sub-system that a given partition of the logical address space will have primarily a write workload of a given size (e.g., 4 KB, 8 KB, 16 KB). The memory sub-system can use the information provided by the host system to map, for a partition, logical addresses to physical addresses using a coarse L2P mapping granularity (e.g., more than one logical address per pointer) that can be as large as the write workload. The information can be defined in view of an intended use of the partition to determine when it is appropriate to use a coarse L2P mapping granularity.)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 6, Lim and Palmer teach
Lim teaches receive a read command to read second data, (Lim [0015] a read request for the swap data may be received from the host)
wherein the second data is associated with one or more second logical addresses of the partition; (Lim [0007] a swap address table containing address information about swap data is generated)
and read the second data using the plurality of pointers, an offset from a beginning logical address of a sub-partition, or both. (Lim [0060] The volatile memory device 320 may store an address translation table to translate a logical address received from the host 200 into a physical address of the nonvolatile memory device 330.)
Regarding Claim 7, Lim and Palmer teach
Lim teaches store a first subset of pointers of the plurality of pointers in random access memory for a memory controller within the memory system. (Lim FIG. 6 controller 310, volatile memory 320a, swap address table 321 [0005] When loading a new page in a typical computing system, a swap operation may be performed if an unused region of a main memory is not enough to load the new page. [0007] a swap address table containing address information about swap data is generated. The data are received from a host.) (i.e., store address information about swap data to swap address table when a swap operation is performed, swap address table is in volatile memory which is implemented by random access memory, entries in swap address table is first subset of pointers)
Regarding Claim 8, Lim and Palmer teach
Lim teaches store a second subset of pointers of the plurality of pointers in non-volatile memory of the memory system after the first subset of pointers of the plurality of pointers have been stored in the random access memory for the memory controller. (Lim FIG. 6 controller 310, volatile memory 320a, swap address table 321 [0005] When loading a new page in a typical computing system, a swap operation may be performed if an unused region of a main memory is not enough to load the new page. [0007] a swap address table containing address information about swap data is generated. The data are received from a host.) (i.e., when loading more new pages to main memory which has no enough unused space, swap operation is performed and another set of address information about swap data stored in swap address table which is in volatile memory that is implemented by random access memory, more entries in swap address table is second subset of pointers)
Regarding Claim 10, Lim and Palmer teach
Lim does not teach but Palmer teaches refrain from storing the plurality of pointers to non-volatile memory within the memory system. (Palmer [0017] The controller can store the L2P mapping data structure using volatile memory (e.g., DRAM or SRAM).) (i.e. entries in mapping table are the pointers)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 11, Lim and Palmer teach
Lim does not teach but Palmer teaches refrain, after a power event for the memory system, from recovering the plurality of pointers in accordance with the plurality of pointers being associated with the partition. (Palmer [0017] The controller can store the L2P mapping data structure using volatile memory (e.g., DRAM or SRAM).) (i.e. entries in mapping table are the pointers. Since the pointers are only stored in volatile memory, the pointers are lost with power loss and cannot be recovered after a power event.)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 12, Lim and Palmer teach
Lim does not teach but Palmer teaches wherein, to determine whether the one or more logical addresses align with the one or more sub-partitions of the plurality of sub- partitions, the processing circuitry is configured to cause the apparatus to: determine whether a first logical address of the one or more logical addresses is a first logical address of a first sub-partition, whether a size of the data is a multiple of a size that is common to each of the plurality of sub-partitions, or both. (Palmer [0049] For a write command designating a partition, a starting address (e.g., starting LBA), an address length (“length”) and data to be written, the memory sub-system 110 can determine whether head data of the data to be written and tail data of the data to be written is aligned to the granularity configuration of the partition.)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 13, Lim and Palmer teach
The apparatus of claim 1, wherein the partition comprises a virtual random access space for a host system associated with the memory system. (Lim [0073] The virtual address may be translated into a physical address (or, a real address) that is an address for the main memory 220 [0057] the main memory 220 may be implemented by a dynamic random access memory (DRAM))
Regarding Claim 14, Lim teaches
receive a command to write data to a memory system, wherein the data is associated with one or more logical addresses; (Lim FIG. 1: host 200 CPU 210, Main memory 220, Storage Device 300, Controller 310 [0005] a swap operation may be performed if an unused region of a main memory is not enough to load the new page. The swap operation may store a loaded page from the main memory to a storage device to obtain storage space of the main memory for the new page. [0012] to determine whether the received data are the swap data, a logical address of the received data may be translated into a physical address, and whether the physical address exists in the swap address table may be determined.)
detect a type of the data in accordance with whether the one or more logical addresses are within a range of logical addresses associated with a partition of one or more partitions of the memory system, the one or more partitions of the memory system for storing data associated with one or more volatile memory operations; (Lim [0005] a swap operation may be performed if an unused region of a main memory is not enough to load the new page. [0008] an address of a swap partition may be read from a partition table stored in the nonvolatile memory device [0012] to determine whether the received data are the swap data, a logical address of the received data may be translated into a physical address, and whether the physical address exists in the swap address table may be determined.) (i.e., the swap data is a type of data, swap partitions are for storing swap data associated with main memory operations)
[write swap data to swap partition], in response to the type of the data being associated with the partition, (Lim [0083] If the received data are the swap data (S420: YES), the storage device 300 may store the received data in the volatile memory device 320 (S430).)
and update one or more pointers of a plurality of pointers in response to writing the data, wherein each sub-partition of the plurality of sub-partitions is associated with a corresponding pointer of the plurality of pointers. (Lim [0008] an address of a swap partition may be read from a partition table stored in the nonvolatile memory device, and the swap address table may be generated based on the read address of the swap partition.) (i.e., entries in swap address table are pointers)
Lim does not teach A non-transitory computer-readable medium storing code for memory operations, the code comprising instructions executable by one or more processors to: determine, in response to the type of the data being associated with the partition, whether the one or more logical addresses align with one or more of a plurality of sub-partitions of the partition; write the data to the one or more logical addresses in accordance with whether the one or more logical addresses align with one or more sub-partitions of the plurality of sub-partitions; and update one or more pointers of a plurality of pointers in response to writing the data,
However, Palmer teaches
A non-transitory computer-readable medium storing code for memory operations, the code comprising instructions executable by one or more processors to: (Palmer[0077] The data storage system 518 can include a machine-readable storage medium 524 (also known as a computer-readable medium) on which is stored one or more sets of instructions 526 or software embodying any one or more of the methodologies or functions described herein.)
determine whether the one or more logical addresses align with one or more of a plurality of sub-partitions of the partition; (Palmer [0049] For a write command designating a partition, a starting address (e.g., starting LBA), an address length (“length”) and data to be written, the memory sub-system 110 can determine whether head data of the data to be written and tail data of the data to be written is aligned to the granularity configuration of the partition.)
write the data to the one or more logical addresses in accordance with whether the one or more logical addresses align with one or more sub-partitions of the plurality of sub-partitions; (Palmer [0050] If the head data and the tail data are both aligned, then the memory sub-system controller can write the data directly to the memory device. Otherwise, if the head data and/or the tail data is unaligned with respect to the logical address granularity of the partition, then the memory sub-system 110 can perform read/modify/write (RMW) updates.)
and update one or more pointers of a plurality of pointers in response to writing the data, (Palmer [0050] The memory sub-system 110 can update the logical to physical mapping table for the associated partition, and then return a write command status to the host system 120.) (i.e., the entries in address mapping table are the pointers)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 15, Lim and Palmer teach
Lim does not teach but Palmer teaches write the data directly to the one or more logical addresses in the one or more sub-partitions of the plurality of sub-partitions in response to determining that the one or more logical addresses align with the one or more sub-partitions. (Palmer [0001] Embodiments of the disclosure relate generally to memory sub-systems, and more specifically, relate to implementing logical address granularity configurations for logical address space partitions. [0050] If the head data and the tail data are both aligned, then the memory sub-system controller can write the data directly to the memory device.)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 16, Lim and Palmer teach
Lim does not teach but Palmer teaches read second data from a sub-partition that comprises at least a portion of the one or more logical addresses in response to determining that the one or more logical addresses do not align with the one or more sub-partitions of the plurality of sub-partitions; update the second data to include at least a portion of the data associated with the portion of the one or more logical addresses; and write the second data to the sub-partition. (Palmer [0050] if the head data and/or the tail data is unaligned with respect to the logical address granularity of the partition, then the memory sub-system 110 can perform read/modify/write (RMW) updates.)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 17, Lim and Palmer teach
Lim does not teach but Palmer teaches store, in one or more memory locations accessible to a host system, one or more descriptors associated with the partition of the memory system, wherein the one or more descriptors indicate one or more of a capability of the memory system to support the partition and the plurality of pointers, a threshold size of the partition, a size for each of the plurality of sub-partitions, a logical unit of the memory system associated with the partition, a beginning logical address of the partition, an ending logical address of the partition, or any combination thereof. (Palmer [0020] a host system can be operatively coupled to the memory sub-system [0021] the memory sub-system can receive, from the host system, a request for usable capacity information for a logical address space. The memory sub-system can provide the usable capacity information in response to receiving the request for the usable capacity information. The memory sub-system can receive, from the host system, a request for supported logical address granularity information from configuration descriptors. [0042] the usable capacity information and the supported logical address granularity information can include device descriptor data and partition descriptor data. The partition descriptor data can include a partition descriptor field indicating a logical address granularity configuration for a partition.)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 18, Lim and Palmer teach
Lim does not teach but Palmer teaches receive, from the host system, one or more commands to update the logical unit of the memory system associated with the partition, update the beginning logical address of the partition, update the ending logical address of the partition, or any combination thereof. (Palmer [0020] a host system can be operatively coupled to the memory sub-system. Embodiments described herein provide for a mechanism that can enable the host system to provide information notifying the memory sub-system that a given partition of the logical address space will have primarily a write workload of a given size (e.g., 4 KB, 8 KB, 16 KB). The memory sub-system can use the information provided by the host system to map, for a partition, logical addresses to physical addresses using a coarse L2P mapping granularity (e.g., more than one logical address per pointer) that can be as large as the write workload. The information can be defined in view of an intended use of the partition to determine when it is appropriate to use a coarse L2P mapping granularity.)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Regarding Claim 19, Lim and Palmer teach
Lim teaches receive a read command to read second data, (Lim [0015] a read request for the swap data may be received from the host)
wherein the second data is associated with one or more second logical addresses of the partition; (Lim [0007] a swap address table containing address information about swap data is generated)
and read the second data using the plurality of pointers, an offset from a beginning logical address of a sub-partition, or both. (Lim [0060] The volatile memory device 320 may store an address translation table to translate a logical address received from the host 200 into a physical address of the nonvolatile memory device 330.)
Regarding Claim 20, Lim and Palmer teach
Lim teaches store a first subset of pointers of the plurality of pointers in random access memory for a memory controller within the memory system. (Lim FIG. 6 controller 310, volatile memory 320a, swap address table 321 [0005] When loading a new page in a typical computing system, a swap operation may be performed if an unused region of a main memory is not enough to load the new page. [0007] a swap address table containing address information about swap data is generated. The data are received from a host.) (i.e., store address information about swap data to swap address table when a swap operation is performed, swap address table is in volatile memory which is implemented by random access memory, entries in swap address table is first subset of pointers)
Regarding Claim21, Lim and Palmer teach
Lim teaches store a second subset of pointers of the plurality of pointers in non-volatile memory of the memory system after the first subset of pointers of the plurality of pointers have been stored in the random access memory for the memory controller. (Lim FIG. 6 controller 310, volatile memory 320a, swap address table 321 [0005] When loading a new page in a typical computing system, a swap operation may be performed if an unused region of a main memory is not enough to load the new page. [0007] a swap address table containing address information about swap data is generated. The data are received from a host.) (i.e., when loading more new pages to main memory which has no enough unused space, swap operation is performed and another set of address information about swap data stored in swap address table which is in volatile memory that is implemented by random access memory, more entries in swap address table is second subset of pointers)
Regarding Claim 23, Lim teaches
A method for memory operations, comprising: (Lim FIG. 1: host 200 CPU 210, Main memory 220, Storage Device 300, Controller 310 [0007] a method of storing data in a storage device including a volatile memory device and a nonvolatile memory device, a swap address table containing address information about swap data is generated.)
receiving a command to write data to a memory system, wherein the data is associated with one or more logical addresses; (Lim [0005] a swap operation may be performed if an unused region of a main memory is not enough to load the new page. The swap operation may store a loaded page from the main memory to a storage device to obtain storage space of the main memory for the new page. [0012] to determine whether the received data are the swap data, a logical address of the received data may be translated into a physical address, and whether the physical address exists in the swap address table may be determined.)
detecting a type of the data in accordance with whether the one or more logical addresses are within a range of logical addresses associated with a partition of one or more partitions of the memory system, the one or more partitions of the memory system for storing data associated with one or more volatile memory operations; (Lim [0005] a swap operation may be performed if an unused region of a main memory is not enough to load the new page. [0008] an address of a swap partition may be read from a partition table stored in the nonvolatile memory device [0012] to determine whether the received data are the swap data, a logical address of the received data may be translated into a physical address, and whether the physical address exists in the swap address table may be determined.) (i.e., the swap data is a type of data, swap partitions are for storing swap data associated with main memory operations)
[writing swap data to swap partition], in response to the type of the data being associated with the partition, (Lim [0083] If the received data are the swap data (S420: YES), the storage device 300 may store the received data in the volatile memory device 320 (S430).)
and updating one or more pointers of a plurality of pointers in response to writing the data, wherein each sub-partition of the plurality of sub-partitions is associated with a corresponding pointer of the plurality of pointers. (Lim [0008] an address of a swap partition may be read from a partition table stored in the nonvolatile memory device, and the swap address table may be generated based on the read address of the swap partition.) (i.e., entries in swap address table are pointers)
Lim does not teach determining, in response to the type of the data being associated with the partition, whether the one or more logical addresses align with one or more of a plurality of sub-partitions of the partition; writing the data to the one or more logical addresses in accordance with whether the one or more logical addresses align with one or more sub-partitions of the plurality of sub-partitions; and updating one or more pointers of a plurality of pointers in response to writing the data,
However, Palmer teaches
determining whether the one or more logical addresses align with one or more of a plurality of sub-partitions of the partition; (Palmer [0049] For a write command designating a partition, a starting address (e.g., starting LBA), an address length (“length”) and data to be written, the memory sub-system 110 can determine whether head data of the data to be written and tail data of the data to be written is aligned to the granularity configuration of the partition.)
writing the data to the one or more logical addresses in accordance with whether the one or more logical addresses align with one or more sub-partitions of the plurality of sub-partitions; (Palmer [0050] If the head data and the tail data are both aligned, then the memory sub-system controller can write the data directly to the memory device. Otherwise, if the head data and/or the tail data is unaligned with respect to the logical address granularity of the partition, then the memory sub-system 110 can perform read/modify/write (RMW) updates.)
and updating one or more pointers of a plurality of pointers in response to writing the data, (Palmer [0050] The memory sub-system 110 can update the logical to physical mapping table for the associated partition, and then return a write command status to the host system 120.) (i.e., the entries in address mapping table are the pointers)
Lim and Palmer are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim and Palmer to modify Lim‘s storing swap data in swap partitions with Palmer’s teaching of perform read/modify/write for correcting unaligned memory access. The motivation for doing so would be to have (Palmer [0022]) improved performance in the memory sub-system
Claim(s) 9, 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lim (US 20120151127), in view of Palmer (US 20240061767), further in view of Wang (JP 2025133381).
Regarding Claim 9, Lim and Palmer teach
Lim-Palmer teaches the partition comprises a set of logical addresses mapped to a set
of physical addresses of the memory system (Lim [0097] the controller 310 may determine whether a physical address for the received data exists in the swap address table 321 after the controller 310 translates a logical address of the received data into the physical address)
Lim-Palmer does not teach and the set of physical addresses are associated with storing one bit per memory cell.
However, Wang teaches the set of physical addresses are associated with storing one bit per memory cell. (Wang [0051] an SLC block that stores 1 bit of data per memory cell. The time required to write and read data for SLC blocks is shorter than for blocks that store more than 2 bits per memory cell. [0054] if swap data is associated with the write command received from host 3, UFS device 2 specifies the SLC block as the target block for writing)
Lim, Palmer and Wang are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim, Palmer and Wang to modify Lim-Palmer‘s storing swap data in swap partitions with Wang’s teaching of using SLC block as target block for writing swap data. The motivation for doing so would be using SLC for low latency swap operation because (Wang [0051]) The time required to write and read data for SLC blocks is shorter than for blocks that store more than 2 bits per memory cell.)
Regarding Claim 22, Lim and Palmer teach
Lim-Palmer teaches the partition comprises a set of logical addresses mapped to a set
of physical addresses of the memory system (Lim [0097] the controller 310 may determine whether a physical address for the received data exists in the swap address table 321 after the controller 310 translates a logical address of the received data into the physical address)
Lim-Palmer does not teach and the set of physical addresses are associated with storing one bit per memory cell.
However, Wang teaches the set of physical addresses are associated with storing one bit per memory cell. (Wang [0051] an SLC block that stores 1 bit of data per memory cell. The time required to write and read data for SLC blocks is shorter than for blocks that store more than 2 bits per memory cell. [0054] if swap data is associated with the write command received from host 3, UFS device 2 specifies the SLC block as the target block for writing)
Lim, Palmer and Wang are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lim, Palmer and Wang to modify Lim-Palmer‘s storing swap data in swap partitions with Wang’s teaching of using SLC block as target block for writing swap data. The motivation for doing so would be using SLC for low latency swap operation because (Wang [0051]) The time required to write and read data for SLC blocks is shorter than for blocks that store more than 2 bits per memory cell.)
Relevant Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Bert (US 20240193085) teaches paging system that swaps pages between the volatile memory and non-volatile memory which is partitioned.
Conclusion
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/WEI MA/Examiner, Art Unit 2135
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