DETAILED ACTION
Response to Amendment
This Action is in response to Preliminary Amendment filed on 03/09/2026.
Claims 1-39 have been cancelled. Claims 40-59 are newly added.
Claims 40-59 are presented for examination. Claims 40, 47 and 54 are independent.
Claims 40-59 remain pending in this application.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDSs) submitted on 10/22/2025, 12/04/2025, 01/23/2026, 03/06/2026, and 03/09/2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the IDSs are being considered by the examiner.
The information disclosure statement filed 09/08/2025 fails to comply with 37 CFR 1.98(a)(2), which requires a legible copy of each cited foreign patent document; each non-patent literature publication or that portion which caused it to be listed; and all other information or that portion which caused it to be listed. It has been placed in the application file, but the information referred to therein has not been considered.
Specification
Applicant is reminded of the proper language and format for an abstract of the disclosure.
The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure suitably to assist readers in deciding whether there is a need for consulting the full patent text for details.
The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided.
The abstract of the disclosure is objected to because of the following informalities:
Abstract exceeds 150 words in length.
A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
35 U.S.C. 101 has been interpreted as imposing three requirements. First, whoever invents or discovers an eligible invention may obtain only one patent therefor. MPEP 2104. This requirement forms the basis for statutory double patenting rejections when two applications claim the same invention (i.e. claim identical subject matter). Second, a claimed invention must fall within one of the four eligible categories of invention (i.e. process, machine, manufacture, or composition of matter) and must not be directed to subject matter encompassing a judicially recognized exception as interpreted by the courts. Id.; MPEP 2106. Third, a claimed invention must be useful or have a utility that is specific, substantial and credible. MPEP 2104.
The four eligible categories of invention include: (1) process which is an act, or a series of acts or steps, (2) machine which is an concrete thing, consisting of parts, or of certain devices and combination of devices, (3) manufacture which is an article produced from raw or prepared materials by giving to these materials new forms, qualities, properties, or combinations, whether by hand labor or by machinery, and (4) composition of matter which is all compositions of two or more substances and all composite articles, whether they be the results of chemical union, or of mechanical mixture, or whether they be gases, fluids, powders or solids. MPEP 2106(I).
Claims 40-46 are rejected under 35 U.S.C. 101 (STEP 1) as not falling within at least one of the four categories of patent eligible subject matter because the broadest reasonable interpretation of the instant claims in light of the specification encompasses transitory signals. Although the specification discloses that in some embodiments, the machine-readable or computer-readable medium may include a non-transitory medium, the embodiments are not limited in this context (see [00137]-[00139]). Transitory signals are not within one of the four statutory categories (i.e. non-statutory subject matter). See MPEP 2106(1); In re Nuijten, 500 F.3d 1346, 1357 (Fed. Cir. 2007). However, claims directed toward a non-transitory computer readable medium may qualify as a manufacture and make the claim patent-eligible subject matter. MPEP 2106(11) (A). Therefore, amending the claims to recite a “non-transitory computer-readable medium” would resolve this issue.
Examiner’s Note
During examination, the application was reviewed for potential rejection under 35 USC § 101 (revised Step 2A, two-prong test). The independent claims recite limitations:
receive a request for a DMA operation via an API, the DMA operation identifying a source address, destination address, and length of the DMA operation;
access data of a memory mapping associating a local memory or a remote memory with each of the source address and destination address; and
if both the source address and the destination address are associated with the local memory based on the memory mapping, cause a local DMA copy from the source address at the local memory to the destination address at the local memory; and
if the source address or the destination address is associated with the remote memory based on the memory mapping, cause a remote copy between the source address and the destination address.
Examiner found that such claimed invention, as a whole, integrates any judicial exception, if present, into a practical application. For instance, in the claimed invention, DMA engine can use network interface to carry messages to the remote memory pool to facilitate a read or write of pool memory (see [0086]). In addition, disclosed invention can provide DMA technology that allows an input/output (I/O) device to bypass a central processing unit (CPU) or core, and to send or receive data directly to or from a system memory. Therefore, the CPU or core can be available to perform other operations (see [0087]). For e.g., the claimed approach would the CPU to initiate a data transfer, and then perform other operations while the data transfer is in progress (see [0087]). Since the claim as a whole integrates the judicial exception into a practical application, the claim is not directed to a judicial exception (Step 2A: NO) and is eligible under 35 USC § 101.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 40-43, 46-50, 53-56 and 59 is/are rejected under 35 U.S.C. 103 as being unpatentable over Brown et al. (hereinafter, Brown, US 20170124021 A1) in view of Akiyama et al. (hereinafter, Akiyama, US 20130232284 A1).
Regarding claim 40, Brown discloses at least one machine-readable storage medium storing instructions to be executed (see [0031]; examples also may be embodied as one or more non-transitory computer readable media having instructions stored thereon) by at least one computing device (see Fig.1:14; storage controller computing devices 14(1) and 14(2); also see Fig.2:14), the instructions, when executed by the at least one computing device, resulting in the computing device being configured to perform operations (see [0020]-[0021]; processor(s) 26 of the storage controller computing device 14 execute a program of stored instructions for one or more aspects of the this technology, as described) comprising operations to:
receive a request for a Direct Memory Access (DMA) operation (see [0018]; the storage controller computing devices 14(1) and 14(2) manage and provision the storage volumes 24(1)-24(n) of the storage servers 18(1)-18(n), provide high availability for the data stored therein, and receive and respond to various read and write requests from the client devices 16(1)-16(n) directed to data stored in, or to be stored in, one or more of the storage volumes 24(1)-24(n) of the storage servers 18(1)-18(n); also see [0027]; the RDMA plug-in driver 42 receives commands via the verbs API and communicates with the hardware device driver 38 to carry out operations using the DMA provider device 32 in order to provide RDMA services to the client application(s); also see [0038]; also see [0052]; processing write and read RDMA work requests by the storage controller computing devices 14(1)) via an Application Programming Interface (API) (see [0017]; also see [0022]; utilize an OFED API, also referred to herein as the “verbs API,” in order to initiate RDMA operations; also see [0024]; RDMA services implemented by the RDMA plug-in driver 42 are advantageously presented over the verbs API; also see [0027]), the DMA operation identifying a source address, and destination address (see [0052]-[0053]; the source address 1108 and destination address 1102 are included in the work request by one of the client application(s) 36 from which the work request originated);
access data of a memory mapping associating a local memory or a remote memory with each of the source address and destination address (see [0023]; the memory protection table region of the shared memory 40 defines memory locations or addresses that are available for use by the peer one of the storage controller computing devices 14(1) or 14(2) to perform RDMA operations; also see [0037]; Accordingly, by obtaining the anchor record 404 defining the memory protection table region 502, the storage controller computing device 14(1) discovers addresses in the memory 28 of the peer storage controller computing device 14(2) from which the storage controller computing device 14(1) can read data from via RDMA, and to which the storage controller computing device 14(1) can write data via RDMA; also see [0051]-[0052]; the storage controller computing device 14(1) compares a destination address in a work request with a memory protection table 1108 of the storage controller computing device 14(1); the RDMA write work request obtained by the storage controller computing device 14(1) includes an indication of a source address 1100 in the memory 28 of the storage controller computing device 14(1) and a destination address 1102 that, if valid, corresponds with the memory protection table 1108 in the storage controller computing device 14(1)); and
if the source address or the destination address is associated with the remote memory based on the memory mapping, cause a remote copy between the source address and the destination address (see [0032]; enabling DMA capable devices for RDMA usage; also see [0054]-[0055]; if the RDMA plug-in driver 42 determines that the destination address is valid, then the Yes branch is taken to step 1006; In step 1006, the RDMA plug-in driver 42 of the storage controller computing device 14(1) instructs the DMA provider device 32 to insert data identified in the work request by the source address 1100 into the destination address 1102 that is identified in the work request and is within the memory protection table 1108. Accordingly, the RDMA write work request is processed by the RDMA plug-in driver 42 of the storage controller computing device 14(1) by writing, via DMA and using the DMA Provider device 32, directly into the shared memory 40 of the peer storage controller computing device 14(2)).
Although, and as set forth above, Brown discloses the DMA operation identifying a source address, and destination address (see [0052]-[0053]), Brown does not explicitly disclose the DMA operation identifying length of the DMA operation. Brown also does not explicitly disclose if both the source address and the destination address are associated with the local memory based on the memory mapping, cause a local DMA copy from the source address at the local memory to the destination address at the local memory.
However, in an analogous art, Akiyama discloses receive a request for a DMA operation (see Fig.13: 1301 and 1311; also see [0065]; transfer sequencer (BE) 136 is composed of a small-scale microprocessor and a memory and requests data transfers to the DMA controllers; also see [0187]-[0193]; second embodiment shows an example of the DMA controller 135 receiving the data transfer request), the DMA operation identifying a source address, destination address, and length of the DMA operation (see [0193]; when receiving the transfer request 1311, the DMA controller 135 obtains the control parameters (address of the transfer source, address of the transfer destination, length of data to be transferred, etc.); and
if both the source address and the destination address are associated with the local memory based on the memory mapping, cause a local DMA copy from the source address at the local memory to the destination address at the local memory (see [0187]-[ 0193] in view of Fig.13; transfer of read data from the disk unit 200 to the host computer 20; transfers the data between the memories in accordance with the obtained control parameters (such as address of the transfer source, address of the transfer destination); also see [0093] in view of Fig.5; transfer of write data from the host computer 20 to the disk unit 200; the examiner articulates disk unit 200 of disk array apparatus corresponds to a local memory device; examiner also articulates that the combination of teaching from Fig.5 and Fig. 13 teaches how data is copied from disk unit 200, and also how data is copied to disk unit 200; for example, in accordance with the obtained control parameters (disk unit 200 as address of the transfer source as taught in Fig. 13, and disk unit 200 also as address of the transfer destination as taught in Fig.5, one of ordinary skill in the art could locally transfer/copy data between the source/ destination addresses of disk unit 200).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Akiyama with Brown so that the DMA operation identifies a source address, destination address, and length of the DMA operation; and if both the source address and the destination address are associated with the local memory based on the memory mapping, cause a local DMA copy from the source address at the local memory to the destination address at the local memory.
One of ordinary skill in the art would have been motivated so that the load on the microprocessor can be reduced (Akiyama: [0171]).
Regarding claim 41, Brown (modified by Akiyama) discloses the at least one machine-readable storage medium of claim 40, as set forth above. In addition, Akiyama further discloses wherein the remote copy comprises a copy via a Peripheral Component Interconnect Express (PCIe) connection (see [0045]; The internal network 150 is composed of a switch (e.g. PCI express switch) for connecting respective parts).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Akiyama with Brown so that the remote copy comprises a copy via a Peripheral Component Interconnect Express (PCIe) connection.
One of ordinary skill in the art would have been motivated so that the load on the microprocessor can be reduced (Akiyama: [0171]).
Regarding claim 42, Brown (modified by Akiyama) discloses the at least one machine-readable storage medium of claim 40, as set forth above. In addition, Brown further discloses wherein the remote copy comprises a copy via a fabric (see [0026] in view of [0003]; communication network(s) 20(1) and/or 20(2) can use TCP/IP over Ethernet; OpenFabrics Enterprise Distribution (OFED) supports transport protocols for communicating data using RDMA, such as InfiniBand, Internet Wide Area RDMA Protocol (iWARP), and RDMA Over Converged Ethernet (RoCE)).
Regarding claim 43, Brown (modified by Akiyama) discloses the at least one machine-readable storage medium of claim 40, as set forth above. In addition, Brown further discloses wherein the remote copy comprises a copy via an Internet Protocol network (see [0026] in view of [0003]; communication network(s) 20(1) and/or 20(2) can use TCP/IP over Ethernet; OpenFabrics Enterprise Distribution (OFED) supports transport protocols for communicating data using RDMA, such as InfiniBand, Internet Wide Area RDMA Protocol (iWARP), and RDMA Over Converged Ethernet (RoCE)).
Regarding claim 46, Brown (modified by Akiyama) discloses the at least one machine-readable storage medium of claim 40, as set forth above. In addition, Brown further discloses wherein the remote copy comprises a copy via a network interface controller (see [0025]; communication interface 30 of the storage controller computing device 14 in this example can include one or more network interface controllers (NICs) for operatively coupling and communicating between the storage controller computing devices 14(1) and 14(2)).
As for Claim(s) 47 and 54, the claims list all the same elements of claim 40, but in a method; and an apparatus (see Fig.1:14; storage controller computing devices 14(1) and 14(2); also see Fig.2:14) comprising an interface (see Fig.2:30) to a remote memory and circuitry (see Fig.2:26; also see [0020]-[0021]) form to carry out the steps of claim 40, rather than the at least one machine-readable storage medium form. Therefore, the supporting rationale of the rejection to claim 40 applies equally as well to claims 47 and 54.
As for Claim 48, the claim depends on claim 47, but does not teach or further define over the limitations in claim 41. Therefore, claim 48 is rejected for the same reasons as set forth in claim 41.
As for Claims 49 and 55, the claims depend on claims 47 and 54 respectively, but do not teach or further define over the limitations in claim 42. Therefore, claims 49 and 55 respectively are rejected for the same reasons as set forth in claim 42.
As for Claims 50 and 56, the claims depend on claims 47 and 54 respectively, but do not teach or further define over the limitations in claim 43. Therefore, claims 50 and 56 respectively are rejected for the same reasons as set forth in claim 43.
As for Claims 53 and 59, the claims depend on claims 47 and 54 respectively, but do not teach or further define over the limitations in claim 46. Therefore, claims 53 and 59 respectively are rejected for the same reasons as set forth in claim 46.
Claim(s) 44, 51 and 57 is/are rejected under 35 U.S.C. 103 as being unpatentable over Brown et al. (hereinafter, Brown, US 20170124021 A1) in view of Akiyama et al. (hereinafter, Akiyama, US 20130232284 A1) in view of MAROLIA et al. (hereinafter, MAROLIA, US 20190297015 A1).
Regarding claim 44, Brown (modified by Akiyama) discloses the at least one machine-readable storage medium of claim 40, as set forth above. Brown (modified by Akiyama) does not explicitly disclose wherein the remote copy comprises copy to a memory associated with a Graphics Processing Unit (GPU).
However, in an analogous art, MAROLIA discloses wherein the remote copy comprises copy to a memory associated with a Graphics Processing Unit (GPU) (see [0016]-[0017]; distribute, compute, and synchronize large datasets among compute nodes; multiple kinds of compute engines can include CPUs, cores, accelerators, or graphics processing units (GPUs)).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of MAROLIA with Brown and Akiyama so that the remote copy comprises copy to a memory associated with a Graphics Processing Unit (GPU).
One of ordinary skill in the art would have been motivated to allow an input/output (I/O) device to bypass a central processing unit (CPU) or core, so that the CPU or core can be available to perform other operations (MAROLIA: [0047]).
As for Claims 51 and 57, the claims depend on claims 47 and 54 respectively, but do not teach or further define over the limitations in claim 44. Therefore, claims 51 and 57 respectively are rejected for the same reasons as set forth in claim 44.
Claim(s) 45, 52 and 58 is/are rejected under 35 U.S.C. 103 as being unpatentable over Brown et al. (hereinafter, Brown, US 20170124021 A1) in view of Akiyama et al. (hereinafter, Akiyama, US 20130232284 A1) in view of Zhu et al. (hereinafter, Zhu, US 20120144019 A1).
Regarding claim 45, Brown (modified by Akiyama) discloses the at least one machine-readable storage medium of claim 40, as set forth above. Brown (modified by Akiyama) does not explicitly disclose provide an indication that the DMA operation is a supported capability.
However, in an analogous art, Zhu discloses provide an indication that the DMA operation is a supported capability (see [0040]; flags that indicate capabilities of the current network interface, such as whether the interface is RDMA capable; also see [0016]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Zhu with Brown and Akiyama to provide an indication that the DMA operation is a supported capability.
One of ordinary skill in the art would have been motivated to determine one or more connection transports that are available for communication between the client and server that affect the speed of one connection transport over another for the client to use in selecting an appropriate transport (Zhu: [0016]).
As for Claims 52 and 58, the claims depend on claims 47 and 54 respectively, but do not teach or further define over the limitations in claim 45. Therefore, claims 52 and 58 respectively are rejected for the same reasons as set forth in claim 45.
Additional References
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Xiong et al. (US 20160062944 A1) supports RMA API over active message.
Menachem et al. (US 10031857 B2) teaches address translation services for direct accessing of local memory over a network fabric.
Aho et al. (US 8874681 B2) discloses RDMA in a parallel computer.
Gunderson et al. (US 4417334 A) causes DMA to accept message for copying into the local memory of the associated subsystem.
Chou et al. (US 20110040920 A1) teaches DMA engine receives and send DMA packets to and from the host system and the hardware emulators according to the DMA requests.
Maruccia et al. (US 20080320161 A1) teaches transferring data from a source target to a destination target, and corresponding network interface using DMA.
Conclusion
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/SANDARVA KHANAL/Primary Examiner, Art Unit 2453
