DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06/24/2025 has been considered by the examiner. The submission is in compliance with the provisions of 37 CFR 1.97.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 – 3, 15 – 16, 18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Obrador (US PgPub NO. 20040218059) in view of Calder (US PgPub NO. 20200182983).
Regarding claim 1, Obrador teaches a solid-state imaging device (figure 2 item 200) comprising: a plurality of pixels respectively including sensor elements (paragraph 0014 image sensor 240); and at least two signal processing circuits performing different operations from each other, wherein the at least two signal processing circuits are configured to receive a digital signal output from each of the sensor element (figure 2 items 210 and 220).
However, Obrador fails to teach wherein the sensor elements are single-photon avalanche diodes (SPADs). Calder, on the other hand teaches wherein the sensor elements are single-photon avalanche diodes (SPADs).
More specifically, Calder teaches wherein the sensor elements are single-photon avalanche diodes (SPADs) (figure 2 item 215).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to incorporate the teachings of Calder with the teachings of Obrador because to have a system with SPAD elements for improved sensitivity and timing, thereby improving image capture of Obrador.
Regarding claim 2, as mentioned above in the discussion of claim 1, Obrador in view of Calder teach all of the limitations of the parent claim. Additionally, Obrador teaches wherein the at least two signal processing circuits comprise a still image counting circuit configured to generate a still image (figure 2 item 210) and a moving image counting circuit configured to generate a moving image (figure 2 item 220).
Regarding claim 3, as mentioned above in the discussion of claim 1, Obrador in view of Calder teach all of the limitations of the parent claim. Additionally, Obrador teaches wherein the at least two signal processing circuits comprise an event detection counting circuit configured to detect a temporal signal change (figure 3 item 310 also paragraphs 0017 – 0018; sensor controller).
Regarding claim 15, Obrador teaches a pixel array (paragraph 0014 image sensor 240) comprising: a plurality of photoelectric converters (paragraph 0014 image sensor 240 with converters); and a plurality of signal processing circuits, wherein each of the plurality of photoelectric converters comprises a sensor element (figure 2 items 210 and 220), and the plurality of signal processing circuits comprise: a first signal processing circuit configured to receive a first digital signal output from a sensor element included in a first photoelectric converter among the plurality of photoelectric converters (figure 2 item 210); and a second signal processing circuit configured to receive the first digital signal with the first signal processing circuit and perform a different operation than the first signal processing circuit (figure 2 item 220 and 250).
However, Obrador fails to teach wherein the sensor elements are single-photon avalanche diodes (SPADs). Calder, on the other hand teaches wherein the sensor elements are single-photon avalanche diodes (SPADs).
More specifically, Calder teaches wherein the sensor elements are single-photon avalanche diodes (SPADs) (figure 2 item 215).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to incorporate the teachings of Calder with the teachings of Obrador because to have a system with SPAD elements for improved sensitivity and timing, thereby improving image capture of Obrador.
Regarding claim 16, as mentioned above in the discussion of claim 15, Obrador in view of Calder teach all of the limitations of the parent claim. Additionally, Obrador teaches wherein the first signal processing circuit comprises a still image counting circuit configured to generate a still image based on the first digital signal (figure 2 item 210), and the second signal processing circuit includes a moving image counting circuit configured to generate a moving image based on the first digital signal (figure 2 item 220).
Regarding claim 18, as mentioned above in the discussion of claim 15, Obrador in view of Calder teach all of the limitations of the parent claim. Additionally, Obrador teaches wherein the first signal processing circuit comprises at least one of a still image counting circuit configured to generate a still image based on the first digital signal and a moving image counting circuit configured to generate a moving image based on the first digital signal (figure 2 items 210 and 220), and the second signal processing circuit comprises an event detection counting circuit configured to detect a temporal signal change based on the first digital signal (figure 3 item 310 also paragraphs 0017 – 0018; sensor controller).
Regarding claim 20, Obrador teaches a solid-state imaging device (figure 2 item 200) comprising: a pixel array including a plurality of pixels (paragraph 0014 image sensor 240 with pixels); a vertical scanning unit configured to select a pixel corresponding to a row based on a synchronous signal among the plurality of pixels and control the selected pixel to output a signal (paragraph 0014 image sensor 240; CCD has vertical scanning); a horizontal scanning unit configured to select a pixel corresponding to a column based on the synchronous signal among the plurality of pixels and control the selected pixel to output a signal (paragraph 0014 image sensor 240; CCD has horizontal scanning); and a signal output unit configured to receive a signal from the pixel array and output image data (Figure 3 item 310), wherein each of the plurality of pixels includes: a sensor element (paragraph 0014 image sensor 240); and at least two signal processing circuits configured to receive a digital signal output from the sensor element and perform different operations from each other (figure 2 items 210 and 220).
However, Obrador fails to teach wherein the sensor elements are single-photon avalanche diodes (SPADs). Calder, on the other hand teaches wherein the sensor elements are single-photon avalanche diodes (SPADs).
More specifically, Calder teaches wherein the sensor elements are single-photon avalanche diodes (SPADs) (figure 2 item 215).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to incorporate the teachings of Calder with the teachings of Obrador because to have a system with SPAD elements for improved sensitivity and timing, thereby improving image capture of Obrador.
Allowable Subject Matter
Claims 4 – 14, 17, and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The following is a statement of reasons for the indication of allowable subject matter for claim 4: “wherein the event detection counting circuit comprises: a counter configured to receive the digital signals respectively corresponding to a plurality of frames including a first frame and a second frame that precedes the first frame and generate a count value by counting the digital signals; a latch configure to hold a count value corresponding to the second frame while the counter is generating a count value corresponding to the first frame; a differential circuit configured to compare the count value corresponding to the first frame with the count value corresponding to the second frame and generate a comparison result value; and an up/down circuit configured to generate a signal based on the comparison result value from the differential circuit” in combination with the other limitations in the claim and the parent claim is not discussed or suggested in any of the prior art that was searched.
The following is a statement of reasons for the indication of allowable subject matter for claim 5: “wherein the event detection counting circuit configured to receive the digital signal corresponding to each of a plurality of frames and comprises: a first up/down counter configured to count up a number of photons in an odd frame among the plurality of frames, count down a number of photons in an even frame among the plurality of frames, and generate first differential information corresponding to a difference in the number of photons between consecutive frames; a second up/down counter configured to count down a number of photons in the odd frame among the plurality of frames, count up a number of photons in the even frame among the plurality of frames, and generate second differential information corresponding to a difference in the number of photons between consecutive frames; and an up/down circuit configured to generate a signal based on the first differential information and the second differential information” in combination with the other limitations in the claim and the parent claim is not discussed or suggested in any of the prior art that was searched.
The following is a statement of reasons for the indication of allowable subject matter for claim 6: “wherein the at least two signal processing circuits comprise a first signal processing circuit connected to only one SPAD among the SPADs and a second signal processing circuit connected to a plurality of SPADs among the SPADs” in combination with the other limitations in the claim and the parent claim is not discussed or suggested in any of the prior art that was searched.
Regarding claims 7 - 12, these claims are also objected to as being dependent from objected claim 6.
The following is a statement of reasons for the indication of allowable subject matter for claim 13: “wherein the at least two signal processing circuits comprise: a counting circuit connected to only one SPAD among the SPADs; an event detection counting circuit connected to the only one SPAD among the SPADs and configured to detect a temporal signal change; and a spatial step counting circuit configured to detect an output difference in the digital signal between a plurality of SPADs at different positions, wherein the solid-state imaging device further comprises a noise event removing circuit connected to the event detection counting circuit and the spatial step counting circuit and configured to remove a noise event caused by a flicker in a light source, based on an output of the event detection counting circuit and an output of the spatial step counting circuit” in combination with the other limitations in the claim and the parent claim is not discussed or suggested in any of the prior art that was searched.
The following is a statement of reasons for the indication of allowable subject matter for claim 14: “wherein the solid-state imaging device has a stack structure, at least two types of signal processing circuits among the at least two signal processing circuits are respectively arranged in different layers, and the solid-state imaging device further comprises an inter-layer connection wiring configured to distribute the digital signal from one of the SPADs” in combination with the other limitations in the claim and the parent claim is not discussed or suggested in any of the prior art that was searched.
The following is a statement of reasons for the indication of allowable subject matter for claim 17: “wherein the first signal processing circuit comprises at least one of a still image counting circuit configured to generate a still image based on the first digital signal and a moving image counting circuit configured to generate a moving image based on the first digital signal, and the second signal processing circuit comprises a binning counting circuit configured to count a sum of digital signals respectively output from SPADs respectively included in at least two of the plurality of photoelectric converters” in combination with the other limitations in the claim and the parent claim is not discussed or suggested in any of the prior art that was searched.
The following is a statement of reasons for the indication of allowable subject matter for claim 19: “wherein the first signal processing circuit comprises at least one of a still image counting circuit configured to generate a still image based on the first digital signal and a moving image counting circuit configured to generate a moving image based on the first digital signal, and the second signal processing circuit comprises a spatial step counting circuit configured to count an output difference between digital signals respectively output from SPADs respectively included in at least two photoelectric converters at different positions among the plurality of photoelectric converters” in combination with the other limitations in the claim and the parent claim is not discussed or suggested in any of the prior art that was searched.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
HINDERLING (US PgPub No. 2018/0356502) teaches an SPAD system with multiple processors.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Usman A Khan whose telephone number is (571)270-1131. The examiner can normally be reached on M - Th 5:30 AM - 2 PM, F 5:30 AM - Noon.
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Usman Khan
/USMAN A KHAN/Primary Examiner, Art Unit 2637
07/17/2026
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