Prosecution Insights
Last updated: October 01, 2026
Application No. 19/248,298

MEMORY SYSTEM

Non-Final OA §DP
Filed
Jun 24, 2025
Priority
Feb 14, 2023 — JP 2023-021015 +1 more
Examiner
PEUGH, BRIAN R
Art Unit
2139
Tech Center
2100 — Computer Architecture & Software
Assignee
KIOXIA Corporation
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
501 granted / 543 resolved
+37.3% vs TC avg
Minimal +1% lift
Without
With
+1.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
11 currently pending
Career history
558
Total Applications
across all art units

Statute-Specific Performance

§101
7.9%
-32.1% vs TC avg
§103
26.0%
-14.0% vs TC avg
§102
34.4%
-5.6% vs TC avg
§112
22.4%
-17.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 543 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on June 24, 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the Examiner. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,366,966. Although the claims at issue are not identical, they are not patentably distinct from each other because the patented application anticipates the claimed subject matter as recited. 19/248,298 12,366,966 1. A memory system comprising: a memory; and a controller configured to: execute a first tracking process to determine a value of a first voltage in a first process that is carried out independently of a request from a host; execute a first data read process to read first data from the memory in response to receiving a read request; transmit a command with the first voltage to the memory for the memory to execute a second tracking process using the first voltage when error correction of the first data fails; receive a value of a second voltage from the memory as a result of the second tracking process; and execute a second data read process using the second voltage to read second data from the memory. 1. A memory system comprising: a nonvolatile memory including a plurality of memory cells; and a memory controller configured to execute a data read process of reading data from the plurality of memory cells, wherein the memory controller is further configured to: execute a first tracking process to determine a value of a first voltage in a patrol process that is carried out independently of a request from a host; execute a first data read process to read first data from the nonvolatile memory in response to receiving a read request from the host; cause the nonvolatile memory to execute a second tracking process using the first voltage when error correction of the first data fails; receive a value of a second voltage from the nonvolatile memory as a result of the second tracking process; and execute a second data read process using the second voltage to read second data from the nonvolatile memory. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Takagiwa teaches tracking a read operation where error correction fails using a specific red voltage. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Brian R. Peugh whose telephone number is (571) 272-4199. The examiner can normally be reached on Monday-Friday from 7:30am to 3:30pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Rocio Del Mar Perez-Velez, phone number 571-270-5935, can be reached. The fax phone number for the organization where this application or proceeding is assigned is 703-872-9306. Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the receptionist whose telephone number is 571-272-2100. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /BRIAN R PEUGH/Primary Examiner, Art Unit 2133
Read full office action

Prosecution Timeline

Jun 24, 2025
Application Filed
Sep 22, 2026
Non-Final Rejection mailed — §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12730561
TECHNIQUES TO IMPROVE BOOT UP LATENCY OF A MEMORY SYSTEM
1y 7m to grant Granted Sep 08, 2026
Patent 12724549
SELECTIVE DATA CORRUPTION BEFORE ACTUAL ERASE OPERATION FOR DATA SECURITY
1y 7m to grant Granted Sep 01, 2026
Patent 12717521
DISTRIBUTED CONTROL PLANE TRACKING OBJECT OWNERSHIP CHANGES WITHIN A DISTRIBUTED STORAGE ARCHITECTURE
1y 12m to grant Granted Aug 25, 2026
Patent 12704971
FORECASTED TEMPERATURE BASED MEDIA MANAGEMENT
2y 6m to grant Granted Aug 11, 2026
Patent 12705174
APPARATUS AND METHOD FOR ADJUSTING CACHE ALLOCATED FOR READ LOOK AHEAD
1y 5m to grant Granted Aug 11, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
93%
With Interview (+1.0%)
2y 3m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 543 resolved cases by this examiner. Grant probability derived from career allowance rate.

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