Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
The instant application having Application No. 19/248,709 has a total 20 claims pending in the application; there are 3 independent claims and 17 dependent claims all of which are ready for examination by the Examiner.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because
Claims 1, 8 and 15 appears to be directed to an abstract idea without reciting additional limitations that tie it to a practical application or without reciting additional limitations that amount to significantly more than the abstract idea. One can mentally generate graph with nodes for spaces in a building as well as assets that are contained within those spaces. Then one can also mentally associate and classify senor readings and generate relationships between spaces, assets and sensors. The additional limitations are receiving data. These additional limitations are mere data gathering which are insignificant extra solution activities under step 2A prong II and well understood routine and conventional under step 2B (For Berkhiemer See MPEP 2106.05(d)(II) Versata.)
Step 2A, Prong One: Mathematical Concepts
Independent claims 1, 8 and 15 are directed to compile sorting operator.
receiving a sorting parameter from a user and a first primitive selected for invocation,
wherein the sorting parameter and the first primitive are for sorting multi-dimensional data;
[0085] As shown in FIG. 2, a source program 250 is a computation description of a sorting operator (for example, a high-level language program corresponding to the sorting operator). For example, the source program 250 may be a target detection program or a detection box screening program in the target detection program. The source program 250 invokes, through an API, a first function and a third function that are defined in a compiler on a compilation device 220 to perform detection box screening, so as to implement quick detection box screening, and improve inference efficiency and training efficiency of a target detection model.
generating a scheduling policy for a sorting operator based on the sorting parameter and
the first primitive; and
[0138] In an example, the scheduling policy for the sorting operator is directly generated by using a computation description (for example, the sorting parameter and the first primitive) of the sorting operator. For example, the scheduling policy is default scheduling policy that does not optimize the sorting process. The default scheduling policy may be set by a developer.
compiling a computation description and the scheduling policy for the sorting operator to
obtain a sorting computation expression comprising the scheduling policy.
[0086] The compilation device 220 compiles the source program 250 to obtain a program compilation result 201. The compilation device 220 may be any device on which an AI compiler (for example, an AI compiler such as a TVM) is deployed.
Step 2A Prong Two and Step 2B
Use of processors to receive, generate, compile would constitute use of a generic computer used as tool to implement the abstract idea discussed above.
The step of compiling constitutes an insignificant extra-solution activity in the form of mere data gather, see MPEP 2106.05(g)
i. Performing clinical tests on individuals to obtain input for an equation, In re Grams, 888 F.2d 835, 839-40; 12 USPQ2d 1824, 1827-28 (Fed. Cir. 1989);
Looking at the limitations as an ordered combination adds nothing that is not already present when looking at the elements taken individually. There is no indication that the combination of elements improves the functioning of a computer or improves any other technology. Their collective functions merely provide conventional computer implementation.
Accordingly claims 1-20 are found to be directed to a patent ineligible abstract idea.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 8, 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Balusani et al (U.S. Pub No. 2020/0327478 A1), and in view of Perry et al (U.S. Pub No. 2023/0206537 A1).
As per claim 1, Balusani discloses a method, wherein the method comprises:
receiving a sorting parameter from a user and a first primitive selected for invocation,
wherein the sorting parameter and the first primitive are for sorting data (Par [0034-0036]);
generating a scheduling policy for a sorting operator based on the sorting parameter and
the first primitive (par [0036]); and
compiling a computation description and the scheduling policy for the sorting operator to
obtain a sorting computation expression comprising the scheduling policy (Par [0002, 0056-0057]).
Balusani discloses scheduled rules, predetermined sort rules. Bulusani does not explicitly disclose multi-dimensional data generating a scheduling policy.
However, Perry discloses multi-dimensional data; generating scheduling policy (Par [0011, 0029, 0046]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Perry into the teachings of Balusani in order to improve system (Par [0043]).
As per claim 8, Balusani discloses an encoding apparatus, comprising:
a receiver configured to receive a sorting parameter from a user and a first primitive selected for invocation, wherein the sorting parameter and the first primitive are configured to sort multi-dimensional data (Par [0034-0036]);
a scheduler configured to generate a scheduling policy for a sorting operator based on the sorting parameter and the first primitive (Par [0036]);
a compiler configured to compile a computation description and the scheduling policy for the sorting operator to obtain a sorting computation expression comprising the scheduling policy (Par [0002, 0056-0057]).
Balusani discloses scheduled rules, predetermined sort rules. Bulusani does not explicitly disclose multi-dimensional data generating a scheduling policy.
However, Perry discloses multi-dimensional data; generating scheduling policy (Par [0011, 0029, 0046]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Perry into the teachings of Balusani in order to improve system (Par [0043]).
As per claim 15, Balusani discloses a chip system, comprising:
a memory configured to store instructions; and at least one processor coupled to the memory and configured to execute the instructions to cause the chip system to (Par [0022-0023]):
receive a sorting parameter from a user and a first primitive selected for invocation, wherein the sorting parameter and the first primitive are configured to sort multi-dimensional data (Par [0034-0036]);
generate a scheduling policy for a sorting operator based on the sorting parameter
and the first primitive (Par [0036]); and
compile a computation description and the scheduling policy for the sorting operator to obtain a sorting computation expression comprising the scheduling policy (Par [0002, 0056-0057]).
Balusani discloses scheduled rules, predetermined sort rules. Bulusani does not explicitly disclose multi-dimensional data generating a scheduling policy.
However, Perry discloses multi-dimensional data; generating scheduling policy (Par [0011, 0029, 0046]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Perry into the teachings of Balusani in order to improve system (Par [0043]).
Claim(s) 2-3, 9-10, 16-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Balusani et al (U.S. Pub No. 2020/0327478 A1), and Perry et al (U.S. Pub No. 2023/0206537 A1, and further in view of Hiroshige (U.S. Pub No. 2001/0016855 A1).
As per claim 2, Balusani and Perry do not explicitly disclose the method of claim 1, wherein the sorting parameter comprises a sorting axis, a sorting manner, and an output data type, wherein the sorting axis is a dimension B of the multi-dimensional data, wherein the sorting manner is in an ascending order or a descending order, and wherein the output data type comprises at least a numeric value of data or an index of data.
However, Hiroshige discloses wherein the sorting parameter comprises a sorting axis, a sorting manner, and an output data type, wherein the sorting axis is a dimension B of the multi-dimensional data, wherein the sorting manner is in an ascending order or a descending order, and wherein the output data type comprises at least a numeric value of data or an index of data (Par [0048-0050]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Hiroshige into the teachings of Balusani as modified by Perry in order to allow the user to easily manage data (Par [0009]).
As per claim 3, Hiroshige discloses the method of claim 2, wherein the multi-dimensional data describes a plurality of detection boxes in an image, wherein the detection boxes correspond to at least one object in the image, wherein each column of data in the dimension B describes a same attribute of the detection boxes, and wherein a sorting result of the multi-dimensional data represents sorted detection boxes of the detection boxes (Par [0048-0054]).
As per claim 9, Balusani and Perry do not explicitly disclose the encoding apparatus of claim 8, wherein the sorting parameter comprises a sorting axis, a sorting manner, and an output data type, wherein the sorting axis is a dimension B of the multi-dimensional data, wherein the sorting manner is in an ascending order or a descending order, and wherein the output data type comprises at least a numeric value of data or an index of data.
However, Hiroshige discloses wherein the sorting parameter comprises a sorting axis, a sorting manner, and an output data type, wherein the sorting axis is a dimension B of the multi-dimensional data, wherein the sorting manner is in an ascending order or a descending order, and wherein the output data type comprises at least a numeric value of data or an index of data (Par [0048-0050]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Hiroshige into the teachings of Balusani as modified by Perry in order to allow the user to easily manage data (Par [0009]).
As per claim 10, Hiroshige discloses the encoding apparatus of claim 8, wherein the multi-dimensional data describes a plurality of detection boxes in an image, wherein the detection boxes correspond to at least one object in the image, wherein each column of data in the dimension B describes a same attribute of the detection boxes, and wherein a sorting result of the multi-dimensional data represents sorted detection boxes of the detection boxes (Par [0048-0054]).
As per claim 16, Balusani and Perry do not explicitly disclose the chip system of claim 15, wherein the sorting parameter comprises a sorting axis, a sorting manner, and an output data type, wherein the sorting axis is a dimension B of the multi-dimensional data, wherein the sorting manner is in an ascending order or a descending order, and wherein the output data type comprises at least a numeric value of data or an index of data.
However, Hiroshige discloses wherein the sorting parameter comprises a sorting axis, a sorting manner, and an output data type, wherein the sorting axis is a dimension B of the multi-dimensional data, wherein the sorting manner is in an ascending order or a descending order, and wherein the output data type comprises at least a numeric value of data or an index of data (Par [0048-0050]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Hiroshige into the teachings of Balusani as modified by Perry in order to allow the user to easily manage data (Par [0009]).
As per claim 17, Hiroshige discloses the chip system of claim 15, wherein the multi-dimensional data describes a plurality of detection boxes in an image, wherein the detection boxes correspond to at least one object in the image, wherein each column of data in the dimension B describes a same attribute of the detection boxes, and wherein a sorting result of the multi-dimensional data represents sorted detection boxes of the detection boxes (Par [0048-0054]).
Claim(s) 4-7, 11-14, 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Balusani et al (U.S. Pub No. 2020/0327478 A1), and Perry et al (U.S. Pub No. 2023/0206537 A1, and further in view of Bozier (U.S. Pub No. 2016/0179445 A1).
As per claim 4, Perry discloses the method of claim 2, wherein the scheduling policy comprises a second primitive and a third primitive, and wherein the method further comprises: sorting, multi-dimensional (Par [[0011, 0029, 0046]]).
Balusani and Perry do not explicitly disclose splitting, based on a splitting factor and using the second primitive, the sorting axis to obtain an inner axis and an outer axis; and sorting, based on a first length of the inner axis and a second length of the outer axis and using the third primitive, the multi-dimensional data to obtain a sorting axis.
However, Bozier discloses splitting, based on a splitting factor and using the second primitive, the sorting axis to obtain an inner axis and an outer axis; and sorting, based on a first length of the inner axis and a second length of the outer axis and using the third primitive, the multi-dimensional data to obtain a sorting axis (par [0117-0123]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Bozier into the teachings of Balusani as modified by Perry in order to improve performance and lower memory usage (Par [0118]).
As per claim 5, Balusani discloses the method of claim 4, further sorting the data by sorting the M data blocks to obtain sorted M data blocks, wherein M is a positive integer greater than or equal to 2 (Par [0024-0027] and fig 2A-2B).
Balusani does not explicitly disclose the multi-dimensional data, wherein M is a positive integer greater than or equal to 2.
However, Perry discloses the multi-dimensional data, wherein M is a positive integer greater than or equal to 2 (Par [0025]);
result of the multi- dimensional data (Par [0041, 0043, 0046-0047]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Perry into the teachings of Balusani in order to improve system (Par [0043]).
Balusani and Perry do not explicitly disclose wherein the sorting axis corresponds to M data blocks, wherein a data amount comprised in each data block in the M data blocks is equal to the first length and the splitting factor, wherein the second length is equal to M. and wherein the method further comprises: performing merge sorting on the sorted M data blocks to obtain a sorting.
However, Bozier discloses wherein the sorting axis corresponds to M data blocks, wherein a data amount comprised in each data block in the M data blocks is equal to the first length and the splitting factor, wherein the second length is equal to M. and wherein the method further comprises: performing merge sorting on the sorted M data blocks to obtain a sorting (par [0117-0123]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Bozier into the teachings of Balusani as modified by Perry in order to improve performance and lower memory usage (Par [0118]).
As per claim 6, Perry discloses the method of claim 5, wherein corresponding to the scheduling policy comprises a first code block and a second code block, wherein the first code block comprises a first for loop statement that is for sorting the M data blocks, and wherein the second code block comprises a second for loop statement that is for performing the merge sorting (Par [0041, 0043, 0046-0047]).
Balusani and Perry do not explicitly disclose an intermediate representation (IR); for performing the merge sorting.
However, Bozier discloses an intermediate representation (IR); for performing the merge sorting (par [0117-0123]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Bozier into the teachings of Balusani as modified by Perry in order to improve performance and lower memory usage (Par [0118]).
As per claim 7, Perry discloses the method of claim 5, further comprising: further sorting the M data blocks based on a first instruction mapping label; and further performing the merge sorting based on a second instruction mapping label (Par [0041, 0043, 0046-0047]).
Balusani and Perry do not explicitly disclose an intermediate representation (IR); for performing the merge sorting.
However, Bozier discloses an intermediate representation (IR); for performing the merge sorting (par [0117-0123]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Bozier into the teachings of Balusani as modified by Perry in order to improve performance and lower memory usage (Par [0118]).
As per claim 11, Perry discloses the encoding apparatus of claim 9, wherein the scheduling policy comprises a second primitive and a third primitive, and wherein the method further comprises: sorting, multi-dimensional (Par [[0011, 0029, 0046]]).
Balusani and Perry do not explicitly disclose splitting, based on a splitting factor and using the second primitive, the sorting axis to obtain an inner axis and an outer axis; and sorting, based on a first length of the inner axis and a second length of the outer axis and using the third primitive, the multi-dimensional data to obtain a sorting axis.
However, Bozier discloses splitting, based on a splitting factor and using the second primitive, the sorting axis to obtain an inner axis and an outer axis; and sorting, based on a first length of the inner axis and a second length of the outer axis and using the third primitive, the multi-dimensional data to obtain a sorting axis (par [0117-0123]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Bozier into the teachings of Balusani as modified by Perry in order to improve performance and lower memory usage (Par [0118]).
As per claim 12, Balusani discloses the encoding apparatus of claim 11, further sorting the data by sorting the M data blocks to obtain sorted M data blocks, wherein M is a positive integer greater than or equal to 2 (Par [0024-0027] and fig 2A-2B).
Balusani does not explicitly disclose the multi-dimensional data, wherein M is a positive integer greater than or equal to 2.
However, Perry discloses the multi-dimensional data, wherein M is a positive integer greater than or equal to 2 (Par [0025]);
result of the multi- dimensional data (Par [0041, 0043, 0046-0047]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Perry into the teachings of Balusani in order to improve system (Par [0043]).
Balusani and Perry do not explicitly disclose wherein the sorting axis corresponds to M data blocks, wherein a data amount comprised in each data block in the M data blocks is equal to the first length and the splitting factor, wherein the second length is equal to M. and wherein the method further comprises: performing merge sorting on the sorted M data blocks to obtain a sorting.
However, Bozier discloses wherein the sorting axis corresponds to M data blocks, wherein a data amount comprised in each data block in the M data blocks is equal to the first length and the splitting factor, wherein the second length is equal to M. and wherein the method further comprises: performing merge sorting on the sorted M data blocks to obtain a sorting (par [0117-0123]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Bozier into the teachings of Balusani as modified by Perry in order to improve performance and lower memory usage (Par [0118]).
As per claim 13, Perry discloses the encoding apparatus of claim 12, wherein corresponding to the scheduling policy comprises a first code block and a second code block, wherein the first code block comprises a first for loop statement that is configured to sort the M data blocks, and wherein the second code block comprises a second for loop statement that is configured to perform the merge sorting (Par [0041, 0043, 0046-0047]).
Balusani and Perry do not explicitly disclose an intermediate representation (IR); for performing the merge sorting.
However, Bozier discloses an intermediate representation (IR); for performing the merge sorting (par [0117-0123]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Bozier into the teachings of Balusani as modified by Perry in order to improve performance and lower memory usage (Par [0118]).
As per claim 14, Perry discloses the encoding apparatus of claim 12, wherein the compiler is further configured to: sort the M data blocks based on a first correspondence to a first instruction mapping label; and merge sort based on a second correspondence to a second instruction mapping label (Par [0041, 0043, 0046-0047]).
Balusani and Perry do not explicitly disclose an intermediate representation (IR); for performing the merge sorting.
However, an intermediate representation (IR); for performing the merge sorting (par [0117-0123]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Bozier into the teachings of Balusani as modified by Perry in order to improve performance and lower memory usage (Par [0118]).
As per claim 18, Perry discloses the chip system of claim 16, wherein the scheduling policy comprises a second primitive and a third primitive, and wherein the at least one processor is further configured to execute the instructions to cause the chip system to: sorting, multi-dimensional (Par [[0011, 0029, 0046]]).
Balusani and Perry do not explicitly disclose splitting, based on a splitting factor and using the second primitive, the sorting axis to obtain an inner axis and an outer axis; and sorting, based on a first length of the inner axis and a second length of the outer axis and using the third primitive, the multi-dimensional data to obtain a sorting axis.
However, Bozier discloses splitting, based on a splitting factor and using the second primitive, the sorting axis to obtain an inner axis and an outer axis; and sorting, based on a first length of the inner axis and a second length of the outer axis and using the third primitive, the multi-dimensional data to obtain a sorting axis (par [0117-0123]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Bozier into the teachings of Balusani as modified by Perry in order to improve performance and lower memory usage (Par [0118]).
As per claim 19, Perry discloses the chip system of claim 18, wherein the sorting axis corresponds to M data blocks, wherein a data amount comprised in each data block in the M data blocks is equal to a length of the inner axis and the splitting factor, wherein the second length is equal to M, and wherein the at least one processor is further configured to execute the instructions to cause the chip system to:
sort the multi-dimensional data by sorting the M data blocks separately to obtain sorted M data blocks, wherein M is a positive integer greater than or equal to 2, and
perform merge sorting on the sorted M data blocks to obtain a sorting result of the multi-
dimensional data.
As per claim 20, Perry discloses the chip system of claim 19, wherein corresponding to the scheduling policy comprises a first code block and a second code block, wherein the first code block comprises a first for loop statement that is configured to sort the M data blocks, and wherein the second code block comprises a second for loop statement that is configured to perform the sorting (Par [0041, 0043, 0046-0047]).
Balusani and Perry do not explicitly disclose an intermediate representation (IR); for performing the merge sorting.
However, Bonzier discloses an intermediate representation (IR); for performing the merge sorting (par [0117-0123]).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to incorporate the features as disclosed in Bozier into the teachings of Balusani as modified by Perry in order to improve performance and lower memory usage (Par [0118]).
Conclusion
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June 18, 2026
/THU N NGUYEN/Examiner, Art Unit 2154
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