Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
The instant detailed action is in response to Applicant's submission filed on 26 June 2025.
REJECTIONS NOT BASED ON PRIOR ART
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1-20 of U.S. Patent No. 11494122. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the present application encompass the subject matter of the claims of the patent.
Claim 1/9/17
11494122: Claim 15
A method, comprising:
A method for command queuing, comprising:
identifying and sending, by a host, a first command to be queued at a memory device;
sending, by a host device to a memory system, a request to add a first command to a command queue of the memory system;
receiving, by the host, a response to the first command from the memory device;
receiving, by the host device from the memory system, a response to the request to add the first command to the command queue, wherein the response includes a first queue busy bit that indicates whether the memory system is ready to receive, from the host device, commands in the command queue;
sending, by the host, a second command to the memory device in response to receiving the response to the first command;
sending, by the host device to the memory system, a request to add a second command to the command queue of the memory system;
sending, by the host, a third command to execute a data transaction after sending the second command to the memory device;
receiving, by the host device from the memory system, a response to the request to add the second command to the command queue, wherein the response includes a second queue busy bit that indicates whether the memory system is ready to receive, from the host device, commands in the command queue;
receiving, by the host, a response to the third command from memory device, wherein the response to the third command includes an indication that the data transaction is either a read or a write; and
[receiving, by the host device from the memory system, a response to the request to add the second command to the command queue, wherein the response includes a second queue busy bit that indicates whether the memory system is ready to receive, from the host device, commands in the command queue;]
transferring data to or reading data from memory device in response to receiving the response to the third command from the memory device.
[placing, by the memory system, in response to the host device sending the second command descriptor block to the memory system, the second command in the command queue of the memory system while concurrently executing the first command on a data bus.]
The claims of the instant application are anticipated by the limitations of the patent claims because the patent claims identically disclose receiving a plurality of commands, where placing a command descriptor block constitutes transferring data to or reading data from memory device in response to receiving a response to a co-pending command. While the application claims recite a third command and a third response the patent claims do not preclude sending and receiving a third and subsequent commands following the second command as recited in the claims.
Claim 1-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1-20 of U.S. Patent No. 11954370. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the present application encompass the subject matter of the claims in the patent.
Claim 1/9/17
11954370: Claim 1/15/18
A method, comprising:
A method for command queuing, comprising:
identifying and sending, by a host, a first command to be queued at a memory device;
identifying and sending, by a host, a first command to be queued at a memory device;
receiving, by the host, a response to the first command from the memory device;
receiving, by the host, a first response to the first command from memory device indicating a command queue on the memory device is ready to receive commands;
sending, by the host, a second command to the memory device in response to receiving the response to the first command;
sending, by the host, a second command to the memory device in response to receiving the first response;
sending, from the memory device to the host, a second response to the second command from memory device;
receiving, by the host, a second response to the second command from memory device;
sending, by the host, a third command to execute a data transaction after sending the second command to the memory device;
sending, by the host, a third command to execute a data transaction in response to receiving the first response and the second response;
receiving, by the host, a response to the third command from memory device, wherein the response to the third command includes an indication that the data transaction is either a read or a write; and
receiving, by the host, a third response to the third command from memory device; and
transferring data to or reading data from memory device in response to receiving the response to the third command from the memory device.
transferring data to or reading data from memory device in response to receiving the third response from memory device.
Claim 1-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1-20 of U.S. Patent No. 12366996. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the present application are complimentary to the claims of the patent, where the claims of the application recite sending opposite the claims of the patent that recite receiving.
Claim 1/9/17
12366996: Claim 1/15/18
A method, comprising:
A method for command queuing, comprising:
identifying and sending, by a host, a first command to be queued at a memory device;
receiving, at a memory device from a host, a first command to be queued at the memory device;
receiving, by the host, a response to the first command from the memory device;
sending, from the memory device to the host, a first response to the first command;
sending, by the host, a second command to the memory device in response to receiving the response to the first command;
receiving, at the memory device from the host, a second command in response to receiving the first response;
sending, by the host, a third command to execute a data transaction after sending the second command to the memory device;
sending, from the memory device to the host, a second response to the second command from memory device;
receiving, by the host, a response to the third command from memory device, wherein the response to the third command includes an indication that the data transaction is either a read or a write; and
receiving, by the memory device from the host, a third command to execute a data transaction in response to receiving the first response and the second response;
sending, from the memory device to the host, a third response to the third command based on a direction of data transfer indicated by the first and second commands; and
transferring data to or reading data from memory device in response to receiving the response to the third command from the memory device.
transferring data to or reading data from memory device in response to sending the third response.
REJECTIONS BASED ON PRIOR ART
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1, 3-9,11-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shin (US PG PUB No. 2015/0199137) in view of Chung (US PG PUB No. 2014/0089568)
As per claim [1,9,17], a method, comprising:
identifying and sending, by a host, a first command to be queued at a memory device (see Shin FIG 4: S110 and [0051]);
receiving, by the host, a response to the first command from the memory device (see Shin FIG 4: S140 and [0059]);
sending, by the host, a second command to the memory device in response to receiving the response to the first command (see Shin FIG 4: S150 and [0064]);
sending, by the host, a third command to execute a data transaction after sending the second command to the memory device (see Shin [0066]);
receiving, by the host, a response to the third command from memory device,
transferring data to or reading data from memory device in response to receiving the response to the third command from the memory device (see Shin FIG 4: S195 and [0073]).
[Shin discloses successively sending commands in response to receiving a response to the commands.]
However, Shin does not expressly disclose but in the same field of endeavor Chung discloses
wherein the response to the third command includes an indication that the data transaction is either a read or a write (see Chung FIG 8A and [0065]); and
It would have been obvious before the effective filing date of the invention to further implement a response as taught by Chung.
The suggestion/motivation for doing so would have been for the benefit of a multi queue operation (see Chung [0103]-[0104]).
Therefore it would have been obvious before the effective filing date of the invention to modify Shin to further send a response as taught by Chung for the benefit of multi queue operation to arrive at the invention as specified in the claims.
As per claim [3, 11], the method of claim 1,
wherein the second command comprises a command descriptor including a command operation indicator that identifies the data transaction as either a read or a write (see Shin [0063]).
As per claim [4, 12, 18], the method of claim 1,
wherein the second command comprises a command descriptor with a unique identifier for the second command (see Shin [0062]).
As per claim [5, 13, 19], the method of claim 1,
wherein the response to the third command comprises a command descriptor having a command task tag with the unique identifier (see Shin [0062]).
As per claim [6, 14], the method of claim 1,
wherein the second command comprises a command descriptor with a command starting address (see Shin [0062]).
As per claim [7, 15, 20], the method of claim 1,
further including resending the first command, by the host, until the host receives the response to the first command from the memory device (see Shin [0074]).
As per claim [8,16], the method of claim 1,
further including determining, by the host, a status of each command in a command queue by checking a status register in the memory device (see Shin FIG 4: S130 and [0059]).
Claim 2, 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shin (US PG PUB No. 2015/0199137) in view of Chung (US PG PUB No. 2014/0089568) as applied to claim 1 and 9 above and further in view of Brewer (US PG PUB No. 20060253621)
As per claim [2,9], the method of claim 1,
However, Shin does not expressly disclose but in the same field of endeavor Brewer discloses
wherein the second command comprises a command descriptor with command priority (see Brewer [0061]).
It would have been obvious before the effective filing date of the invention to further implement a command priority in a command descriptor block.
The suggestion/motivation for doing so would have been for the benefit of prioritizing commands (See Brewer [0061])
Therefore it would have been obvious before the effective fling date of the invention to further modify the command descriptor block as taught by Shin to include command priority for the benefit of prioritizing commands to arrive at the invention as specified in the claims.
CONCLUSION
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. 20140082250 : An eMMC includes flash memory including an extended card specific data (CSD) register (“EXT_CSD register”), and an eMMC controller that controls operation of the flash memory. The eMMC controller is receives a clock from a host via a clock line, receives a SEND_EXT_CSD command from the host via a command line, and provides the host with eMMC information stored in the EXT_CSD register via a data bus in response to the SEND_EXT_CSD command, the eMMC information including maximum operating frequency information for the eMMC (Abstract).
DIRECTION OF FUTURE CORRESPONDENCES
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KALPIT PARIKH whose telephone number is (571)270-1173. The examiner can normally be reached MON THROUGH FRI 9:30 TO 6:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan Savla can be reached on 571-272-1077. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/KALPIT PARIKH/
Primary Examiner, Art Unit 2137
KALPIT . PARIKH
Primary Examiner
Art Unit 2137
Prosecution Insights