DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5-9, and 16-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Coteus et al. (2007/0286078).
Regarding claim 1:
Coteus teaches:
A method, comprising:
transmitting, over a bus, a command to access data from a location of a memory device [par 20-22 – reads are requested to memory devices in the form of read commands, these commands are transferred over a bus, i.e. the memory channel];
receiving, over the bus based at least in part on transmitting the command, a signal of a first type comprising first data [par 32, 33 – data packets sent over lanes of the signal lanes of the memory channel] and
a signal of a second type comprising an indication that the bus is in an idle state [par 33, 34 – a particular signal lane is used to transmit the start frame indicator, and the logic value of this indicator signifies whether the bus is idle or active]; and
discarding the first data obtained from the signal of the first type based at least in part on receiving the indication that the bus is in the idle state [par 32, 36, 38 – invalid frames are discarded].
Regarding claim 2:
Coteus teaches:
The method of claim 1, further comprising: sampling one or more data lines of the bus during a plurality of intervals to receive subsets of the first data based at least in part on receiving the signal of the first type [par 31, 33 – transmission is done in multiple transfers and therefore multiple subsets].
Regarding claim 3:
Coteus teaches:
The method of claim 2, wherein each subset of the first data is received in a respective interval of the plurality of intervals [par 31, 33].
Regarding claim 5:
Coteus teaches:
The method of claim 1, further comprising: determining that the signal of the second type has a first logic value based at least in part on receiving the signal of the second type [par 32-34 – the logic value of the indicator signifies the bus state].
Regarding claim 6:
Coteus teaches:
The method of claim 5, further comprising: determining that the bus is in the idle state based at least in part on the signal of the second type having the first logic value, wherein discarding the first data is based at least in part on determining that the bus is in the idle state [par 32-34].
Regarding claim 7:
Coteus teaches:
The method of claim 1, further comprising:
transmitting, over a bus, a second command to access second data from the location of the memory device [par 20-22]; and
receiving, over the bus based at least in part on transmitting the second command, a second signal of the first type comprising the second data [par 32, 33] and
a second signal of the second type comprising an indication that the bus is in an active state [par 32, 33].
The examiner notes that the described process occurs for each read command in the system of Coteus and the disclosure is not limited to a one time event of transmitting a read command and receiving signal in response. Thus it is necessarily true that Coteus teaches a second of each of the command and the signal types. The
Regarding claim 8:
Coteus teaches:
The method of claim 7, further comprising: determining that the second signal of the second type has a second logic value based at least in part on receiving the second signal of the second type [par 32-34].
Regarding claim 9:
Coteus teaches:
The method of claim 8, further comprising: determining that the bus is in the active state based at least in part on the second signal of the second type having the second logic value [par 32-34].
Regarding claim 16:
Coteus teaches:
An apparatus, comprising:
a memory array [fig 1-3, par 20, 63] – memory devices;
a controller coupled with the memory array and configured to transmit, over a bus that is coupled with the memory array, a signal of a first type for communicating data based at least in part on a request for data in the memory array [fig 1,2; par 32-34]; and
a circuit coupled with the memory array and the controller [fig 3; par 24] and configured to:
receive the request for data in the memory array [par 20-22, 24]; and
transmit, over the bus and based at least in part on receiving the request, a signal of a second type that is set to a first logic value when the bus is in an idle state or to a second logic value when the bus is in an active state [par 31-34].
Regarding claim 17:
Coteus teaches:
The apparatus of claim 16, further comprising: a pin coupled with the circuit and the bus, wherein the pin is configured to have the first logic value when the bus is in the idle state [par 67].
Regarding claim 18:
Coteus teaches:
The apparatus of claim 16, further comprising: a transmission line coupled with the circuit and associated with communicating indications of whether signals of the first type are associated with one or more errors [par 36, 38].
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-4, 7, 10-14 and 16-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 12-14, 16, and 18-20 of U.S. Patent No. 11983433. Although the claims at issue are not identical, they are not patentably distinct from each other because the ‘433 claims contain all teachings of the instant claims and thus anticipate the instant claims.
The independent claims are exemplary:
Claim 1:
Instant claim 1
‘433 claim 18
Explanation as needed:
A method, comprising:
A method, comprising:
identical
transmitting, over a bus, a command to access data from a location of a memory device;
transmitting, by a host device over a bus that is coupled with the host device and a memory device, a request for data to the memory device;
A request for data transmitted to a memory device is command to access data from a memory device location
receiving, over the bus based at least in part on transmitting the command, a signal of a first type comprising first data and a signal of a second type comprising an indication that the bus is in an idle state; and
decoding, by the memory device, the request transmitted by the host device, wherein a signal of a first type comprising invalid data and a signal of a second type both result on the bus based at least in part on the request comprising an error, the signal of the second type indicating that the bus is in an idle state;
The bus is used for transmitting data, and a first type signal and second type signal appearing on the bus mean the signals are available. Further, the host device decodes the second signal and obtains data from the first signal later in the claim, thus it necessarily receives them
discarding the first data obtained from the signal of the first type based at least in part on receiving the indication that the bus is in the idle state.
decoding, by the host device while the bus is in the idle state, the signal of the second type based at least in part on the request comprising the error;
Discards invalid data based on idle bus state
and discarding the invalid data obtained from the signal of the first type based at least in part on determining, from decoding the signal of the second type, that the bus is in the idle state.
Claim 10:
Instant claim 10
‘433 claim 12
Explanation as needed
A method, comprising:
A method, comprising:
Identical
receiving, over a bus, a signal of a first type comprising first data and a signal of a second type comprising an indication that the bus is in an idle state;
receiving, over a bus in an idle state, a signal of a first type comprising invalid data and a signal of a second type comprising an indication that the bus is in the idle state:
decoding the signal of the second type based at least in part on receiving the signal of the first type and the signal of the second type;
Not present in instant claim
discarding the first data obtained from the signal of the first type based at least in part on determining, from receiving the signal of the second type, that the bus is in the idle state;
discarding the invalid data obtained from the signal of the first type based at least in part on determining, from decoding the signal of the second type, that the bus is in the idle state:
Instant claim eliminates some recited elements
receiving, over the bus, a second signal of the first type comprising second data and a second signal of the second type comprising a second indication that the bus is in an active state;
receiving, while the bus is in an active state and after receiving the signal of the first type, a second signal of the first type comprising data and a second signal of the second type comprising a second indication that the bus is in the active state, wherein receiving the second signal of the second type comprises receiving the second signal of the second type over a control line of the bus in an initial interval of a data input operation;
Instant claim eliminates some elements
receiving, over a control line, a signal of a third type that indicates whether the second signal of the first type is associated with one or more errors; and
receiving, over the control line in a second interval of the data input operation that directly follows the initial interval, a signal of a third type that indicates whether the second signal of the first type is associated with one or more errors;
Instant claim eliminates some elements
decoding the second signal of the second type based at least in part on receiving the second signal of the first type and the second signal of the second type;
obtaining the second data based at least in part on the second indication that the bus is in the active state and the signal of the third type
and decoding the second signal of the first type based at least in part on determining, from decoding the signal of the second type, that the bus is in the active state.
Decoding the first type signal results in obtaining data
Claim 16:
Instant claim 16:
‘433 claim 13
Explanation as needed
An apparatus, comprising:
An apparatus, comprising:
identical
a memory array;
a memory array;
identical
a controller coupled with the memory array and configured to transmit, over a bus that is coupled with the memory array, a signal of a first type for communicating data based at least in part on a request for data in the memory array;
a controller coupled with the memory array and configured to transmit, over a bus that is coupled with the memory array, a signal of a first type for communicating data based at least in part on a request for data in the memory array;
identical
and a circuit coupled with the memory array and the controller and configured to:
a circuit coupled with the memory array and the controller and configured to:
identical
receive the request for data in the memory array; and transmit, over the bus and based at least in part on receiving the request, a signal of a second type that is set to a first logic value when the bus is in an idle state or to a second logic value when the bus is in an active state.
set a signal of a second type to a first logic value when the bus is in an idle state or to a second logic value when the bus is in an active state, or both, and transmit, over the bus, the signal of the second type based at least in part on setting the signal of the second type to the first logic value or the second logic value;
The actions in the claim occur based on the request for data, thus the receipt of the request for data by the circuit is inherent to claimed method steps
and a pin coupled with the circuit and the bus, wherein the pin is configured to have the first logic value when the bus is in the idle state.
Claims 1 and 5-9 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 7-9 of U.S. Patent No. 12373132 in view of Coteus.
A comparison of instant claim 1 and ‘132 claim 7 is below:
Instant claim 1
‘132 claim 7
Explanation as needed
A method, comprising:
A method, comprising:
Identical
transmitting, over a bus, a command to access data from a location of a memory device;
transmitting, over a bus, a first request for data;
Missing teaching that a first request for data is a command to access data from a location of a memory device
receiving, over the bus based at least in part on transmitting the command, a signal of a first type comprising first data and a signal of a second type comprising an indication that the bus is in an idle state;
receiving, over the bus and based at least in part on the first request, a first signal comprising invalid data and a second signal indicating that the bus is in an idle state;
First and second signals contain completely different information and are necessarily of different types
and discarding the first data obtained from the signal of the first type based at least in part on receiving the indication that the bus is in the idle state.
discarding the invalid data based at least in part on the second signal indicating that the bus is in the idle state;
The invalid data is contained in the signal of the first type and is necessarily obtained from that signal
and transmitting, over the bus, a second request for the data based at least in part on discarding the invalid data
The ‘132 claim does not explicitly teach that a first request for data is a command to access data from a location of a memory device.
Coteus teaches that a first request for data is a command to access data from a location of a memory device [par 20-22].
It would have been obvious to one of ordinary skill in the art prior to the effective filing date to combine the request for data transmitted via a bus of the ‘132 patent with the command to access data from a location of a memory device of Coteus because the ‘132 patent is silent regarding the environment in which the method of the claim operates, creating an inherent need for such detail. Coteus provides an environment in which a transmission of a request for data operates.
Allowable Subject Matter
Claim 15 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The examiner notes that claims 4, 10-14, 19 and 20 are rejected only under non-statutory double patenting. If the non-statutory double patenting rejections were obviated claims 10-15 would be allowed. Claims 4, 19 and 20 would be objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARC M DUNCAN whose telephone number is (571)272-3646. The examiner can normally be reached M-F: 730am-9am, 10am-4:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bryce Bonzo can be reached at 571-272-3655. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MARC DUNCAN/Primary Examiner, Art Unit 2113
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