DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5, and 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Pub. No. 2022/0122540 by Choi et al. (“Choi”).
As to claim 1, Choi discloses a display apparatus (Choi, display device 100, Figure 1), comprising:
a plurality of pixel driving circuits (Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187]) and at least one dummy pixel driving circuit (Choi, at least one dummy subpixel SP_dmy disposed in the non-active area NA, Figure 12, ¶ [0188]) disposed apart from each other on a substrate;
a plurality of driving wires disposed corresponding to the plurality of pixel driving circuits (Choi, The driving data voltage supply unit 131 may supply a driving data voltage Vdata_dry to a plurality of light emitting subpixels SP_emt disposed in the active area AA during a display driving period. Figure 12, ¶ [0187]); The driving data voltage supply unit 131 connects to the plurality of light emitting subpixels SP_emt by a plurality of driving wires.
a test wire electrically connected to the dummy pixel driving circuit (Choi, The dummy data voltage supply unit 132 may supply a dummy data voltage Vdata_dmy larger than the driving data voltage Vdata_dry to at least one dummy subpixel SP_dmy disposed in the non-active area NA during the display driving period. The dummy data voltage supply unit 132 may supply a sensing data voltage Vdata_sen to the dummy subpixel SP_dmy during a degree-of-degradation sensing period. Figure 12, ¶ [0188]).
As to claim 2, Choi discloses the display apparatus wherein the plurality of driving wires and the test wire are electrically separated (Choi, The driving data voltage supply unit 131 may supply a driving data voltage Vdata_dry to a plurality of light emitting subpixels SP_emt disposed in the active area AA during a display driving period. Figure 12, ¶ [0187]) (Choi, The dummy data voltage supply unit 132 may supply a dummy data voltage Vdata_dmy larger than the driving data voltage Vdata_dry to at least one dummy subpixel SP_dmy disposed in the non-active area NA during the display driving period. The dummy data voltage supply unit 132 may supply a sensing data voltage Vdata_sen to the dummy subpixel SP_dmy during a degree-of-degradation sensing period. Figure 12, ¶ [0188]). As shown in figure 12 of Choi, the driving wires and the test wire are electrically separate.
As to claim 3, Choi discloses the display apparatus further comprising:
light-emitting elements disposed on the substrate (Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187])(Choi, he modeling transistor MOT included in the dummy subpixel SP_dmy is disposed on the same substrate as the driving transistor DRT included in the light emitting subpixel SP_emt through the same process, the modeling transistor MOT may have properties similar to those of the driving transistor DRT. ¶ [0096]),
wherein the substrate includes a display area (Choi, active area AA, Figure 12) where the light-emitting elements are disposed and a non-display area (Choi, non-active area NA, Figure 12) around the display area,
wherein the pixel driving circuits are disposed in the display area (Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187]), and
wherein the dummy pixel driving circuit is disposed in the non-display area (Choi, The dummy data voltage supply unit 132 may supply a dummy data voltage Vdata_dmy larger than the driving data voltage Vdata_dry to at least one dummy subpixel SP_dmy disposed in the non-active area NA during the display driving period. Figure 12, ¶ [0188]).
As to claim 5, Choi discloses the display apparatus wherein the test wire is disposed toward an outside of the pixel driving circuits (Choi, The dummy data voltage supply unit 132 may supply a dummy data voltage Vdata_dmy larger than the driving data voltage Vdata_dry to at least one dummy subpixel SP_dmy disposed in the non-active area NA during the display driving period. The dummy data voltage supply unit 132 may supply a sensing data voltage Vdata_sen to the dummy subpixel SP_dmy during a degree-of-degradation sensing period. Figure 12, ¶ [0188]). As shown in figure 12 of Choi, the wire connected to the dummy subpixel SP_dmy is disposed on the outside of the active area AA (where the light emitting subpixels are located).
As to claim 8, Choi discloses the display apparatus wherein the test wire includes a first test wire (Choi, wire from dummy data voltage supply unit 132, Figure 12) and a second test wire (Choi, wire from sensing unit 133, Figure 12) connected to the at least one dummy pixel driving circuit (Choi, The dummy data voltage supply unit 132 may supply a dummy data voltage Vdata_dmy larger than the driving data voltage Vdata_dry to at least one dummy subpixel SP_dmy disposed in the non-active area NA during the display driving period. The dummy data voltage supply unit 132 may supply a sensing data voltage Vdata_sen to the dummy subpixel SP_dmy during a degree-of-degradation sensing period. Figure 12, ¶ [0188]) (Choi, The sensing unit 133 may sense the degree of degradation of the modeling transistor MOT included in the dummy subpixel SP_dmy during the degree-of-degradation sensing period. Figure 12, ¶ [0189]).
Inventorship
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pub. No. 2022/0122540 by Choi et al. (“Choi”) in view of U.S. Pub. No. 2019/0096978 by Jung et al. (“Jung”).
As to claim 4, Choi does not expressly disclose the display apparatus wherein the non-display area includes a first area and a second area, and
wherein the second area includes a curved section.
Jung teaches a display device wherein the non-display area includes a first area (NA1) and a second area (NA2) (Jung, Referring to FIG. 1, the display device 10 in accordance with the present embodiment may include the pixel areas AA1, AA2, and AA3, peripheral areas NA1, NA2, and NA3, and pixels PXL1, PXL2, and PXL3. Figure 1, ¶ [0043]), and
wherein the second area includes a curved section (Jung, the second peripheral area NA2 may have on at least a portion thereof a curved shape corresponding to the second pixel area AA2. Figure 1, ¶ [0085]).
At the time before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify Choi’s display device to include Jung’s curved display device because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Choi’s display device is comparable to Jung’s curved display device because both are directed to a display device. Therefore, it is within the capabilities of one of ordinary skill in the art to modify Choi’s display device to include Jung’s curved display device with the predictable result of providing a curved shaped display device for a more comfortable form factor.
Thus, Choi, as modified by Jung, teaches the multiple peripheral areas wherein one peripheral area is curved.
Claims 6, 7, 9-13, and 24-32 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pub. No. 2022/0122540 by Choi et al. (“Choi”) in view of U.S. Pub. No. 2019/0348478 by Kim et al. (“Kim”).
As to claim 6, Choi does not expressly disclose the display apparatus wherein an end portion of the test wire is exposed.
Kim discloses a display device and method for testing display device wherein an end portion of the test wire is exposed (Kim, An upper surface of the first test pad P1 may be at least partially exposed in order to be in contact with a first connection pad C1, Figure 6, ¶ [0091])(Kim, FIG. 6 is a view showing the layout of a display device according to another exemplary embodiment of the present disclosure. Referring to FIG. 6, in an exemplary embodiment, a plurality of dummy thin-film transistors may be in the non-display area NDA. Figure 6, ¶ [0104]). Kim teaches dummy TFTs which have connection pads (test wire) which are at least partially exposed.
At the time before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify Choi’s dummy pixel connection wire to include Kim’s dummy TFT connection pads because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Kim’s dummy TFT connection pads is comparable to Choi’s dummy pixel connection wire because both provide connections for dummy TFTs in a display device. Therefore, it is within the capabilities of one of ordinary skill in the art to modify Choi’s dummy pixel connection wire to include Kim’s dummy TFT connection pads with the predictable result of providing additional connection potential in order to provide improved connection position flexibility.
Thus, Choi, as modified by Kim, teaches the connection pads which are exposed on one end.
As to claim 7, Choi, as modified by Kim, teaches the display apparatus further comprising:
a protection layer that covers the end portion of the test wire disposed on the substrate (Kim, An upper surface of the first test pad P1 may be at least partially exposed in order to be in contact with a first connection pad C1, Figure 6, ¶ [0091]). The pad P1 is partially covered. Kim teaches the test circuit film TFPC, as shown in figure 10 and ¶ [0127], additionally covers the pad P1 with a first connection pad C1. In addition, the motivation used is the same as in the rejection of claim 6.
As to claim 9, Choi does not expressly disclose the display apparatus wherein the dummy pixel driving circuit includes a first dummy pixel driving circuit and a second dummy pixel driving circuit disposed adjacent to each other,
wherein the test wire includes a first test wire connected to the first dummy pixel driving circuit and a second test wire connected to the second dummy pixel driving circuit, and
wherein the display apparatus further comprises a test connection wire that connects the first dummy pixel driving circuit and the second dummy pixel driving circuit.
Kim discloses a display device and method for testing display device wherein the dummy pixel driving circuit includes a first dummy pixel driving circuit (Kim, first dummy thin-film transistor DT1, Figure 6) and a second dummy pixel driving circuit (Kim, second dummy thin-film transistor DT2, Figure 6) disposed adjacent to each other, As shown in figure 6 of Kim, the first and second dummy TFTs are adjacent on the left non-display area NDA_L.
wherein the test wire includes a first test wire (Kim, first line L1 with first test pad P1, Figure 6) connected to the first dummy pixel driving circuit (Kim, first dummy thin-film transistor DT1, Figure 6) and a second test wire (Kim, fourth line L4 with fourth test pad P4, Figure 6) connected to the second dummy pixel driving circuit (Kim, second dummy thin-film transistor DT2, Figure 6), and
wherein the display apparatus further comprises a test connection wire (Kim, lines L1-L6 and pads P1-P6, Figure 6) that connects the first dummy pixel driving circuit and the second dummy pixel driving circuit (Kim, the test circuit film TFPC may be connected to the printed circuit board PCB by a connector 600. The connector 600 may electrically and mechanically connect the test circuit film TFPC with the printed circuit board PCB. Figure 10, ¶ [0129]). The PCB connects to each of the dummy TFTs via a connector 600.
At the time before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify Choi’s dummy pixel connection wire to include Kim’s dummy TFT connection pads because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Kim’s dummy TFT connection pads is comparable to Choi’s dummy pixel connection wire because both provide connections for dummy TFTs in a display device. Therefore, it is within the capabilities of one of ordinary skill in the art to modify Choi’s dummy pixel connection wire to include Kim’s dummy TFT connection pads with the predictable result of providing additional connection potential in order to provide improved connection position flexibility.
Thus, Choi, as modified by Kim, teaches the first and second dummy pixels connected to a test circuit film and PCB.
As to claim 10, Choi, as modified by Kim, teaches the display apparatus further comprising:
light-emitting elements disposed on the substrate (Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187])(Choi, he modeling transistor MOT included in the dummy subpixel SP_dmy is disposed on the same substrate as the driving transistor DRT included in the light emitting subpixel SP_emt through the same process, the modeling transistor MOT may have properties similar to those of the driving transistor DRT. ¶ [0096]),
wherein the substrate includes a display area (Choi, active area AA, Figure 12) where the light-emitting elements are disposed and a non-display area (Choi, non-active area NA, Figure 12) around the display area, and
wherein the test connection wire is disposed in the non-display area (Kim, lines L1-L6 and pads P1-P6, Figure 6). In addition, the motivation used is the same as in the rejection of claim 9.
As to claim 11, Choi does not expressly disclose the display apparatus wherein the dummy pixel driving circuit includes a first dummy pixel driving circuit and a second dummy pixel driving circuit disposed adjacent to each other, and
wherein the display apparatus further comprises a first test wire and a first test connection wire connected to the first dummy pixel driving circuit, and a second test wire and a second test connection wire connected to the second dummy pixel driving circuit.
Kim discloses a display device and method for testing display device wherein the dummy pixel driving circuit includes a first dummy pixel driving circuit (Kim, first dummy thin-film transistor DT1, Figure 6) and a second dummy pixel driving circuit (Kim, second dummy thin-film transistor DT2, Figure 6) disposed adjacent to each other, As shown in figure 6 of Kim, the first and second dummy TFTs are adjacent on the left non-display area NDA_L.
wherein the display apparatus further comprises a first test wire (Kim, first test pad P1, Figure 6) and a first test connection wire (Kim, first line L1, Figure 6) connected to the first dummy pixel driving circuit (Kim, first dummy thin-film transistor DT1, Figure 6), and a second test wire (Kim, fourth test pad P4, Figure 6) and a second test connection wire (Kim, fourth line L4, Figure 6) connected to the second dummy pixel driving circuit (Kim, second dummy thin-film transistor DT2, Figure 6).
At the time before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify Choi’s dummy pixel connection wire to include Kim’s dummy TFT connection pads because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Kim’s dummy TFT connection pads is comparable to Choi’s dummy pixel connection wire because both provide connections for dummy TFTs in a display device. Therefore, it is within the capabilities of one of ordinary skill in the art to modify Choi’s dummy pixel connection wire to include Kim’s dummy TFT connection pads with the predictable result of providing additional connection potential in order to provide improved connection position flexibility.
Thus, Choi, as modified by Kim, teaches the first and second dummy pixels connected to a test circuit film and PCB.
As to claim 12, Choi, as modified by Kim, teaches the display apparatus wherein the first test connection wire and the second test connection wire are electrically separated. As shown in figure 6 of Kim, the first line L1 and the fourth line L4 are electrically separate. In addition, the motivation used is the same as in the rejection of claim 11.
As to claim 13, Choi, as modified by Kim, teaches the display apparatus wherein an end portion of each of the first test wire, the second test wire, the first test connection wire, and the second test connection wire is exposed (Kim, An upper surface of the first test pad P1 may be at least partially exposed in order to be in contact with a first connection pad C1, Figure 6, ¶ [0091]). Each of the pads are partially exposed. In addition, the motivation used is the same as in the rejection of claim 11.
As to claim 24, Choi discloses a display apparatus (Choi, display device 100, Figure 1), comprising:
a plurality of pixel driving circuits (Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187]) and at least one dummy pixel driving circuit (Choi, at least one dummy subpixel SP_dmy disposed in the non-active area NA, Figure 12, ¶ [0188]) disposed apart from each other on a substrate;
a plurality of driving wires disposed corresponding to the plurality of pixel driving circuits (Choi, The driving data voltage supply unit 131 may supply a driving data voltage Vdata_dry to a plurality of light emitting subpixels SP_emt disposed in the active area AA during a display driving period. Figure 12, ¶ [0187]); The driving data voltage supply unit 131 connects to the plurality of light emitting subpixels SP_emt by a plurality of driving wires.
at least two lines electrically connected to the at least one dummy pixel driving circuit (Choi, The dummy data voltage supply unit 132 may supply a dummy data voltage Vdata_dmy larger than the driving data voltage Vdata_dry to at least one dummy subpixel SP_dmy disposed in the non-active area NA during the display driving period. The dummy data voltage supply unit 132 may supply a sensing data voltage Vdata_sen to the dummy subpixel SP_dmy during a degree-of-degradation sensing period. Figure 12, ¶ [0188]) (Choi, The sensing unit 133 may sense the degree of degradation of the modeling transistor MOT included in the dummy subpixel SP_dmy during the degree-of-degradation sensing period. Figure 12, ¶ [0189]),
Choi does not expressly teach
wherein an end portion of each of the at least two lines is exposed.
Kim discloses a display device and method for testing display device wherein an end portion of each of the at least two lines is exposed (Kim, an upper surface of the first test pad P1 may be at least partially exposed in order to be in contact with a first connection pad C1, Figure 6, ¶ [0091])(Kim, FIG. 6 is a view showing the layout of a display device according to another exemplary embodiment of the present disclosure. Referring to FIG. 6, in an exemplary embodiment, a plurality of dummy thin-film transistors may be in the non-display area NDA. Figure 6, ¶ [0104]). Kim teaches dummy TFTs which have connection pads (test wire) which are at least partially exposed.
At the time before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify Choi’s dummy pixel connection wire to include Kim’s dummy TFT connection pads because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Kim’s dummy TFT connection pads is comparable to Choi’s dummy pixel connection wire because both provide connections for dummy TFTs in a display device. Therefore, it is within the capabilities of one of ordinary skill in the art to modify Choi’s dummy pixel connection wire to include Kim’s dummy TFT connection pads with the predictable result of providing additional connection potential in order to provide improved connection position flexibility.
Thus, Choi, as modified by Kim, teaches the connection pads which are exposed on one end.
As to claim 25, Choi, as modified by Kim, teaches the display apparatus wherein the plurality of driving wires and the two lines are electrically separated. As shown in figure 12 of Choi, the wires connecting the pixels and the dummy pixels are electrically separated.
As to claim 26, Choi, as modified by Kim, teaches the display apparatus further comprising:
light-emitting elements disposed on the substrate (Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187])(Choi, he modeling transistor MOT included in the dummy subpixel SP_dmy is disposed on the same substrate as the driving transistor DRT included in the light emitting subpixel SP_emt through the same process, the modeling transistor MOT may have properties similar to those of the driving transistor DRT. ¶ [0096]),
wherein the substrate includes a display area (Choi, active area AA, Figure 12) where the light-emitting elements are disposed and a non-display area (Choi, non-active area NA, Figure 12) around the display area,
wherein the pixel driving circuits are disposed in the display area (Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187]), and
wherein the dummy pixel driving circuit and the at least two lines are disposed in the non-display area (Choi, The dummy data voltage supply unit 132 may supply a dummy data voltage Vdata_dmy larger than the driving data voltage Vdata_dry to at least one dummy subpixel SP_dmy disposed in the non-active area NA during the display driving period. The dummy data voltage supply unit 132 may supply a sensing data voltage Vdata_sen to the dummy subpixel SP_dmy during a degree-of-degradation sensing period. Figure 12, ¶ [0188]) (Choi, The sensing unit 133 may sense the degree of degradation of the modeling transistor MOT included in the dummy subpixel SP_dmy during the degree-of-degradation sensing period. Figure 12, ¶ [0189]).
As to claim 27, Choi, as modified by Kim, teaches the display apparatus wherein the light-emitting elements are micro LEDs and have a vertical structure (Choi, a light emitting diode (LED) or micro light emitting diode (μLED) may be disposed in each subpixel SP. ¶ [0059]).
As to claim 28, Choi, as modified by Kim, teaches the display apparatus wherein the dummy pixel driving circuit includes a first dummy pixel driving circuit (Kim, first dummy thin-film transistor DT1, Figure 6) and a second dummy pixel driving circuit (Kim, second dummy thin-film transistor DT2, Figure 6) disposed adjacent to each other, As shown in figure 6 of Kim, the first and second dummy TFTs are adjacent on the left non-display area NDA_L.
wherein the at least two lines include a first test wire (Kim, first test pad P1, Figure 6) and a first test connection wire (Kim, first line L1, Figure 6) which are connected to the first dummy pixel driving circuit (Kim, first dummy thin-film transistor DT1, Figure 6), and
wherein the at least two lines include a second test wire (Kim, fourth test pad P4, Figure 6) and a second test connection wire (Kim, fourth line L4, Figure 6) which are connected to the second dummy pixel driving circuit (Kim, second dummy thin-film transistor DT2, Figure 6). In addition, the motivation used is the same as in the rejection of claim 24.
As to claim 29, Choi, as modified by Kim, teaches the display apparatus wherein the first test connection wire (Kim, first line L1, Figure 6) and the second test connection wire (Kim, fourth line L4, Figure 6) are electrically separated. As shown in figure 6 of Kim, the first and fourth lines are electrically separated. In addition, the motivation used is the same as in the rejection of claim 24.
As to claim 30, Choi discloses a display apparatus (Choi, display device 100, Figure 1), comprising:
a plurality of pixel driving circuits (Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187]), at least one first dummy pixel driving circuit (Choi, at least one dummy subpixel SP_dmy disposed in the non-active area NA, Figure 12, ¶ [0188]), and at least one second dummy pixel driving circuit (Choi, dummy data voltage supply unit 132 and sensing unit 133, Figure 12) disposed apart from each other on a substrate;
a plurality of driving wires disposed corresponding to the plurality of pixel driving circuits (Choi, The driving data voltage supply unit 131 may supply a driving data voltage Vdata_dry to a plurality of light emitting subpixels SP_emt disposed in the active area AA during a display driving period. Figure 12, ¶ [0187]); The driving data voltage supply unit 131 connects to the plurality of light emitting subpixels SP_emt by a plurality of driving wires.
two lines connected to the at least one first dummy pixel driving circuit (Choi, The dummy data voltage supply unit 132 may supply a dummy data voltage Vdata_dmy larger than the driving data voltage Vdata_dry to at least one dummy subpixel SP_dmy disposed in the non-active area NA during the display driving period. The dummy data voltage supply unit 132 may supply a sensing data voltage Vdata_sen to the dummy subpixel SP_dmy during a degree-of-degradation sensing period. Figure 12, ¶ [0188]) (Choi, The sensing unit 133 may sense the degree of degradation of the modeling transistor MOT included in the dummy subpixel SP_dmy during the degree-of-degradation sensing period. Figure 12, ¶ [0189]),
Choi does not expressly teach
wherein one of the two lines connects the first dummy pixel driving circuit and the second dummy pixel driving circuit, and
wherein an end portion of the other of the two lines is exposed.
Kim discloses a display device and method for testing display device
wherein one of the two lines (Kim, first line L1 or fourth line L4 each with their own ending pads (P1 or P4), Figure 6) connects the first dummy pixel driving circuit (Kim, first dummy thin-film transistor DT1, Figure 6) and the second dummy pixel driving circuit (Kim, second dummy thin-film transistor DT2, Figure 6), and
wherein an end portion of the other of the two lines is exposed (Kim, An upper surface of the first test pad P1 may be at least partially exposed in order to be in contact with a first connection pad C1, Figure 6, ¶ [0091])(Kim, FIG. 6 is a view showing the layout of a display device according to another exemplary embodiment of the present disclosure. Referring to FIG. 6, in an exemplary embodiment, a plurality of dummy thin-film transistors may be in the non-display area NDA. Figure 6, ¶ [0104]). Kim teaches dummy TFTs which have connection pads (test wire) which are at least partially exposed.
At the time before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify Choi’s dummy pixel connection wire to include Kim’s dummy TFT connection pads because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Kim’s dummy TFT connection pads is comparable to Choi’s dummy pixel connection wire because both provide connections for dummy TFTs in a display device. Therefore, it is within the capabilities of one of ordinary skill in the art to modify Choi’s dummy pixel connection wire to include Kim’s dummy TFT connection pads with the predictable result of providing additional connection potential in order to provide improved connection position flexibility.
Thus, Choi, as modified by Kim, teaches the connection pads which are exposed on one end.
As to claim 31, Choi, as modified by Kim, teaches the display apparatus wherein the driving wires and the two lines are electrically separated. As shown in figure 6 of Kim, pixel driving lines, the first line L1, and the fourth line L4 are electrically separate. In addition, the motivation used is the same as in the rejection of claim 30.
As to claim 32, Choi, as modified by Kim, teaches the display apparatus further comprising:
light-emitting elements disposed on the substrate (Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187])(Choi, he modeling transistor MOT included in the dummy subpixel SP_dmy is disposed on the same substrate as the driving transistor DRT included in the light emitting subpixel SP_emt through the same process, the modeling transistor MOT may have properties similar to those of the driving transistor DRT. ¶ [0096]),
wherein the substrate includes a display area (Choi, active area AA, Figure 12) where the light-emitting elements are disposed and a non-display area (Choi, non-active area NA, Figure 12) around the display area,
wherein the plurality of pixel driving circuits are disposed in the display area (Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187]), and
wherein the first dummy pixel driving circuit, the second dummy pixel driving circuit, and the two lines are disposed in the non-display area. As shown in figure 6 of Kim, the dummy TFTs and lines are in the peripheral area. In addition, the motivation used is the same as in the rejection of claim 30.
Claims 14-18, 20, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pub. No. 2022/0122540 by Choi et al. (“Choi”) in view of U.S. Pub. No. 2023/0044364 by Bae et al. (“Bae”).
As to claim 14, Choi does not expressly disclose the display apparatus further comprising:
banks disposed on the substrate;
first electrodes disposed on the banks;
light-emitting elements disposed on the first electrodes; and
second electrodes disposed on the light-emitting elements.
Bae teaches a display device comprising:
banks (Bae, bank patterns BNP, Figure 8) disposed on the substrate (Bae, substrate SUB, Figure 8);
first electrodes (Bae, first and second pixel electrodes PE1 and PE2, Figure 8) disposed on the banks (Bae, bank patterns BNP, Figure 8);
light-emitting elements (Bae, light emitting elements LD, Figure 8) disposed on the first electrodes (Bae, first and second pixel electrodes PE1 and PE2, Figure 8); and
second electrodes (Bae, alignment electrodes ALE, Figure 8) disposed on the light-emitting elements (Bae, light emitting elements LD, Figure 8).
At the time before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify Choi’s pixels to include Bae’s pixels because such a modification is the result of simple substitution of one known element for another producing a predictable result. More specifically, Choi’s pixels and Bae’s pixels perform the same general and predictable function, the predictable function being providing pixels for a display device. Since each individual element and its function are shown in the prior art, albeit shown in separate references, the difference between the claimed subject matter and the prior art rests not on any individual element or function but in the very combination itself – that is in the substitution of Choi’s pixels by replacing it with Bae’s pixels. Thus, the simple substitution of one known element for another producing a predictable result renders the claim obvious.
Thus, Choi, as modified by Bae, teaches the pixels with the banks and electrodes layered with the light-emitting element.
As to claim 15, Choi, as modified by Bae, teaches the display apparatus further comprising:
a first optical layer (Bae, bank BNK, Figure 8) around the light-emitting elements (Bae, light emitting elements LD, Figure 8); and
a second optical layer (Bae, fourth insulating layer INS4, Figure 8) disposed on a side surface of the first optical layer (Bae, bank BNK, Figure 8). In addition, the motivation used is the same as in the rejection of claim 14.
As to claim 16, Choi, as modified by Bae, teaches the display apparatus further comprising:
signal wires (Bae, intermediate electrodes CTE, Figure 8) disposed between the banks,
wherein the signal wires (Bae, intermediate electrodes CTE, Figure 8) include a same metal layer as the first electrodes (Bae, first and second pixel electrodes PE1 and PE2, Figure 8). As shown in figure 8 of Bae, the intermediate electrodes CTE and pixel electrodes PE are formed on the same metal layer. In addition, the motivation used is the same as in the rejection of claim 14.
As to claim 17, Choi, as modified by Bae, teaches the display apparatus wherein the light-emitting elements are micro LEDs (Bae, The light emitting element LD may include, for example, a light-emitting diode (LED) manufactured small enough to have a diameter D and/or a length L to a degree of nanometer scale to micrometer scale. ¶ [0054]). In addition, the motivation used is the same as in the rejection of claim 14.
As to claim 18, Choi, as modified by Bae, teaches the display apparatus wherein the light-emitting elements have a vertical structure. As shown in figure 8 of Bae, each of the pixels are layered in a vertical structure. In addition, the motivation used is the same as in the rejection of claim 14.
As to claim 20, Choi, as modified by Bae, discloses the display apparatus further comprising:
a protection layer (Bae, fourth insulating layer INS4, Figure 8) that is disposed between the pixel driving circuits disposed in an outer portion among the plurality of pixel driving circuits and the dummy pixel driving circuit; As shown in figure 8 of Bae, the fourth insulating layer INS4 is shown as covering the pixels in the emission area EMA and does not teach dummy pixels covered by the fourth insulating layer INS4.
a plurality of connection wires (Bae, fan-out lines LP1 and LP2, Figure 4) that electrically connect the pixel driving circuits and the first electrodes (Bae, first and second pixel electrodes PE1 and PE2, Figure 8),
wherein one of the plurality of connection wires overlaps the protection layer (Bae, The first pixel PXL1 may be a pixel PXL in which the first power line PL1 branching off to the first area A1 from the first fan-out line LP1 electrically connected to the first driving voltage line DVL1 is proved. ¶ [0111]). In addition, the motivation used is the same as in the rejection of claim 14.
As to claim 21, Choi, as modified by Bae, discloses the display apparatus further comprising:
a plurality of connection wires that electrically connect the pixel driving circuits and the first electrodes (Choi, The driving data voltage supply unit 131 may supply a driving data voltage Vdata_dry to a plurality of light emitting subpixels SP_emt disposed in the active area AA during a display driving period. Figure 12, ¶ [0187]),
wherein the substrate includes a display area (Choi, active area AA, Figure 12) where the light-emitting elements are disposed and a non-display area (Choi, non-active area NA, Figure 12) around the display area,
wherein the pixel driving circuits are disposed in the display area (Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187]),
wherein the dummy pixel driving circuit is disposed in the non-display area (Choi, the dummy subpixel SP_dmy disposed in the non-active area NA of the display panel 110. Figure 12, ¶ [0088]), and
wherein the connection wires are disposed along the outer portion of the display area (Choi, The driving data voltage supply unit 131 may supply a driving data voltage Vdata_dry to a plurality of light emitting subpixels SP_emt disposed in the active area AA during a display driving period. Figure 12, ¶ [0187]).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pub. No. 2022/0122540 by Choi et al. (“Choi”), in view of U.S. Pub. No. 2023/0044364 by Bae et al. (“Bae”), and in further view of U.S. Pub. No. 2020/0402964 by Kim (“Kim2”).
As to claim 19, Choi, as modified by Bae, teaches the display apparatus further comprising:
an insulation layer (Bae, first insulating layer INS1, Figures 8 and 12) disposed on the plurality of pixel driving circuits and the at least one dummy pixel driving circuit; The first insulating layer INS1 is on all of the pixel circuits.
a passivation layer (Bae, passivation layer PSV, Figure 12) that is disposed on the insulation layer (Bae, first insulating layer INS1, Figures 8 and 12) and includes holes (Bae, hole for first contact part CNT1 in PSV, Figure 12); and
pattern layers connected to the first electrodes and disposed in the holes (Bae, The passivation layer PSV may be partially opened to include a first contact part CNT1 exposing the first terminal TE1 of the first transistor T1 and a second contact part CNT2 exposing a portion of the (2-1)th sub-power line PL2_1. Figure 12, ¶ [0267]),
Bae does not expressly teach
wherein the first electrodes and the light-emitting elements are electrically connected via the pattern layer by eutectic bonding.
Kim2 teaches a light emitting diode wherein the first electrodes and the light-emitting elements are electrically connected via the pattern layer by eutectic bonding (Kim2, the third light emitting structure 150 is bonded on the second light emitting structure 120 through a eutectic process, the metal bonding layer 160 used for bonding is used as the second positive electrode 175, and the second positive electrode 175 is electrically connected to the first positive electrode 172 through the conductive layer 176. ¶ [0100]).
At the time before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify Bae’s pixel construction to include Kim2’s pixel bonding because such a modification is the result of simple substitution of one known element for another producing a predictable result. More specifically, Bae’s pixel construction and Kim2’s pixel bonding perform the same general and predictable function, the predictable function being providing construction details for a pixel structure. Since each individual element and its function are shown in the prior art, albeit shown in separate references, the difference between the claimed subject matter and the prior art rests not on any individual element or function but in the very combination itself – that is in the substitution of Bae’s pixel construction by replacing it with Kim2’s pixel bonding. Thus, the simple substitution of one known element for another producing a predictable result renders the claim obvious.
Thus, Choi, as modified by Bae and Kim2, teaches the electrodes bonded to the emitting structure by a eutectic process.
Claims 22 and 23 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pub. No. 2022/0122540 by Choi et al. (“Choi”) in view of U.S. Pub. No. 2017/0345847 by Kim et al. (“Kim3”).
As to claim 22, Choi does not expressly disclose the display apparatus further comprising:
a protection wire disposed along an outer portion of the display area,
wherein the protection wire includes a conductive material.
Kim3 teaches a display apparatus comprising:
a protection wire (Kim3, second main line 180a, Figure 5) disposed along an outer portion of the display area, As shown in figure 5 of Kim3, the second main line 180a is on an edge of the display area DA.
wherein the protection wire includes a conductive material (Kim3, The second power supply line 180 may include a second main line 180a that surrounds different ends of the first main line 170a and other areas of the display area DA, ¶ [0100]).
At the time before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify Choi’s display device to include Kim3’s display device with main line because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Kim3’s display device with main line is comparable to Choi’s display device because both are directed to display devices. Therefore, it is within the capabilities of one of ordinary skill in the art to modify Choi’s display device to include Kim3’s display device with main line with the predictable result of providing a main line to supply power around the entire display area.
Thus, Choi, as modified by Kim3, teaches the main line around the edge of the display area.
As to claim 23, Choi, as modified by Kim3, teaches the display apparatus further comprising:
a plurality of first electrodes disposed on the substrate (Choi, The light emitting element ED may include a first electrode layer E1, Figure 2, ¶ [0072])(Choi, a plurality of light emitting subpixels SP_emt disposed in the active area AA, Figure 12, ¶ [0187]);
a plurality of light-emitting elements disposed on the first electrodes (Choi, a light emitting layer EL disposed between the first electrode layer E1 and the second electrode layer E2. Figure 2, ¶ [0072]);
a plurality of second electrodes disposed on the light-emitting elements (Choi, a second electrode layer E2 electrically connected with a line to which the second driving voltage EVSS is supplied, Figure 2, ¶ [0072]); and
a plurality of connection wires that electrically connect the pixel driving circuits and the first electrodes (Choi, The driving data voltage supply unit 131 may supply a driving data voltage Vdata_dry to a plurality of light emitting subpixels SP_emt disposed in the active area AA during a display driving period. Figure 12, ¶ [0187]),
wherein the connection wires are configured with the protection wire (Kim3, The second power supply line 180 may include a second main line 180a that surrounds different ends of the first main line 170a and other areas of the display area DA, ¶ [0100]). The combination of Choi and Kim teaches the second main line surrounding the active area and the subpixels are connected to the driving data voltage supply unit 131. In addition, the motivation used is the same as in the rejection of claim 22.
Claim 33 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pub. No. 2022/0122540 by Choi et al. (“Choi”), in view of U.S. Pub. No. 2019/0348478 by Kim et al. (“Kim”), and in further view of U.S. Pub. No. 2020/0402964 by Kim (“Kim2”).
As to claim 33, Choi, as modified by Kim, teaches the display apparatus further comprising:
first electrodes (Kim, pixel electrode 250, Figure 2) disposed on the substrate (Kim, substrate 110, Figure 2);
light-emitting elements (Kim, organic emission layer 270, Figure 2) disposed on the first electrodes (Kim, pixel electrode 250, Figure 2); and
second electrodes (Kim, common electrode 280, Figure 2) disposed on the light-emitting elements (Kim, organic emission layer 270, Figure 2),
Choi, as modified by Kim, does not expressly teach
wherein the light-emitting elements are electrically connected to the first electrodes by eutectic bonding.
Kim2 teaches a light emitting diode wherein the light-emitting elements are electrically connected to the first electrodes by eutectic bonding (Kim2, the third light emitting structure 150 is bonded on the second light emitting structure 120 through a eutectic process, the metal bonding layer 160 used for bonding is used as the second positive electrode 175, and the second positive electrode 175 is electrically connected to the first positive electrode 172 through the conductive layer 176. ¶ [0100]).
At the time before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify Kim’s pixel construction to include Kim2’s pixel bonding because such a modification is the result of simple substitution of one known element for another producing a predictable result. More specifically, Kim’s pixel construction and Kim2’s pixel bonding perform the same general and predictable function, the predictable function being providing construction details for a pixel structure. Since each individual element and its function are shown in the prior art, albeit shown in separate references, the difference between the claimed subject matter and the prior art rests not on any individual element or function but in the very combination itself – that is in the substitution of Kim’s pixel construction by replacing it with Kim2’s pixel bonding. Thus, the simple substitution of one known element for another producing a predictable result renders the claim obvious.
Thus, Choi, as modified by Kim and Kim2, teaches the electrodes bonded to the emitting structure by an eutectic process.
Conclusion
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/BRENT D CASTIAUX/Primary Examiner, Art Unit 2623