Prosecution Insights
Last updated: October 21, 2026
Application No. 19/254,370

IMAGE DECODING APPARATUS

Non-Final OA §103
Filed
Jun 30, 2025
Priority
May 30, 2019 — JP 2019-101179 +2 more
Examiner
DANG, PHILIP
Art Unit
2482
Tech Center
2400 — Computer Networks
Assignee
Sharp Corporation
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
1y 4m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
389 granted / 501 resolved
+19.6% vs TC avg
Strong +29% interview lift
Without
With
+29.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
36 currently pending
Career history
551
Total Applications
across all art units

Statute-Specific Performance

§101
5.2%
-34.8% vs TC avg
§103
53.5%
+13.5% vs TC avg
§102
12.6%
-27.4% vs TC avg
§112
25.5%
-14.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 501 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS), submitted on 6/30/2025, is being considered by the examiner. Objections The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, “a transform basis”, “a modified transform coefficient”, “an intra subpartition mode” , “an explicit MTS is enabled” must be shown or the features must be canceled from the claims 1-4. No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under pre-AIA 35 U.S.C. 103(a) are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims under pre-AIA 35 U.S.C. 103(a), the examiner presumes that the subject matter of the various claims was commonly owned at the time any inventions covered therein were made absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and invention dates of each claim that was not commonly owned at the time a later invention was made in order for the examiner to consider the applicability of pre-AIA 35 U.S.C. 103(c) and potential pre-AIA 35 U.S.C. 102(e), (f) or (g) prior art under pre-AIA 35 U.S.C. 103(a). Claims 1-4 are rejected under 35 U.S.C. 103 as being unpatentable over by Koo (US Patent 11,350,130 B2), (“Koo”), in view of Koo et al. (US Patent 2022/0174273 A1), (“Koo_273”). Regarding claim 1, Koo meets the claim limitations as follows: An image decoding apparatus (i.e. a decoder) [Koo: col. 2, line 34; Fig. 2] for transforming a transform coefficient for each transform unit (i.e. FIG. 5 is an embodiment to which the disclosure is applied and illustrates a schematic block diagram of a dequantization and transform unit 220/230 within a decoder) [Koo: col. 2, line 51-53; Fig. 5], the image decoding apparatus (i.e. a decoder) [Koo: col. 2, line 34; Fig. 2] comprising:a transform unit decoding circuit configured to (i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22] decode, from coded data (i.e. decoding a video signal) [Koo: col. 2, line 34; Fig. 2], (i) a secondary index, stldx, indicating whether or not a secondary transform is used (i.e. FIG. 10 is a flowchart for describing a decoding process in which a horizontal transform or vertical transform is applied to a row or a column based on an MTS flag and an MTS index as an embodiment to which the present disclosure is applied) [Koo: col. 2, line 66 – col. 3, line 3; Fig. 10] and a transform basis (i.e. Here, whether the transform is DST or DCT is represented by S or C, a type number is represented as a superposition in the form of a Roman number, and N of a lower subscript indicates that the transform is an NxN transform. Further, in the 2D matrix such as the CNII and SNIV, it is assumed that col= vectors form a transform basis) [Koo: col. 12, line 12-17; Fig. 6], and (ii) a multiple transform selection index, mts_idx, being a switch index for selecting a transform basis of a core transform (i.e. determine the MTS index may be the inverse transform of the DCT2. Based on at least one of the prediction mode, the horizontal transform, and the vertical transform of the current block (S930). Here, the MTS index may mean an index indicating any one of the plurality of transform combinations for each intra prediction mode and the MTS index may be transmitted for each transform unit) [Koo: col. 15, line 21-27; Fig. 9];an inverse quantization circuit configured to (i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22] perform an inverse quantization on a quantized transform coefficient and derive the transform coefficient (i.e. The decoder may perform an inverse primary approximation transform in a vertical direction by using the vertical primary transform for the dequantized transform coefficient block (S2140)) [Koo: col. 34, line 50-53; Figs. 5, 21];a secondary transform circuit (i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22] configured to (i.e. As an embodiment, the decoder may check whether the number of non-zero transform coefficients is greater than the threshold. In this case, the transform combination index may be obtained when the number of non-zero transform coefficients is greater than the threshold) [Koo: col. 14, line 63-67] derive a modified transform coefficient by applying the secondary transform to the transform coefficient (i.e. The secondary transform unit 122 may apply the secondary transform to a primary transformed signal and here, the secondary transform may be predefined in the table in the encoder and/or the decoder) [Koo: col. 10, line 30-34; Fig. 5] by using a transform matrix in a case that the secondary transform is enabled (i.e. the secondary transform may adopt combinations of various transforms DST 7, DCT 8, DST 1, and DCT 5 of the multiple transform selection (MTS). For example, FIG. 6 may be adopted) [Koo: col. 10, line 55-58; Fig. 6] - Note: Fig. 6 discloses multiple transform structures based on different Discrete Cosine Transforms and Discrete Sine Transforms associated with different intra prediction mores); anda core transform circuit configured to (i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22] apply the core transform(i.e. In the disclosure, when a transform is performed, the transform may be performed through a plurality of steps. For example, as in FIG. 4, two steps of a primary transform and a secondary transform may be applied or more transform steps may be used according to an algorithm. In this case, the primary transform may be referred to as a core transform. The primary transform unit 121 may apply a primary transform on a residual signal. In this case, the primary transform may be pre-defined in a table form in the encoder and/or the decoder. A discrete cosine transform type 2 (hereinafter "DCT2") may be applied to the primary transform. Alternatively, a discrete sine transform-type 7 (hereinafter called "DST7") may be applied to a specific case. For example, in the intra prediction mode, the DST7 may be applied to a 4x4 block. Further, the primary transform may adopt combinations of various transforms DST 7, DCT 8, DST 1, and DCT 5 of the multiple transform selection (MTS). For example, FIG. 6 may be adopted) [Koo: col. 10, line 11-30; Fig. 4] including a vertical transform and a horizontal transform to the transform coefficient or the modified transform coefficient (i.e. One transform combination may include a horizontal transform (or row transform) applied to rows of a corresponding 2D block and a vertical transform ( or col = transform) applied to colunms) [Koo: col. 12, line 26-29; Fig. 6],wherein the core transform circuit (i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22] derives a horizontal transform type and a vertical transform type according to the multiple transform selection index, mts_idx (i.e. Referring to FIG. 6 above, a case of using 35 intra prediction modes and a case of using 67 intra prediction modes are illustrated. A plurality of transform combinations may be applied to each transform configuration group divided in each intra prediction mode column. For example, the plurality of transform combinations may include four (row direction transforms and column direction transforms) combinations. As a specific example, DST-7 and DST-5 may be applied in a row (horizontal) direction and a col = (vertical) direction in group 0, and as a result, a total of four combinations are available. Since a total of four transform kernel combinations may be applied to each intra prediction mode, a transform combination index for selecting one of the transform kernel combinations may be transmitted every transform unit. In the present disclosure, the transform combination index may be called MTS index and expressed as mts_idx) [Koo: col. 12, line 42-58; Fig. 6], in a case that an explicit MTS is enabled ((i.e. In the present disclosure. Multiple Transform Selection (MTS) may refer to a method for performing transform using at least two transform types. This may also be expressed as an Adaptive Multiple Transform (AMT) or Explicit Multiple Transform (EMT), and likewise, mts_idx may also be expressed as AMT_idx, EMT_idx, tu_mts_idx, AMT_TU_idx, EMT_TU_idx, transform index, or transform combination index and the present disclosure is not limited to the expressions) [Koo: col. 5, line 5-13]; (i.e. For example, when sps_mts_intra_enabled_flag=1 or sps_mts_inter_enabled_flag=1, the decoder may obtain tu_mts_flag) [Koo: col. 16, line 51-53; Fig. 6]), derives the horizontal transform type and the vertical transform type to be equal to 0 in a case that a value of the secondary index, stldx, is not equal to 0 (For example, the plurality of transform combinations may include four (row direction transforms and column direction transforms) combinations. As a specific example, DST-7 and DST-5 may be applied in a row (horizontal) direction and a col= (vertical) direction in group 0, and as a result, a total of four combinations are available. Since a total of four transform kernel combinations may be applied to each intra prediction mode, a transform combination index for selecting one of the transform kernel combinations may be transmitted every transform unit. In the present disclosure, the transform combination index may be called MTS index and expressed as mts_idx) [Koo: col. 12, line 42-58; Fig. 6], and performs the vertical transform according to the vertical transform type, and the horizontal transform according to the horizontal transform type ((The inverse secondary transform unit 231 performs an inverse secondary transform for the transform coefficients. Here, the inverse secondary transform represents an inverse transform of the secondary transform described in FIG. 4 above. As another embodiment, the secondary transform may adopt combinations of various transforms DST 7, DCT 8, DST 1, and DCT 5 of the multiple transform selection (MTS). For example, FIG. 6 may be adopted) [Koo: col. 11, line 22-30; Fig. 6]; (As a specific example, DST-7 and DST-5 may be applied in a row (horizontal) direction and a col= (vertical) direction in group 0, and as a result, a total of four combinations are available. Since a total of four transform kernel combinations may be applied to each intra prediction mode, a transform combination index for selecting one of the transform kernel combinations may be transmitted every transform unit. In the present disclosure, the transform combination index may be called MTS index and expressed as mts_idx) [Koo: col. 12, line 46-58; Fig. 6]). Koo does not explicitly disclose the following claim limitations (Emphasis added). a secondary index, stldx. However, in the same field of endeavor Koo_273 further discloses the deficient claim limitations as follows: a secondary index, stldx (i.e. In another embodiment of the present disclosure, data hiding and implicit coding methods for transform indicators are introduced. Here, transform indicators may include ST_idx, UTI_idx, EMT_CU_Flag, EMT_TU_Flag, NSST_Idx and any sort of transform related index which corresponding information may be inserted in a coefficient coding process (it can be extracted during a coefficient coding process)) [Koo_273: para. 0244]). It would have been obvious to one with an ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Koo with Koo_273 to program the system to implement Koo_273’s method. Therefore, the combination of Koo with Koo_273 will enable the system to transform efficiency by determining and applying a transform suitable for a current bloc [Koo_273: para. 0016]. Regarding claim 2, Koo meets the claim limitations as set forth in claim 1. Koo further meets the claim limitations as follows: wherein the core transform circuit (i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22] derives the horizontal transform type and the vertical transform type to be equal to 0 or 1 according to an intra prediction mode and a size of the transform unit in a case that an intra subpartition mode is used ((i.e. Referring to FIG. 6 above, the transform configuration groups may be determined based on the prediction mode and the number of groups may be a total of six groups G0 to G5. In addition, G0 to G4 correspond to a case where intra prediction is applied, and G5 represents transform combinations (or transform sets and transform combination sets) applied to the residual block generated by the inter prediction. One transform combination may include a horizontal transform (or row transform) applied to rows of a corresponding 2D block and a vertical transform (or col = transform) applied to columns) [Koo: col. 12, line 18-29; Fig. 6] ; (i.e. The plurality of transforms ( or transform combinations) may include the transforms ( or transform combinations) described in FIG. 6 of the present disclosure.) [Koo: col. 5, line 58-60; Fig. 6]; (i.e. Further, in each coding process, partitioning, decomposition, splitting, and division may be appropriately replaced and construed) [Koo: col. 5, line 1-4; Fig. 6]). Regarding claim 3, Koo meets the claim limitations as follows: An image encoding apparatus (i.e. an encoder) [Koo: col. 2, line 33; Fig. 1] for transforming a transform coefficient for each transform unit (i.e. FIG. 5 is an embodiment to which the disclosure is applied and illustrates a schematic block diagram of a dequantization and transform unit 220/230 within a decoder) [Koo: col. 2, line 51-53; Fig. 5], the image decoding apparatus (i.e. an encoder) [Koo: col. 2, line 33; Fig. 1] comprising:a transform unit encoding circuit configured to (i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22] encode, from coded data (i.e. encoding a video signal) [Koo: col. 2, line 32; Fig. 1], (i) a secondary index, stldx, indicating whether or not a secondary transform is used (i.e. FIG. 10 is a flowchart for describing a decoding process in which a horizontal transform or vertical transform is applied to a row or a column based on an MTS flag and an MTS index as an embodiment to which the present disclosure is applied) [Koo: col. 2, line 66 – col. 3, line 3; Fig. 10] and a transform basis (i.e. Here, whether the transform is DST or DCT is represented by S or C, a type number is represented as a superposition in the form of a Roman number, and N of a lower subscript indicates that the transform is an NxN transform. Further, in the 2D matrix such as the CNII and SNIV, it is assumed that col= vectors form a transform basis) [Koo: col. 12, line 12-17; Fig. 6], and (ii) a multiple transform selection index, mts_idx, being a switch index for selecting a transform basis of a core transform (i.e. determine the MTS index may be the inverse transform of the DCT2. Based on at least one of the prediction mode, the horizontal transform, and the vertical transform of the current block (S930). Here, the MTS index may mean an index indicating any one of the plurality of transform combinations for each intra prediction mode and the MTS index may be transmitted for each transform unit) [Koo: col. 15, line 21-27; Fig. 9];a quantization circuit configured to (i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22] perform a quantization on a quantized transform coefficient and derive the transform coefficient (i.e. The quantization unit 130 may quantize the transform coefficient and transmits the quantized transform coefficient to the entropy encoding unit 190 and the entropy encoding unit 190 may entropy-code a quantized signal and output the entropy-coded quantized signal as a bitstream) [Koo: col. 6, line 35-39; Fig. 4];a secondary transform circuit configured to ((i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22] derive a modified transform coefficient by applying the secondary transform to the transform coefficient (i.e. The secondary transform unit 122 may apply the secondary transform to a primary transformed signal and here, the secondary transform may be predefined in the table in the encoder and/or the decoder) [Koo: col. 10, line 30-34; Fig. 5] by using a transform matrix in a case that the secondary transform is enabled (i.e. the secondary transform may adopt combinations of various transforms DST 7, DCT 8, DST 1, and DCT 5 of the multiple transform selection (MTS). For example, FIG. 6 may be adopted) [Koo: col. 10, line 55-58; Fig. 6] - Note: Fig. 6 discloses multiple transform structures based on different Discrete Cosine Transforms and Discrete Sine Transforms associated with different intra prediction mores); anda core transform circuit configured to (i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22] apply the core transform (i.e. In the disclosure, when a transform is performed, the transform may be performed through a plurality of steps. For example, as in FIG. 4, two steps of a primary transform and a secondary transform may be applied or more transform steps may be used according to an algorithm. In this case, the primary transform may be referred to as a core transform. The primary transform unit 121 may apply a primary transform on a residual signal. In this case, the primary transform may be pre-defined in a table form in the encoder and/or the decoder. A discrete cosine transform type 2 (hereinafter "DCT2") may be applied to the primary transform. Alternatively, a discrete sine transform-type 7 (hereinafter called "DST7") may be applied to a specific case. For example, in the intra prediction mode, the DST7 may be applied to a 4x4 block. Further, the primary transform may adopt combinations of various transforms DST 7, DCT 8, DST 1, and DCT 5 of the multiple transform selection (MTS). For example, FIG. 6 may be adopted) [Koo: col. 10, line 11-30; Fig. 4] including a vertical transform and a horizontal transform to the transform coefficient or the modified transform coefficient (i.e. One transform combination may include a horizontal transform (or row transform) applied to rows of a corresponding 2D block and a vertical transform ( or col = transform) applied to colunms) [Koo: col. 12, line 26-29; Fig. 6],wherein the core transform circuit (i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22] derives a horizontal transform type and a vertical transform type according to the multiple transform selection index, mts_idx (i.e. Referring to FIG. 6 above, a case of using 35 intra prediction modes and a case of using 67 intra prediction modes are illustrated. A plurality of transform combinations may be applied to each transform configuration group divided in each intra prediction mode column. For example, the plurality of transform combinations may include four (row direction transforms and column direction transforms) combinations. As a specific example, DST-7 and DST-5 may be applied in a row (horizontal) direction and a col = (vertical) direction in group 0, and as a result, a total of four combinations are available. Since a total of four transform kernel combinations may be applied to each intra prediction mode, a transform combination index for selecting one of the transform kernel combinations may be transmitted every transform unit. In the present disclosure, the transform combination index may be called MTS index and expressed as mts_idx) [Koo: col. 12, line 42-58; Fig. 6], in a case that an explicit MTS is enabled ((i.e. In the present disclosure. Multiple Transform Selection (MTS) may refer to a method for performing transform using at least two transform types. This may also be expressed as an Adaptive Multiple Transform (AMT) or Explicit Multiple Transform (EMT), and likewise, mts_idx may also be expressed as AMT_idx, EMT_idx, tu_mts_idx, AMT_TU_idx, EMT_TU_idx, transform index, or transform combination index and the present disclosure is not limited to the expressions) [Koo: col. 5, line 5-13]; (i.e. For example, when sps_mts_intra_enabled_flag=1 or sps_mts_inter_enabled_flag=1, the decoder may obtain tu_mts_flag) [Koo: col. 16, line 51-53; Fig. 6]), derives the horizontal transform type and the vertical transform type to be equal to 0 in a case that a value of the secondary index, stldx, is not equal to 0 (For example, the plurality of transform combinations may include four (row direction transforms and column direction transforms) combinations. As a specific example, DST-7 and DST-5 may be applied in a row (horizontal) direction and a col= (vertical) direction in group 0, and as a result, a total of four combinations are available. Since a total of four transform kernel combinations may be applied to each intra prediction mode, a transform combination index for selecting one of the transform kernel combinations may be transmitted every transform unit. In the present disclosure, the transform combination index may be called MTS index and expressed as mts_idx) [Koo: col. 12, line 42-58; Fig. 6], and performs the vertical transform according to the vertical transform type, and the horizontal transform according to the horizontal transform type ((The inverse secondary transform unit 231 performs an inverse secondary transform for the transform coefficients. Here, the inverse secondary transform represents an inverse transform of the secondary transform described in FIG. 4 above. As another embodiment, the secondary transform may adopt combinations of various transforms DST 7, DCT 8, DST 1, and DCT 5 of the multiple transform selection (MTS). For example, FIG. 6 may be adopted) [Koo: col. 11, line 22-30; Fig. 6]; (As a specific example, DST-7 and DST-5 may be applied in a row (horizontal) direction and a col= (vertical) direction in group 0, and as a result, a total of four combinations are available. Since a total of four transform kernel combinations may be applied to each intra prediction mode, a transform combination index for selecting one of the transform kernel combinations may be transmitted every transform unit. In the present disclosure, the transform combination index may be called MTS index and expressed as mts_idx) [Koo: col. 12, line 46-58; Fig. 6]). Koo does not explicitly disclose the following claim limitations (Emphasis added). a secondary index, stldx. However, in the same field of endeavor Koo_273 further discloses the deficient claim limitations as follows: a secondary index, stldx (i.e. In another embodiment of the present disclosure, data hiding and implicit coding methods for transform indicators are introduced. Here, transform indicators may include ST_idx, UTI_idx, EMT_CU_Flag, EMT_TU_Flag, NSST_Idx and any sort of transform related index which corresponding information may be inserted in a coefficient coding process (it can be extracted during a coefficient coding process)) [Koo_273: para. 0244]). It would have been obvious to one with an ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Koo with Koo_273 to program the system to implement Koo_273’s method. Therefore, the combination of Koo with Koo_273 will enable the system to transform efficiency by determining and applying a transform suitable for a current bloc [Koo_273: para. 0016]. Regarding claim 4, Koo meets the claim limitations as follows: A non-transitory computer-readable recording medium storing a program for making a computer (i.e. the processing method to which the disclosure is applied may be produced in the form of a program executed by a computer, and may be stored in a computer-readable recording medium) [Koo: col. 36, line 35-39] transform a transform coefficient for each transform unit (i.e. FIG. 5 is an embodiment to which the disclosure is applied and illustrates a schematic block diagram of a dequantization and transform unit 220/230 within a decoder) [Koo: col. 2, line 51-53; Fig. 5], wherein the program making the computer (i.e. the embodiments described in the disclosure may be implemented and performed on a processor, a microprocessor, a controller or a chip. For example, the function units illustrated in the drawings may be implemented and performed on a computer, a processor, a microprocessor, a controller or a chip) [Koo: col. 36, line 12-18; Fig. 22]:decode, from coded data (i.e. decoding a video signal) [Koo: col. 2, line 34; Fig. 2], (i) a secondary index, stldx, indicating whether or not a secondary transform is used (i.e. FIG. 10 is a flowchart for describing a decoding process in which a horizontal transform or vertical transform is applied to a row or a column based on an MTS flag and an MTS index as an embodiment to which the present disclosure is applied) [Koo: col. 2, line 66 – col. 3, line 3; Fig. 10] and a transform basis (i.e. Here, whether the transform is DST or DCT is represented by S or C, a type number is represented as a superposition in the form of a Roman number, and N of a lower subscript indicates that the transform is an NxN transform. Further, in the 2D matrix such as the CNII and SNIV, it is assumed that col= vectors form a transform basis) [Koo: col. 12, line 12-17; Fig. 6], and (ii) a multiple transform selection index, mts_idx, being a switch index for selecting a transform basis of a core transform (i.e. determine the MTS index may be the inverse transform of the DCT2. Based on at least one of the prediction mode, the horizontal transform, and the vertical transform of the current block (S930). Here, the MTS index may mean an index indicating any one of the plurality of transform combinations for each intra prediction mode and the MTS index may be transmitted for each transform unit) [Koo: col. 15, line 21-27; Fig. 9];perform an inverse quantization on a quantized transform coefficient and derive the transform coefficient (i.e. The decoder may perform an inverse primary approximation transform in a vertical direction by using the vertical primary transform for the dequantized transform coefficient block (S2140)) [Koo: col. 34, line 50-53; Figs. 5, 21];derive a modified transform coefficient by applying the secondary transform to the transform coefficient (i.e. The secondary transform unit 122 may apply the secondary transform to a primary transformed signal and here, the secondary transform may be predefined in the table in the encoder and/or the decoder) [Koo: col. 10, line 30-34; Fig. 5] by using a transform matrix in a case that the secondary transform is enabled (i.e. the secondary transform may adopt combinations of various transforms DST 7, DCT 8, DST 1, and DCT 5 of the multiple transform selection (MTS). For example, FIG. 6 may be adopted) [Koo: col. 10, line 55-58; Fig. 6] - Note: Fig. 6 discloses multiple transform structures based on different Discrete Cosine Transforms and Discrete Sine Transforms associated with different intra prediction mores);derive a horizontal transform type and a vertical transform type according to the multiple transform selection index, mts_idx (i.e. Referring to FIG. 6 above, a case of using 35 intra prediction modes and a case of using 67 intra prediction modes are illustrated. A plurality of transform combinations may be applied to each transform configuration group divided in each intra prediction mode column. For example, the plurality of transform combinations may include four (row direction transforms and column direction transforms) combinations. As a specific example, DST-7 and DST-5 may be applied in a row (horizontal) direction and a col = (vertical) direction in group 0, and as a result, a total of four combinations are available. Since a total of four transform kernel combinations may be applied to each intra prediction mode, a transform combination index for selecting one of the transform kernel combinations may be transmitted every transform unit. In the present disclosure, the transform combination index may be called MTS index and expressed as mts_idx) [Koo: col. 12, line 42-58; Fig. 6], in a case that an explicit MTS is enabled ((i.e. In the present disclosure. Multiple Transform Selection (MTS) may refer to a method for performing transform using at least two transform types. This may also be expressed as an Adaptive Multiple Transform (AMT) or Explicit Multiple Transform (EMT), and likewise, mts_idx may also be expressed as AMT_idx, EMT_idx, tu_mts_idx, AMT_TU_idx, EMT_TU_idx, transform index, or transform combination index and the present disclosure is not limited to the expressions) [Koo: col. 5, line 5-13]; (i.e. For example, when sps_mts_intra_enabled_flag=1 or sps_mts_inter_enabled_flag=1, the decoder may obtain tu_mts_flag) [Koo: col. 16, line 51-53; Fig. 6]); derive the horizontal transform type and the vertical transform type to be equal to 0 in a case that a value of the secondary index, stIdx, is not equal to 0 (For example, the plurality of transform combinations may include four (row direction transforms and column direction transforms) combinations. As a specific example, DST-7 and DST-5 may be applied in a row (horizontal) direction and a col= (vertical) direction in group 0, and as a result, a total of four combinations are available. Since a total of four transform kernel combinations may be applied to each intra prediction mode, a transform combination index for selecting one of the transform kernel combinations may be transmitted every transform unit. In the present disclosure, the transform combination index may be called MTS index and expressed as mts_idx) [Koo: col. 12, line 42-58; Fig. 6], and perform transform to the transform coefficient or the modified transform coefficient according to the vertical transform type and the horizontal transform type ((The inverse secondary transform unit 231 performs an inverse secondary transform for the transform coefficients. Here, the inverse secondary transform represents an inverse transform of the secondary transform described in FIG. 4 above. As another embodiment, the secondary transform may adopt combinations of various transforms DST 7, DCT 8, DST 1, and DCT 5 of the multiple transform selection (MTS). For example, FIG. 6 may be adopted) [Koo: col. 11, line 22-30; Fig. 6]; (As a specific example, DST-7 and DST-5 may be applied in a row (horizontal) direction and a col= (vertical) direction in group 0, and as a result, a total of four combinations are available. Since a total of four transform kernel combinations may be applied to each intra prediction mode, a transform combination index for selecting one of the transform kernel combinations may be transmitted every transform unit. In the present disclosure, the transform combination index may be called MTS index and expressed as mts_idx) [Koo: col. 12, line 46-58; Fig. 6]). Koo does not explicitly disclose the following claim limitations (Emphasis added). a secondary index, stldx. However, in the same field of endeavor Koo_273 further discloses the deficient claim limitations as follows: a secondary index, stldx (i.e. In another embodiment of the present disclosure, data hiding and implicit coding methods for transform indicators are introduced. Here, transform indicators may include ST_idx, UTI_idx, EMT_CU_Flag, EMT_TU_Flag, NSST_Idx and any sort of transform related index which corresponding information may be inserted in a coefficient coding process (it can be extracted during a coefficient coding process)) [Koo_273: para. 0244]). It would have been obvious to one with an ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Koo with Koo_273 to program the system to implement Koo_273’s method. Therefore, the combination of Koo with Koo_273 will enable the system to transform efficiency by determining and applying a transform suitable for a current bloc [Koo_273: para. 0016]. Reference Notice Additional prior arts, included in the Notice of Reference Cited, made of record and not relied upon is considered pertinent to applicant's disclosure. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to Philip Dang whose telephone number is (408) 918-7529. The examiner can normally be reached on Monday-Thursday between 8:30 am - 5:00 pm (PST). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sath Perungavoor can be reached on 571-272-7455. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000./Philip P. Dang/Primary Examiner, Art Unit 2488
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Prosecution Timeline

Jun 30, 2025
Application Filed
Aug 20, 2026
Non-Final Rejection mailed — §103
Oct 16, 2026
Response Filed

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2y 7m (~1y 4m remaining)
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