DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
As required by M.P.E.P. ' 609 (C), the applicant's submission of the Information Disclosure Statement dated August 12th, 2025, September 10th, 2025, November 11th, 2025, December 10th, 2025, January 13th, 2026, February 14th and 27th, 2026, May 20th, 2026, June 5th, 2026, July 27th, 2026, and September 30th, 2026, are acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending. As required by M.P.E.P. ' 609 C(2), a copy of the PTOL-1449 initialed and dated by the examiner is attached to the instant office action.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 7, 9, and 12 of U.S. Patent No. 12,379,867. Although the claims at issue are not identical, they are not patentably distinct from each other.
Claim 1 of U.S. Patent 12,379,867 contains every element of claims 1, 10, and 11 of the instant application and as such anticipates claims 1, 10, and 11 of the instant application.
Claim 7 of U.S. Patent 12,379,867 contains every element of claim 12 of the instant application and as such anticipates claim 12 of the instant application.
Claim 9 of U.S. Patent 12,379,867 contains every element of claim 19 of the instant application and as such anticipates claim 19 of the instant application.
Claim 12 of U.S. Patent 12,379,867 contains every element of claims 14-16 of the instant application and as such anticipates claims 14-16 of the instant application.
“A later patent claim is not patentably distinct from an earlier patent claim if the later claim is obvious over, or anticipated by, the earlier claim. In re Longi, 759 F.2d at 896, 225 USPQ at 651 (affirming a holding of obviousness-type double patenting because the claims at issue were obvious over claims in four prior art patents); In re Berg, 140 F.3d at 1437, 46 USPQ2d at 1233 (Fed. Cir. 1998) (affirming a holding of obviousness-type double patenting where a patent application claim to a genus is anticipated by a patent claim to a species within that genus). “ ELI LILLY AND COMPANY v BARR LABORATORIES, INC., United States Court of Appeals for the Federal Circuit, ON PETITION FOR REHEARING EN BANC (DECIDED: May 30, 2001).
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-11, 14-15, and 18-20 are rejected under 35 U.S.C. 102(A)(1) as being anticipated by Dewan et al. [US2022/0004668]. Dewan teaches lockable partition in NVME drives with drive migration support.
Regarding claims 1, 14, and 19, Dewan teaches a device [Dewan abstract “…NVME…”], comprising:
a memory [Dewan paragraph 0021, middle lines “…that communicate with main memory 104 (such as one or more Double Data Rate (DDR) Dynamic Random Access Memory (DRAM) modules) via a system fabric 106…”]; and
a processor coupled to the memory [Dewan paragraph 0021, middle lines “…The system 100 includes one or more processor/cores 102 that communicate with main memory 104…”], the processor configured to:
receive, via an interface connected to a storage product [Dewan paragraph 0023, first lines “…a storage controller such as an SPI (Serial Peripheral Interface) controller…”], storage access messages from the storage product [Dewan paragraph 0041, first lines “…a new command directed that lockable partition is received…”(where the specification states that messages can be commands)], wherein the storage access messages request access to a secure memory region of the storage product [Dewan paragraph 0043, first lines “…whether the new command of operation 302 is requesting an unlocking of the partition…”];
determine whether the storage access messages are permitted or prohibited to provide access to the secure memory region [Dewan paragraph 0043, middle lines “…If the partition is determined to be locked at 404, operation 408 determines whether a hash of the device key and command (i.e., HMAC[Device Key, Command]) is successful. If so, method 400 terminates at operation 410 with a successful command and unlocking the partition…”] based on a selection criteria stored in the memory [Dewan paragraph 0084, middle lines “…wherein the cryptographic key is to be programmed into the NVM device…”]; and
send, to the storage product, messages indicative of whether the storage access messages are permitted or prohibited to provide access to the secure memory region [Dewan paragraph 0043, most lines “…If the partition is determined to be unlocked at 404, method 400 terminates at operation 406 with a successful command handling and no further operation (NOP). If the partition is determined to be locked at 404, operation 408 determines whether a hash of the device key and command (i.e., HMAC[Device Key, Command]) is successful. If so, method 400 terminates at operation 410 with a successful command and unlocking the partition. If the hash function determination at 408 is unsuccessful, method 400 terminates at operation 412, indicating the failure of the command…”(The examiner has determined that successful commands to unlock reads on permitted and indicating the failure of the command reads on prohibited access.)].
Regarding claim 2, as per claim 1, Dewan teaches the processor is further configured to generate, based on user inputs via a user interface of the device [Dewan paragraph 0037, last lines “…the reset key can be physically printed or barcoded onto the drive such that only physical access of the drive will allow someone to access the reset key. In one embodiment, the reset behavior with the reset key includes deleting all the contents of the partition and deleting the device key from the drive…”(user has to access the reset key)], a control message to perform an administrative or management operation at the storage product [Dewan paragraph 0033, most lines “…the platform can reset the key in the drive by writing a reset command R, R=HMAC (Key, “Reset”, OPTIONS). This ensures only the software that has the device key can perform the reset. While some embodiments are discussed herein with reference to a “command”, embodiments are not limited to this and any mechanism may be used to cause a device (such as an NVMe drive or other storage device) to perform one or more of the operations discussed with reference to the command, including for example causing the device to perform an operation by writing to a register or a physical interface…”(Where the reset reads on the control message.)].
Regarding claim 3, as per claim 1, Dewan teaches the control message causes the storage product to create a user account, record or change access credentials for a user, or generate a namespace [Dewan paragraph 0033, most lines “…the platform can reset the key in the drive by writing a reset command R, R=HMAC (Key, “Reset”, OPTIONS). This ensures only the software that has the device key can perform the reset. While some embodiments are discussed herein with reference to a “command”, embodiments are not limited to this and any mechanism may be used to cause a device (such as an NVMe drive or other storage device) to perform one or more of the operations discussed with reference to the command, including for example causing the device to perform an operation by writing to a register or a physical interface…”(Where resetting the key reads on changing access credentials for a user.)].
Regarding claim 4, as per claim 1, Dewan teaches the processor is further configured to send and/or receive control messages configured to sign the device into the storage product to start a session;
perform a read or write operation [Dewan paragraph 0057, middle lines “…the memory unit 670 and the physical register file(s) unit(s) 658 perform the write back/memory write stage 618…”];
generate a namespace in the storage product;
create, delete, open, or close a file name in the namespace;
or set a security attribute of the storage product.
Regarding claims 5 and 20, as per claim 1, Dewan the storage product is a first storage product, and wherein the processor is further configured to determine whether second storage access messages associated with a second storage product are permitted or prohibited to provide access to at least a portion of the second storage product [Dewan paragraph 0055, last lines “…The scheduler unit(s) 656, physical register file(s) unit(s) 658, and execution cluster(s) 660 are shown as being possibly plural because certain embodiments create separate pipelines for certain types of data/operations (e.g., a scalar integer pipeline, a scalar floating point/packed integer/packed floating point/vector integer/vector floating point pipeline, and/or a memory access pipeline that each have their own scheduler unit, physical register file(s) unit, and/or execution cluster—and in the case of a separate memory access pipeline, certain embodiments are implemented in which only the execution cluster of this pipeline has the memory access unit(s) 664). It should also be understood that where separate pipelines are used, one or more of these pipelines may be out-of-order issue/execution and the rest in-order…”(The examiner has determined its implied that the pipeline would have a second access message after the first and would operate using the same process as detailed in the above rejection.).
Regarding claims 6 and 15, as per claim 1,Dewan the storage access messages received from the storage product are a subset of messages received at the storage product via a network interface [Dewan paragraph 0051, last lines “…The solid lined boxes in FIGS. 6A-B illustrate the in-order pipeline and in-order core, while the optional addition of the dashed lined boxes illustrates the register renaming, out-of-order issue/execution pipeline and core. Given that the in-order aspect is a subset of the out-of-order aspect, the out-of-order aspect will be described….”].
Regarding claims 7 and 15, as per claim 1, Dewan teaches the subset of messages to be selected for processing by the device are specified by the device in at least one selection criteria sent from the device to the storage product [Dewan paragraph 0043, first lines “…operation 402 determines whether the new command of operation 302 is requesting an unlocking of the partition and if so operation 404 determines whether the partition is locked…”(The selection criteria is the criteria that the command is accessing the private area.)].
Regarding claim 8, as per claim 1, Dewan teaches the at least one selection criteria relates at least one of the following attributes or parameters of the storage access messages:
command type, command category, storage destination [Dewan paragraph 0043, first lines “…operation 402 determines whether the new command of operation 302 is requesting an unlocking of the partition and if so operation 404 determines whether the partition is locked…”(The selection criteria is the criteria that the command is accessing the private area.)], data source, data size, user account, access type, time of day, or date.
Regarding claim 9, as per claim 1, Dewan teaches the subset of messages is a first subset of messages, wherein a second subset of messages that is different from the first subset is processed by the storage product and not sent to the device [Dewan paragraph 0076, middle lines “…where one or more of processor cores 902A to 902N execute a first instruction set, while at least one of the other cores executes a subset of the first instruction set or a different instruction set…”].
Regarding claims 10 and 18, as per claim 1, Dewan teaches the storage access messages are validated by the storage product according to an access control key prior to being received by the device [Dewan paragraph 0043, middle lines “…If the partition is determined to be locked at 404, operation 408 determines whether a hash of the device key and command (i.e., HMAC[Device Key, Command]) is successful. If so, method 400 terminates at operation 410 with a successful command and unlocking the partition…”].
Regarding claim 11, as per claim 1, Dewan teaches other storage access not validated by the storage product according to the access control key are not sent from the storage product to the device [Dewan paragraph 0043, last lines “…If the hash function determination at 408 is unsuccessful, method 400 terminates at operation 412, indicating the failure of the command…”].
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 12-13 and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Dewan et al. [US2022/0004668] in view of Liang et al. [US2013/0067254]. Dewan teaches lockable partition in NVME drives with drive migration support. Liang teaches host
Regarding claims 12 and 16, as per claim 1, Dewan fails to explicitly teach the processor is further configured to generate, based on a determination that a given storage access message of the storage access messages is permitted to provide access to the secure memory region, a verification code.
However, Liang does teach the processor is further configured to generate, based on a determination that a given storage access message of the storage access messages is permitted to provide access to the secure memory region, a verification code [Liang paragraph 0012, most lines “…the host computer 1 using the capacitor 210 when the host computer 1 is powered on, obtains data from the storage device 12, and generates a verification code according to the data. In the embodiment, the verification code is a checksum code for checking data errors during the data transmission between the host computer 1 and the slave device 2. The data sending module 101 generates a data packet by packing the verification code into the data, and sends the data packet to the slave device 2 through the data communication port 3…”].
Dewan and Liang are analogous arts in that they both deal with verifying storage accesses.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Dewan’s storage verification with Liang’s known teachings of generating a verification code and sending it with the data to the storage device for the benefit of ensuring the integrity of the data during power off events [Liang paragraph 0004, first lines “…To ensure the integrity of the data stored in a slave device, the host computer may detect data transmission errors of the data using a checksum method…”].
Regarding claims 13 and 17, as per claim 1, Liang teaches the processor is further configured to send, to the storage product, the verification code [Liang paragraph 0019, most lines “…the data sending module 101 generates a data packet by packing the verification code into the data, and sends the data packet to the slave device 2 through the data communication port 3. In one embodiment, the verification code can be packed into a header of the data packet…”].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Wei et al. [US11,588,819] Wei teaches S3 buckets that are secure and require authentication through whitelisting.
Kobayashi et al. [US2014/0075195] Kobayashi teaches secure USB drive authentication between management servers.
Jones et al. [US2020/0387878] Even though Jones teaches billing messages the claims are broad enough to read on it. Jones teaches users sending control messages.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC CARDWELL whose telephone number is (571)270-1379. The examiner can normally be reached on Monday - Friday 10-6pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached on (571) 272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ERIC CARDWELL/Primary Examiner, Art Unit 2139
