Prosecution Insights
Last updated: October 02, 2026
Application No. 19/258,190

ELECTRONIC DEVICE AND METHOD FOR CHANGING CIRCUIT CONNECTED TO DISPLAY PANEL

Final Rejection §103
Filed
Jul 02, 2025
Priority
Jan 20, 2023 — RE 10-2023-0008841 +2 more
Examiner
LAMB, CHRISTOPHER RAY
Art Unit
2622
Tech Center
2600 — Communications
Assignee
Samsung Electronics Co., Ltd.
OA Round
2 (Final)
52%
Grant Probability
Moderate
3-4
OA Rounds
2y 0m
Est. Remaining
62%
With Interview

Examiner Intelligence

Grants 52% of resolved cases
52%
Career Allowance Rate
369 granted / 705 resolved
-9.7% vs TC avg
Moderate +9% lift
Without
With
+9.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
20 currently pending
Career history
735
Total Applications
across all art units

Statute-Specific Performance

§101
2.5%
-37.5% vs TC avg
§103
56.5%
+16.5% vs TC avg
§102
22.3%
-17.7% vs TC avg
§112
14.9%
-25.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 705 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-9 and 12-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Murahashi et al. (US 2010/0225635; disclosed in IDS) in view of Wetherell et al. (US 11,645,957) Regarding claim 1: Murahashi discloses: An electronic device (e.g., paragraph 130) comprising: memory storing instructions (follows from paragraph 130, 131, etc.: a memory and instructions are necessary for the device to carry out these operations); a processor comprising processing circuitry (paragraph 130); a display panel including a plurality of sub-pixels (paragraph 130: “pixel”); and control circuitry including a gate driver for controlling driving of each of the plurality of sub-pixels (paragraph 268: “scanning-side driving circuit”) and a source driver for controlling a data voltage for each of the plurality of sub-pixels (paragraph 268: “data-side driving circuit”), wherein the source driver includes a channel circuit set including a plurality of channel circuits respectively connected to the plurality of sub-pixels (shown in Fig. 1, where the channels receive signals STR1, STR2, etc.) and a first channel circuit disconnected from the plurality of sub-pixels (the “spare output circuit block” of Fig. 2, where it includes multiple elements are per paragraph 140 – this receives signal TSTR1 in Fig. 1), and sensing circuitry, wherein the instructions, when executed by the control circuitry, are configured to cause the electronic device to: identify an event for changing a first state that the display panel is off to a second state that the display panel is on (paragraph 185: “the display device is turned ON,”), in response to the event, respectively identify, via at least the sensing circuitry and the sensing line, signals output via the plurality of channel circuits in the first state (paragraphs 133-134, where this occurs after this even as per paragraph 185 – “then, the control circuit outputs the test signals…”), disconnect a second channel circuit outputting a signal having a voltage different from a reference voltage from among the plurality of channel circuits in the first state from a sub-pixel connected to the second channel circuit, and connect the sub-pixel to the first channel circuit (paragraph 135, or, as per paragraph 185, “the control circuit replaces a defective circuit with a spare circuit”), and display an image via the display panel based on the plurality of channel circuits including the first channel circuit in the second state changed from the first state based on the event (paragraph 135). Murahashi does not disclose: that the sensing circuitry is “connected to an output terminal of the plurality of channel circuits via one common sensing line,” Wetherell discloses sensing circuitry connected to an output terminal of the plurality of channel circuits via one common sensing line (e.g., Fig. 7, where the test circuit 68 is connected via common line 60). It would have been obvious to one of ordinary skill in the art at the time the application was filed to include in Murahashi the elements taught by Wetherell. The rationale is as follows: Murahashi and Wetherell are directed to the same field of art. Wetherell discloses that this allows testing one, all, or some combination of source drivers simultaneously (column 7, lines 45-60) and that using multiplexers requires adding less components to the display (column 9, lines 10-20). This is a known improvement that one of ordinary skill in the art could have included with predictable results. Regarding claim 2: Murahashi in view of Wetherell discloses: wherein the instructions, when executed by the control circuitry, cause the electronic device to: in the first state, respectively identify, via at least the sensing circuitry, a first set of signals output via the plurality of channel circuits in a first partial time interval from among a plurality of partial time intervals in a first time interval triggered in response to the event, and in the first state, respectively identify, via at least the sensing circuitry, a second set of signals output via the plurality of channel circuits in a second partial time interval subsequent to the first partial time from among the plurality of partial time intervals (from, e.g., Murahashi paragraph 155, it repeatedly outputs sensing circuits until the counter reaches the maximum). Regarding claim 3: Murahashi in view of Wetherell discloses: wherein the instructions, when executed by the control circuitry, cause the electronic device to: sequentially compare, via at least the sensing circuitry in the first partial time interval, a first reference voltage to the first set of signals corresponding to the plurality of channel circuits, and sequentially compare, via at least the sensing circuitry in the second partial time interval, a second reference voltage to the second set of signals corresponding to the plurality of channel circuits, and wherein the first reference voltage and the second reference voltage are included in a reference voltage set identified based on a gradation capable of being represented by a channel circuit (Murahashi paragraph 155). Regarding claim 4: Murahashi in view of Wetherell discloses: wherein the instructions, when executed by the control circuitry, cause the electronic device to: generate a flag for identifying the second channel circuit in response to identifying the second channel circuit, and based on the flag, disconnect the sub-pixel from the second channel circuit and connect the sub-pixel to the first channel circuit (Murahashi paragraph 139). Regarding claim 5: Murahashi in view of Wetherell discloses: wherein the signals are identified in a first time interval triggered in response to the event, and wherein the sub-pixel is configured to be disconnected from the second channel circuit and connected to the first channel circuit in a second time interval subsequent to the first time interval follows from, e.g., Murahashi paragraph 139 – it doesn’t connect them until after the test). Regarding claim 6: Murahashi in view of Wetherell discloses: wherein the sub-pixel is configured to be connected to the first channel circuit before the display panel is changed from the first state to the second state (true in that the test is performed when the display is turned on, but before anything is actually displayed: the displaying can be considered “on” in which case this is true depending on the result of the test). Regarding claim 7: Murahashi in view of Wetherell discloses: wherein the instructions, when executed by the control circuitry, cause the electronic device to: receive, from the processor, a command for changing a state of the display panel in response to the event, and transmit, to the display panel, a signal for changing the display panel from the first state to the second state based on the command (Murahashi doesn’t show the signal itself but it must have one as it does display the image after the test). Regarding claim 8: Murahashi in view of Wetherell discloses: wherein the instructions, when executed by the control circuitry, cause the electronic device to: in response to identifying the signal having the voltage different from the reference voltage, change at least one switch connecting the sub-pixel and the second channel circuit from an on state to an off state, and change at least one another switch connecting the sub-pixel and the first channel circuit from an off state to an on state (Murahashi paragraph 139). Regarding claim 9: Murahashi in view of Wetherell discloses: wherein the instructions, when executed by the control circuitry, cause the electronic device to: drive the gate driver in response to the sub-pixel being connected to the first channel circuit (e.g., Murahashi paragraph 185: “starts the normal operation,” where this includes a gate driver as per, e.g., paragraph 268). Regarding claim 12: Murahashi in view of Wetherell discloses: wherein the electronic device further comprises another sensing circuitry, wherein the sensing circuitry is connected to a first set of sub-pixels from among the plurality of sub-pixels and a first set of channel circuits from among the plurality of channel circuits, and wherein the another sensing circuitry is connected to a second set of sub-pixels excluding the first set of sub-pixels from among the plurality of sub-pixels and a second set of channel circuits excluding the first set of channel circuits from among the plurality of channel circuits (there are multiple circuits as shown in, e.g., Murahashi Fig. 1). Regarding claim 13: Murahashi in view of Wetherell discloses: wherein each of the plurality of channel circuits includes at least one of a level shifter, a decoder, a switch, or an amplifier, and wherein the sensing circuitry includes a comparator (Murahashi paragraph 145). Regarding claims 14-20: These are claims to the method performed by the device of the earlier claims and are met when the device operates. No further elaboration is necessary. Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Murahashi in view of Wetherell, and further in view of applicant’s admitted prior art. Regarding claim 10: Murahashi in view of Wetherell discloses an electronic device as discussed above. Murahashi in view of Wetherell does not disclose: “wherein the event includes at least one of a gesture, a touch input, or an input for a button exposed to an outside of the electronic device, for changing the first state to the second state.” “The event” is turning on the display panel. In a prior Office Action, the Examiner took Official Notice that wherein the event (turning on a display) includes at least one of a gesture, a touch input, or an input for a button exposed to an outside of the electronic device, for changing the first state to the second state was commonly known in the art at the time the application was filed. This is now taken as admitted prior art. It would have been obvious to one of ordinary skill in the art at the time the application was filed to include this in Murahashi in view of Wetherell. The rationale is as follows: Murahashi discloses the user turns it on (e.g., paragraph 247). These are all common ways of turning a display on. One of ordinary skill in the art could have included this with predictable results. Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Murahashi in view of Wetherell, and further in view of Kim et al. (US 11,322,066) Regarding claim 11: Murahashi in view of Wetherell discloses an electronic device as discussed above. Murahashi in view of Wetherell does not disclose: “wherein a number of the plurality of channel circuits is changed based on a number of the plurality of sub-pixels identified according to a pentile.” Kim discloses: Sub-pixels may be arranged in a pentile (column 5, lines 60 to column 6, line 10). It would have Murahashi in view of Wetherell obvious to one of ordinary skill in the art at the time the application was filed to include in Murahashi wherein a number of the plurality of channel circuits is changed based on a number of the plurality of sub-pixels identified according to a pentile, as suggested by Kim. The rationale is as follows: Murahashi, Wetherell, and Kim are directed to the same field of art. Kim discloses this is one of many possible arrangements of the sub-pixels, all used in the same environment, for the same purpose, and achieving the same reult. One of ordinary skill could have picked the appropriate arrangement. Response to Arguments Applicant's arguments filed 15 June 2026 have been fully considered but they are not persuasive. Applicant argued the new language of the claim rendered it allowable over Murahashi. It is true that Murahashi does not disclose this amended language. However, this is just multiplexing the output to a common test circuit. This is known in this specific situation as shown by Wetherell, which has now been relied upon. Therefore applicant’s arguments are not persuasive in view of the new grounds of rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER RAY LAMB whose telephone number is (571)272-5264. The examiner can normally be reached 8:30-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Patrick Edouard can be reached at 571-272-7603. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTOPHER R LAMB/Primary Examiner, Art Unit 2622
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Prosecution Timeline

Jul 02, 2025
Application Filed
Mar 26, 2026
Non-Final Rejection mailed — §103
May 23, 2026
Interview Requested
Jun 02, 2026
Applicant Interview (Telephonic)
Jun 02, 2026
Examiner Interview Summary
Jun 15, 2026
Response Filed
Sep 11, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
52%
Grant Probability
62%
With Interview (+9.2%)
3y 3m (~2y 0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 705 resolved cases by this examiner. Grant probability derived from career allowance rate.

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