DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No.12,373,134. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-20 of patent 12,373,134, and the following analysis:
Application 19/258,437
U.S. Patent 12,373,134
1. A memory system comprising: a memory device; and a memory controller coupled to the memory device and configured to: receive, from a host, a request for an improvement level of a file stored in the memory device; in response to the request, obtain address mapping data , the address mapping data comprising mapping relationships between a plurality of logical addresses of the file and a plurality of physical addresses storing the file in the memory device; determine the improvement level based on a consecutive level of the plurality of physical addresses; and send the improvement level to the host.
2. The memory system according to claim 1, wherein obtaining the address mapping data comprises: reading a logical to physical (L2P) address mapping table from the memory device; and obtaining the address mapping data from the L2P address mapping table.
1. A method for operating a memory controller, comprising: receiving, from a host, a request for a fragmentation level of a file stored in a memory device; reading a logical-to-physical (L2P) address mapping table from the memory device, the L2P address mapping table corresponding to the file; determining a read performance level of the file based on an average consecutive physical address length of the file and the L2P address mapping table; and determining the fragmentation level based on the read performance level.
2. The method according to claim 1, wherein the request comprises a plurality of logical addresses of the file, and wherein determining the read performance level of the file comprises: determining the average consecutive physical address length of the file based on the plurality of logical addresses of the file and the L2P address mapping table; and determining the read performance level based on at least the average consecutive physical address length and a predetermined read performance curve.
3. The memory system according to claim 1, wherein the memory controller is further configured to: receive, from the host, a command indicating to perform defragmentation, wherein the host sends the command in response to determining that the improvement level is above an improvement level threshold; and perform the defragmentation based on the received command.
12. The method according to claim 1, further comprising: returning the fragmentation level to the host; receiving a command from the host to perform defragmentation, wherein the host transmits the command in response to determining that the fragmentation level is above a fragmentation level threshold; and performing the defragmentation based on the received command.
4. The memory system according to claim 1, wherein the memory controller is configured to not read the file from the memory device in response to the request.
5. The memory system according to claim 1, wherein the consecutive level of the plurality of physical addresses comprises an average consecutive physical address length; and wherein determining the improvement level comprises: determining the average consecutive physical address length of the file based on the plurality of logical addresses and a plurality of physical addresses; determining a read performance level based on at least the average consecutive physical address length and a predetermined read performance curve; and determining the improvement level based on the read performance level.
2. The method according to claim 1, wherein the request comprises a plurality of logical addresses of the file, and wherein determining the read performance level of the file comprises: determining the average consecutive physical address length of the file based on the plurality of logical addresses of the file and the L2P address mapping table; and determining the read performance level based on at least the average consecutive physical address length and a predetermined read performance curve.
4. The method according to claim 3, wherein: each logical address of the plurality of logical addresses is a logical block address (LBA); and each physical address in the physical address segments is a physical block address (PBA).
6. The memory system according to claim 5, wherein determining the average consecutive physical address length comprises: determining physical address segments according to the plurality of logical addresses and a plurality of physical addresses, wherein each of the physical address segments comprises one or more consecutive physical addresses; and determining the average consecutive physical address length based on a sum of a quantity of the one or more consecutive physical addresses comprised in each of the physical address segments and a quantity of the physical address segments.
3. The method according to claim 2, wherein determining the average consecutive physical address length of the file comprises: mapping the plurality of logical addresses to physical address segments according to the L2P address mapping table, wherein each of the physical address segments comprises one or more consecutive physical addresses; and determining the average consecutive physical address length, wherein the average consecutive physical address length is determined based on a sum of a quantity of the one or more consecutive physical addresses comprised in each of the physical address segments and a quantity of the physical address segments.
4. The method according to claim 3, wherein: each logical address of the plurality of logical addresses is a logical block address (LBA); and each physical address in the physical address segments is a physical block address (PBA).
7. The memory system according to claim 5, wherein determining the read performance level comprises: determining a first read performance level corresponding to the average consecutive physical address length based on the predetermined read performance curve; determining whether the average consecutive physical address length is larger than a threshold; in response to determining that the average consecutive physical address length is larger than the threshold, determining the first read performance level as the read performance level; and in response to determining that the average consecutive physical address length is not larger than the threshold, obtaining a second read performance level and determining the second read performance level as the read performance level.
6. The method according to claim 2, wherein determining the read performance level comprises: determining an initial read performance level corresponding to the average consecutive physical address length based on the predetermined read performance curve; and determining whether the average consecutive physical address length is larger than a threshold.
7. The method according to claim 6, wherein determining the read performance level further comprises: in response to determining that the average consecutive physical address length is larger than the threshold, determining the read performance level as the initial read performance level.
8. The memory system according to claim 7, wherein: the second read performance level is obtained by adjusting the first read performance level based on a value that is determined based on a distribution of the plurality of physical addresses among a number of planes of the memory device; the value is determined based on how evenly the plurality of physical addresses are spread among the number of planes of the memory device; and the value is smaller if the plurality of physical addresses are spread more evenly among the number of planes of the memory device.
8. The method according to claim 6, wherein determining the read performance level further comprises: in response to determining that the average consecutive physical address length is not larger than the threshold, determining the read performance level as the initial read performance level adjusted by a value that is determined based on a distribution of physical addresses of the file among a number of planes of the memory device.
9. The method according to claim 8, wherein: the read performance level is determined based on the initial read performance level and the value; and the value is determined based on how evenly the physical addresses of the file are spread among the number of planes of the memory device.
9. The memory system according to claim 1, wherein the request is a File Based Optimization (FBO) request under a Universal Flash Storage (UFS) 4.0 technical standard.
11. The method according to claim 1, wherein the request is a File Based Optimization (FBO) request under a Universal Flash Storage (UFS) 4.0 technical standard.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-2, 4, 10-11, 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Duzly et al (U.S. 9,645,741), and in view of Wu et al (U.S. 2024/0394164, PCT date 7/25/2022).
Regarding claim 1:
A memory system comprising: a memory device; and a memory controller coupled to the memory device and configured to: receive, from a host, a request for an improvement level of a file stored in the memory device; determine the improvement level; and send the improvement level to the host. Duzly, exemplary Fig. 1, host 240, memory system 100 comprises storage controller 110 coupled to NAN memory dies 120, and host 240. Fig. 4, and corresponding text, host 240 sends a query to the storage system 100 with logical block address (LBA) ranges of a file for defragmentation (Fig. 4, 440). In response to the query, storage 100 (controller 110) provides the host 240 with a defragmentation metric (improvement level) for the file. (Duzly, Fig.4, 4:60-65, 5:1-20). A defragmentation metric reflects the level of fragmentation for a file, and its value relates to the degree of such fragmentation. An example of a defragmentation metric can include the number of physical blocks containing the file (5:10-15).
However, Duzly does not teach in response to the request, obtain address mapping data , the address mapping data comprising mapping relationships between a plurality of logical addresses of the file and a plurality of physical addresses storing the file in the memory device;
determine the improvement level based on a consecutive level of the plurality of physical addresses; Wu, in analogous art of memory performance management (abstract), discloses as a data file becomes more fragmented, the parallelism or other access efficiencies of the memory system 110 may suffer. To improve access performance, the memory system 110 may implement a maintenance operation such as a defragmentation operation that writes a fragmented data file to continuous blocks (¶0038). The memory system 110 may use address mapping information, such as an address mapping table (e.g., an L2P table), to determine whether a given data file is fragmented enough to warrant a maintenance operation, thereby avoiding reading the entire data file, (¶0039); The fragment level of a memory die may be based on (e.g., proportional to) or in response to the quantity of access operations for reading the portion of the data file written to that memory die; To determine the quantity of access operations for a memory die, the memory system may consider the following metrics associated with the memory die: changes in memory dies, changes in page lines, and quantities of non-sequentially indexed physical addresses (e.g., PPAs) (¶0072-¶0073). Fig. 4, and corresponding text, 405, determining LBA range of a file, 410 determining address mapping information (physical address corresponding to the LBA of the file), 450, performing defragmentation. It is noted that Wu discloses the fragment level is determined based on quantities of non-sequentially indexed physical addresses. However, there is a finite choice between using sequential/consecutive physical addresses or non-sequential physical addresses to determine fragmentation of data/file. Thus, one skilled in the art would be able to consider either option when determine fragmentation of data/file.
Duzly in Fig.3A and 3B shows an exemplary of file fragmentation in multiple memory locations/blocks. Duzly also discloses host 240 sends a query to the storage system 100 with logical block address (LBA) ranges of a file for defragmentation (Fig. 4, 440), as presented above. Wu discloses the idea of determining fragmentation of a file, based on the contiguity of physical address via L2P table. Thus, one of ordinary skill in the art, before the effective filing data of the claimed invention, would have been motivated to incorporate the disclosure/teaching of Wu into Duzly to obtain the claimed limitations above. The motivation for doing so is to apply a known technique, into the apparatus/system, ready for improvement of Duzly, to yield predictable result.
Regarding claim 2:
The memory system according to claim 1, wherein obtaining the address mapping data comprises: reading a logical to physical (L2P) address mapping table from the memory device; and obtaining the address mapping data from the L2P address mapping table. Wu, The memory system 110 may use address mapping information, such as an address mapping table (e.g., an L2P table), to determine whether a given data file is fragmented enough to warrant a maintenance operation, thereby avoiding reading the entire data file, (¶0039, ¶0070);
Regarding claim 4:
The memory system according to claim 1, wherein the memory controller is configured to not read the file from the memory device in response to the request. Wu, to improve access performance, the memory system 110 may implement a maintenance operation such as a defragmentation operation that writes a fragmented data file to continuous blocks (¶0038). The memory system 110 may use address mapping information, such as an address mapping table (e.g., an L2P table), to determine whether a given data file is fragmented enough to warrant a maintenance operation, thereby avoiding reading the entire data file, (¶0039).
Regarding claim 10:
A method of operating a memory system including a memory device and a memory controller, comprising: receiving, from a host, a request for an improvement level of a file stored in the memory device; determining the improvement level [based on a consecutive level of the plurality of physical addresses]; and sending the improvement level to the host.
Duzly, exemplary Fig. 1, host 240, memory system 100 comprises storage controller 110 coupled to NAN memory dies 120, and host 240. Fig. 4, and corresponding text, host 240 sends a query to the storage system 100 with logical block address (LBA) ranges of a file for defragmentation (Fig. 4, 440). In response to the query, storage 100 (controller 110) provides the host 240 with a defragmentation metric (improvement level) for the file. (Duzly, Fig.4, 4:60-65, 5:1-20). A defragmentation metric reflects the level of fragmentation for a file, and its value relates to the degree of such fragmentation. An example of a defragmentation metric can include the number of physical blocks containing the file (5:10-15).
However, Duzly does not teach in response to the request, obtaining address mapping data, the address mapping data comprising mapping relationships between a plurality of logical addresses of the file and a plurality of physical addresses storing the file in the memory device; determining the improvement level based on a consecutive level of the plurality of physical addresses; and sending the improvement level to the host. Wu, in analogous art of memory performance management (abstract), discloses as a data file becomes more fragmented, the parallelism or other access efficiencies of the memory system 110 may suffer. To improve access performance, the memory system 110 may implement a maintenance operation such as a defragmentation operation that writes a fragmented data file to continuous blocks (¶0038). The memory system 110 may use address mapping information, such as an address mapping table (e.g., an L2P table), to determine whether a given data file is fragmented enough to warrant a maintenance operation, thereby avoiding reading the entire data file, (¶0039); The fragment level of a memory die may be based on (e.g., proportional to) or in response to the quantity of access operations for reading the portion of the data file written to that memory die; To determine the quantity of access operations for a memory die, the memory system may consider the following metrics associated with the memory die: changes in memory dies, changes in page lines, and quantities of non-sequentially indexed physical addresses (e.g., PPAs) (¶0072-¶0073). Fig. 4, and corresponding text, 405, determining LBA range of a file, 410 determining address mapping information (physical address corresponding to the LBA of the file), 450, performing defragmentation. It is noted that Wu discloses the fragment level is determined based on quantities of non-sequentially indexed physical addresses. However, there is a finite choice between using sequential/consecutive physical addresses or non-sequential physical addresses to determine fragmentation of data/file. Thus, one skilled in the art would be able to consider either option when determine fragmentation of data/file.
Duzly in Fig.3A and 3B shows an exemplary of file fragmentation in multiple memory locations/blocks. Duzly also discloses host 240 sends a query to the storage system 100 with logical block address (LBA) ranges of a file for defragmentation (Fig. 4, 440), as presented above. Wu discloses the idea of determining fragmentation of a file, based on the contiguity of physical address via L2P table. Thus, one of ordinary skill in the art, before the effective filing data of the claimed invention, would have been motivated to incorporate the disclosure/teaching of Wu into Duzly to obtain the claimed limitations above. The motivation for doing so is to apply a known technique, into the apparatus/system, ready for improvement of Duzly, to yield predictable result.
Regarding claim 11:
The method according to claim 10, wherein obtaining the address mapping data comprises: reading a logical to physical (L2P) address mapping table from the memory device; and obtaining the address mapping data from the L2P address mapping table. Wu, The memory system 110 may use address mapping information, such as an address mapping table (e.g., an L2P table), to determine whether a given data file is fragmented enough to warrant a maintenance operation, thereby avoiding reading the entire data file, (¶0039, ¶0070).
Regarding claim 16:
Claims 16 recites a computer storage medium, or computer readable medium claim type, which carries functions/method similar to those in claims 1, and/or 10. Thus, claim 16 is rejected under same rationale cited in claims 1, and 10 (See Duzly, 4:20-35 for computer-readable medium).
Regarding claim 17:
A system, comprising: a host, configured to send a request for an improvement level of a file; and a memory system comprising a memory device storing the file and a memory controller, Duzly, exemplary Fig. 1, host 240, memory system 100 comprises storage controller 110 coupled to NAN memory dies 120, and host 240. Fig. 4, and corresponding text, host 240 sends a query to the storage system 100 with logical block address (LBA) ranges of a file for defragmentation (Fig. 4, 440).
wherein the memory controller is coupled to the host and the memory device and configured to: receive the request from the host; in response to the request, [obtain address mapping data, the address mapping data comprising mapping relationships between a plurality of logical addresses of the file and a plurality of physical addresses storing the file in the memory device;] determine the improvement level [based on a consecutive level of the plurality of physical addresses;] and send the improvement level to the host. In response to the query, storage 100 (controller 110) provides the host 240 with a defragmentation metric (improvement level) for the file. (Duzly, Fig.4, 4:60-65, 5:1-20). A defragmentation metric reflects the level of fragmentation for a file, and its value relates to the degree of such fragmentation. An example of a defragmentation metric can include the number of physical blocks containing the file (5:10-15).
However, Duzly does not teach in response to the request, obtain address mapping data, the address mapping data comprising mapping relationships between a plurality of logical addresses of the file and a plurality of physical addresses storing the file in the memory device; determine the improvement level based on a consecutive level of the plurality of physical addresses; Wu, in analogous art of memory performance management (abstract), discloses as a data file becomes more fragmented, the parallelism or other access efficiencies of the memory system 110 may suffer. To improve access performance, the memory system 110 may implement a maintenance operation such as a defragmentation operation that writes a fragmented data file to continuous blocks (¶0038). The memory system 110 may use address mapping information, such as an address mapping table (e.g., an L2P table), to determine whether a given data file is fragmented enough to warrant a maintenance operation, thereby avoiding reading the entire data file, (¶0039); The fragment level of a memory die may be based on (e.g., proportional to) or in response to the quantity of access operations for reading the portion of the data file written to that memory die; To determine the quantity of access operations for a memory die, the memory system may consider the following metrics associated with the memory die: changes in memory dies, changes in page lines, and quantities of non-sequentially indexed physical addresses (e.g., PPAs) (¶0072-¶0073). Fig. 4, and corresponding text, 405, determining LBA range of a file, 410 determining address mapping information (physical address corresponding to the LBA of the file), 450, performing defragmentation. It is noted that Wu discloses the fragment level is determined based on quantities of non-sequentially indexed physical addresses. However, there is a finite choice between using sequential/consecutive physical addresses or non-sequential physical addresses to determine fragmentation of data/file. Thus, one skilled in the art would be able to consider either option when determine fragmentation of data/file.
Duzly in Fig.3A and 3B shows an exemplary of file fragmentation in multiple memory locations/blocks. Duzly also discloses host 240 sends a query to the storage system 100 with logical block address (LBA) ranges of a file for defragmentation (Fig. 4, 440), as presented above. Wu discloses the idea of determining fragmentation of a file, based on the contiguity of physical address via L2P table. Thus, one of ordinary skill in the art, before the effective filing data of the claimed invention, would have been motivated to incorporate the disclosure/teaching of Wu into Duzly to obtain the claimed limitations above. The motivation for doing so is to apply a known technique, into the apparatus/system, ready for improvement of Duzly, to yield predictable result.
Claims 3, 12, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Duzly et al (U.S. 9,645,741), and in view of Wu et al (U.S. 2024/0394164, PCT date 7/25/2022), and further in view of Zilberstein et al (U.S. 2023/0195353).
Regarding claim 3:
The memory system according to claim 1, wherein the memory controller is further configured to: receive, from the host, a command indicating to perform defragmentation, wherein the host sends the command in response to determining that the improvement level is above an improvement level threshold; and perform the defragmentation based on the received command. Duzly suggests the idea of the host send a query for fragmentation level, and received the fragmentation level from the storage, as presented above. Duzly, Fig. 5, the host send defrag command to the storage (6:40-55). Duzly also discloses the storage sends the host the fragmentation level as presented above. However, Duzly does not teaches receive, from the host, a command indicating to perform defragmentation, wherein the host sends the command in response to determining that the improvement level is above an improvement level threshold. In an analogous art of storage fragmentation management (Zilberstein, abstract), Zilberstein discloses, a storage controller defines the storage fragmentation level and expected performance drop of a give file of LBA mapping based on a number of NAND sense operations, or read operations; when the performance level drop is below a certain threshold, a warning notification is sent to host to indicate that a defragmentation action should be performed (¶0039, ¶004-0042). With both teaching/suggestion of Duzly and Zilberstein, one ordinary skill in the art would be able to conclude that the host should send a defragmentation to the storage in response to the fragmentation/improvement level exceed a threshold. Thus, one of ordinary skill in the art, before the effective filing data of the claimed invention, would have been motivated to incorporate Zilberstein into the teaching of to obtain the claimed limitations above. The motivation for doing so is to apply a known technique to the system ready for improvement of Duzly to yield predictable result.
Regarding claim 12:
The method according to claim 10, further comprising: receiving, from the host, a command indicating to perform defragmentation, wherein the host sends the command in response to determining that the improvement level is above an improvement level threshold; and performing the defragmentation based on the received command. Duzly suggests the idea of the host send a query for fragmentation level, and received the fragmentation level from the storage, as presented above. Duzly, Fig. 5, the host send defrag command to the storage (6:40-55). Duzly also discloses the storage sends the host the fragmentation level as presented above. However, Duzly does not teaches receiving, from the host, a command indicating to perform defragmentation, wherein the host sends the command in response to determining that the improvement level is above an improvement level threshold; and performing the defragmentation based on the received command. In an analogous art of storage fragmentation management (Zilberstein, abstract), Zilberstein discloses, a storage controller defines the storage fragmentation level and expected performance drop of a give file of LBA mapping based on a number of NAND sense operations, or read operations; when the performance level drop is below a certain threshold, a warning notification is sent to host to indicate that a defragmentation action should be performed (¶0039, ¶004-0042). With both teaching/suggestion of Duzly and Zilberstein, one ordinary skill in the art would be able to conclude that the host should send a defragmentation to the storage in response to the fragmentation/improvement level exceed a threshold. Thus, one of ordinary skill in the art, before the effective filing data of the claimed invention, would have been motivated to incorporate Zilberstein into the teaching of to obtain the claimed limitations above. The motivation for doing so is to apply a known technique to the system ready for improvement of Duzly to yield predictable result.
Regarding claim 18:
The system according to claim 17, wherein: the host is further configured to determine whether the improvement level is above an improvement level threshold and send a command indicating the memory controller to perform defragmentation in response to determining that the improvement level is above the improvement level threshold; and the memory controller is further configured to receive the command and perform the defragmentation based on the received command. Duzly suggests the idea of the host send a query for fragmentation level, and received the fragmentation level from the storage, as presented above. Duzly, Fig. 5, the host send defrag command to the storage (6:40-55). Duzly also discloses the storage sends the host the fragmentation level as presented above. However, Duzly does not teaches the claimed limitation above. In an analogous art of storage fragmentation management (Zilberstein, abstract), Zilberstein discloses, a storage controller defines the storage fragmentation level and expected performance drop of a give file of LBA mapping based on a number of NAND sense operations, or read operations; when the performance level drop is below a certain threshold, a warning notification is sent to host to indicate that a defragmentation action should be performed (¶0039, ¶004-0042). With both teaching/suggestion of Duzly and Zilberstein, one ordinary skill in the art would be able to conclude that the host should send a defragmentation to the storage in response to the fragmentation/improvement level exceed a threshold. Thus, one of ordinary skill in the art, before the effective filing data of the claimed invention, would have been motivated to incorporate Zilberstein into the teaching of to obtain the claimed limitations above. The motivation for doing so is to apply a known technique to the system ready for improvement of Duzly to yield predictable result.
Claims 9 are rejected under 35 U.S.C. 103 as being unpatentable over Duzly et al (U.S. 9,645,741), and in view of Wu et al (U.S. 2024/0394164), and in view of Official Notice
Regarding claim 9:
The memory system according to claim 1, wherein the request is a File Based Optimization (FBO) request under a Universal Flash Storage (UFS) 4.0 technical standard. Wu discloses the memory system 110 (Fig. 1) may be or include a Universal Flash Storage (UFS) device. It is noted that the FBO is a feature of UFS 4.0. Thus, one of ordinary skill in the art, before the effective filing data of the claimed invention, would have been motivated to incorporate the standard into the combination of Duzly and Wu to obtain the claimed limitations above. The motivation for doing so is to apply a known standard in the art, into the apparatus/system, ready for improvement of Duzly to yield predictable result.
Allowable Subject Matter
Claims 5-8, 13-15, 19-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Oukid et al (U.S. 2018/0356991) discloses a method for defragmenting persistent memory.
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/KHOA D DOAN/ Primary Examiner, Art Unit 2133
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