Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,353,928.
Instant Application 19/259,950
Claim 1, US Patent 12,353,928
An apparatus, comprising:
An apparatus, comprising:
processing circuitry associated with one or more memory devices and configured to cause the apparatus to: issue an internal command to perform an access operation associated with the one or more memory devices;
processing circuitry associated with one or more memory devices and configured to cause the apparatus to: receive an access command to perform an access operation on a transfer unit of a memory sub-system, wherein the transfer unit is associated with one or more logical blocks;
determine whether the access operation was completed based at least in part on storing an identifier associated with the internal command; update the internal command based at least in part on determining that the access operation was not completed;
tore an identifier associated with an internal command in a shared memory that is accessible by a plurality of cores of the memory sub-system based at least in part on receiving the access command;
and issue a second internal command to perform the access operation, wherein the second internal command is an updated version of the internal command.
determine whether the access operation was completed based at least in part on storing the identifier; and update the internal command based at least in part on determining that the access operation was not completed.
Claim 1 of US Patent 12,353,928 teaches some or all elements of the claim 1 of 19/259,950. Especially the claims limitation like “..determine whether the access operation was completed based at least in part on storing the identifier; and update the internal command based at least in part on determining that the access operation was not completed.”
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 2, 8, 9, 15, and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over to Ma et al., (US 2016/0170886) and Gathala et al., (US 2015/0046661), sited in IDS.
As per claim 1, Ma teaches an apparatus, comprising: processing circuitry associated with one or more memory devices and configured to cause the apparatus to: issue an internal command to perform an access (read) operation associated with the one or more memory devices (receives a read command to execute a read operation, note [0013[); determine whether the access operation was completed based at least in part on storing an identifier (note [0013], Ma teaches identifying the related processing core that executes the read command) associated with the internal command; update the internal command (Ma teaches of sending a data read request to the identified remote core of the plurality of cores (Figs. 1 and 2) in order to receive the data, [0013-0025]) based at least in part on determining that the access operation was not completed. (Figs. 1 and 2, [0020]). Ma does not expressly teach issuing a second internal command to perform the access operation, wherein the second internal command is an updated version of the internal command.
In another analogous art, Gathala teaches 11issuing, by the first core, the first or second internal command to perform the access 12operation on the memory sub-system [0033-0038]). Gathala teaches various aspects for providing improved memory management solutions that provide access to a memory region that is shared between two or more heterogeneous processors (e.g., an applications processor and an auxiliary processor) in a multiprocessor system. Further, Gathala discloses that by allowing heterogeneous processors to read and write to the same memory sub-regions based at least in part on receiving the plurality of updated internal commands [0033] would improve the performance of the sub-regions (Gathala, [0033-0038]).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have utilized the method taught by Gathala that issues one or more updated internal commands based on the operations related to the memory sub-region. The rationale for the combination of Ma-Gathala would improve the performance of the data network (Gathala, [0003])
As per claim 12, Ma teaches 2receiving, to determine whether the access operation was completed, the processing circuitry configured to cause the apparatus to: compare the identifier to one or more second identifiers (receives a read command to execute a read operation, note [0013-0025]) stored in a shared memory that is accessible by a plurality of cores (Figs. 1 and 2, [0020]), associated with the one or more memory devices. (note [0013-0025], Ma teaches identifying the related processing core that executes the read command)
As per claim 8, see the rejection for claim 1.
As per claim 9, see the rejection for claim 2.
As per claim 15, see the rejection for claim 1.
As per claim 16, see the rejection for claim 2.
Allowable Subject Matter
Claims 3-7, 10-14, and 17-20 are objected to as being dependent upon a rejected base claim. Specifically, the claim language “wherein the internal command is updated by a first core of the plurality of cores, wherein the processing circuitry is further configured to cause the apparatus to: issuing, by the first core, the second internal command to a second core of the plurality of cores, wherein the second internal command is issued by the second core to perform the access operation,” would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Related Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Traver, US 12,353,928, teaches a memory sub-system can receive an access command to perform an access operation on a transfer unit of the memory sub-system. The memory sub-system can store an identifier associated with the access command in a memory component and can generate an internal command using a first core of the memory sub-system. [see entire document].
Conclusion
The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R.I .Hi(c). In amending in reply to a rejection of claims in an application or patent under reexamination, the applicant or patent owner must clearly point out the patentable novelty which he or she thinks the claims present in view the state of the art disclosed by the references cited or the objections made. The applicant or patent owner must also show how the amendments avoid such references or objections. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tammara Peyton whose telephone number is (571) 272-4157. The examiner can normally be reached between 8:30- 6:00 from Monday to Thursday, (I am off every first Friday), and 7:30- 4:00 every second Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor Henry Tsai can be reached on (571)272-4176. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Any inquiry of a general nature of relating to the status of this application should be directed to the Group receptionist whose telephone number is (571) 272- 2100.
/Tammara R Peyton/
Primary Examiner, Art Unit 2184
September 25, 2026
