DETAILED ACTION
The instant application having Application No. 19/260,141 has claims 1-22 pending in the application, all of which are ready for examination by the examiner.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-13, 17-22 are rejected under 35 U.S.C. 103 as being unpatentable over Gyl et al. (US 20130124793 A1) in view of Gorobets et al. (US 20100172179 A1).
As per claim 1,
1. A system comprising: a host system; and a memory system coupled with the host system, the memory system configured to support a plurality of candidate storage configurations, [Gyl teaches a system comprising a host and a memory module comprising a controller and memory devices (abstract, para. 8, 19-20); Gyl teaches the memory controller receiving signal, from the host, comprising partitioning information for controlling partitioning of memory device and accordingly controlling partitioning of the memory device, the controlling information at least including information associated with assigning of spare blocks used for wear leveling for each partition and size of each partition (para. 42-43, 46, 12, 15-17, 22-23, 26, 9; figs. 1, 4-5 and associated paragraphs)]
Gyl does not explicitly disclose, but Gorobets discloses:
wherein each storage configuration of the plurality of candidate storage configurations is associated with a respective allocation of partitions of memory for a plurality of memory types of the memory system, wherein each storage configuration of the plurality of candidate storage configurations is further associated with a respective allocation of pools of spare memory cells of the memory system for memory management operations associated with the plurality of memory types of the memory system, and wherein the memory system comprises: a plurality of partitions of memory, each partition of the plurality of partitions of memory configurable to include one or more memory types of the plurality of memory types of the memory system in accordance with a storage configuration, of the plurality of candidate storage configurations, for the memory system; and a plurality of pools of spare memory cells allocated for the memory management operations, the plurality of pools of spare memory cells configurable for the memory management operations associated with one or more memory types of the plurality of memory types of the memory system in accordance with the storage configuration for the memory system. [Gyl as shown above teaches partitioning information for controlling partitioning of memory device and spare blocks being used for wear leveling (memory management operation) for each partition (see above; Gyl: para. para. 42-43, 12, 15-17, 22-23, 26); Gorobets provides for example memory arrangements, including an arrangement having a binary block (SLC) partition and an MLC partition, where each partition comprises a separate spare block pool, but where the spare block pool of the MLC partition may transfer blocks to the SLC spare block (shared) (para. 157-161, 155-156; figs. 20-21 and associated paragraphs); Gorobets provides another example having a similar arrangement for partitioning, but with more than one SLC partition being present (para. 162-163)]
Gyl and Gorobets are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention, having knowledge of Gyl and Gorobets, to modify the disclosures by Gyl to include disclosures by Gorobets since they both teach data storage and memory access, wherein Gorobets is directed to improvements in managing usage of blocks (para. 3, 157). Therefore, it would be applying a known technique (partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared) to a known device (memory controller partitioning memory according to host provided partitioning information) ready for improvement to yield predictable results (according to host provided partitioning information, executing partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared; doing so would provide for more flexible handling of spare memory blocks). MPEP 2143
As per claim 2, Gyl in view of Gorobets teaches claim 1 as shown above and further teaches:
2. The system of claim 1, further comprising: one or more controllers of the host system, the memory system, or both, the one or more controllers configured to transmit, to the memory system, an indication of the storage configuration, from the plurality of candidate storage configurations, for the memory system. [Gyl in view of Gorobets as shown above teaches a host transmitting partitioning information (see claim 1 above; Gyl: para. 25, 42) and host running an operating system (Gorobets: para. 91)]
Gyl and Gorobets are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention, having knowledge of Gyl and Gorobets, to modify the disclosures by Gyl to include disclosures by Gorobets since they both teach data storage and memory access, wherein Gorobets is directed to improvements in managing usage of blocks (para. 3, 157). Therefore, it would be applying a known technique (partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared) to a known device (memory controller partitioning memory according to host provided partitioning information) ready for improvement to yield predictable results (according to host provided partitioning information, executing partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared; doing so would provide for more flexible handling of spare memory blocks). MPEP 2143
As per claim 3, Gyl in view of Gorobets teaches claim 2 as shown above and further teaches:
3. The system of claim 2, wherein the one or more controllers are configured to transmit one or more access commands in accordance with the plurality of partitions of memory. [Gorobets teaches host accessing the partitions using logical addresses and issuing commands (para. 90-96, 100-101, 141-142; figs. 8-9, 11, 18 and associated paragraphs)]
Gyl and Gorobets are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention, having knowledge of Gyl and Gorobets, to modify the disclosures by Gyl to include disclosures by Gorobets since they both teach data storage and memory access, wherein Gorobets is directed to improvements in managing usage of blocks (para. 3, 157). Therefore, it would be applying a known technique (partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared) to a known device (memory controller partitioning memory according to host provided partitioning information) ready for improvement to yield predictable results (according to host provided partitioning information, executing partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared; doing so would provide for more flexible handling of spare memory blocks). MPEP 2143
As per claim 4, Gyl in view of Gorobets teaches claim 1 as shown above and further teaches:
4. The system of claim 1, wherein the plurality of candidate storage configurations comprises: a first storage configuration associated with allocation of a single partition for each memory type of the plurality of memory types of the memory system and associated with at least one shared pool of memory cells that is configured to be shared for the memory management operations associated with at least two memory types of the plurality of memory types of the memory system. [Gyl in view of Gorobets as shown above teaches spare blocks used for wear leveling for each partition and provides for example memory arrangements, including the arrangement having a binary block (SLC) partition and an MLC partition, where each partition comprises a separate spare block pool, but where the spare block pool of the MLC partition may transfer blocks to the SLC spare block (shared) (see claim 1 above; Gorobets: para. 157-161, 155-156; figs. 20-21 and associated paragraphs), where a configuration so described having an SLC partition and an MLC partition may correspond to the first storage configuration]
Gyl and Gorobets are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention, having knowledge of Gyl and Gorobets, to modify the disclosures by Gyl to include disclosures by Gorobets since they both teach data storage and memory access, wherein Gorobets is directed to improvements in managing usage of blocks (para. 3, 157). Therefore, it would be applying a known technique (partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared) to a known device (memory controller partitioning memory according to host provided partitioning information) ready for improvement to yield predictable results (according to host provided partitioning information, executing partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared; doing so would provide for more flexible handling of spare memory blocks). MPEP 2143
As per claim 5, Gyl in view of Gorobets teaches claim 1 as shown above and further teaches:
5. The system of claim 1, wherein the plurality of candidate storage configurations comprises: a second storage configuration associated with allocation of one or more partitions for each memory type of the plurality of memory types and associated with at least one separate pool of memory cells for the memory management operations for each memory type of the plurality of memory types. [Gyl in view of Gorobets as shown above teaches spare blocks used or wearing for each partition and provides additional example arrangements for partitioning using partitions having respective spare blocks pools, including using more than one partitions being used as SLC partitions (para. 162-163), where, for example, a configuration so comprising two, rather than just one, SLC partitions and at least an MLC partition may correspond to the second storage configuration.]
Gyl and Gorobets are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention, having knowledge of Gyl and Gorobets, to modify the disclosures by Gyl to include disclosures by Gorobets since they both teach data storage and memory access, wherein Gorobets is directed to improvements in managing usage of blocks (para. 3, 157). Therefore, it would be applying a known technique (partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared) to a known device (memory controller partitioning memory according to host provided partitioning information) ready for improvement to yield predictable results (according to host provided partitioning information, executing partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared; doing so would provide for more flexible handling of spare memory blocks). MPEP 2143
As per claim 6, Gyl in view of Gorobets teaches claim 1 as shown above and further teaches:
6. The system of claim 1, wherein one or more pools of the plurality of pools of spare memory cells are allocated for one or more wear leveling operations. [Gyl in view of Gorobets as shown above teaches spare block pools associated with the partitions (see claim 1 above) and further teaches spare blocks used for wear leveling of a partition (Gyl: para. 16, 21)]
As per claim 7, Gyl in view of Gorobets teaches claim 1 as shown above and further teaches:
7. The system of claim 1, wherein the plurality of partitions of memory comprise at least a partition associated with a system memory area comprising one or more memory cells for system information. [Gyl in view of Gorobets provides that partitioning may involve a partition storing system data and a partition storing user data (Gorobets: para. 163)]
Gyl and Gorobets are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention, having knowledge of Gyl and Gorobets, to modify the disclosures by Gyl to include disclosures by Gorobets since they both teach data storage and memory access, wherein Gorobets is directed to improvements in managing usage of blocks (para. 3, 157). Therefore, it would be applying a known technique (partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared) to a known device (memory controller partitioning memory according to host provided partitioning information) ready for improvement to yield predictable results (according to host provided partitioning information, executing partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared; doing so would provide for more flexible handling of spare memory blocks). MPEP 2143
As per claim 8,
8. A method by a memory system, comprising: receiving an indication of a storage configuration for the memory system, the storage configuration one of a plurality of candidate storage configurations supported by the memory system, wherein the plurality of candidate storage configurations comprises: [Gyl teaches a system comprising a host and a memory module comprising a controller and memory devices (abstract, para. 8, 19-20); Gyl teaches the memory controller receiving signal, from the host, comprising partitioning information for controlling partitioning of memory device and accordingly controlling partitioning of the memory device, the controlling information at least including information associated with assigning of spare blocks used for wear leveling for each partition and size of each partition (para. 42-43, 12, 15-17, 22-23, 26; figs. 1, 4-5 and associated paragraphs);
Gyl does not explicitly disclose, but Gorobets discloses:
a first storage configuration associated with allocation of a single partition for each memory type of a plurality of memory types of the memory system and associated with at least one shared pool of memory cells that is configured to be shared for memory management operations associated with at least two memory types of the plurality of memory types of the memory system; and [Gyl as shown above teaches partitioning information for controlling partitioning of memory device and spare blocks being used for wear leveling (memory management operation) for each partition (see above; Gyl: para. para. 42-43, 12, 15-17, 22-23, 26); Gorobets provides for example memory arrangements comprising partitions having respective spare block pools, including an arrangement having a binary block (SLC) partition and an MLC partition, where each partition comprises a separate spare block pool, but where the spare block pool of the MLC partition may transfer blocks to the SLC spare block (shared) (para. 157-161, 155-156; figs. 20-21 and associated paragraphs), where a configuration so described having an SLC partition and an MLC partition may correspond to the first storage configuration] a second storage configuration associated with allocation of one or more partitions for each memory type of the plurality of memory types and associated with at least one separate pool of memory cells for the memory management operations for each memory type of the plurality of memory types; and [Gorobets provides additional example arrangements for partitioning, including using more than one SLC partitions (para. 162-163), where, for example, a configuration so comprising two, rather than just one, SLC partitions and at least an MLC partition may correspond to the second storage configuration] allocating a plurality of partitions of memory within the memory system and a plurality of pools of memory cells within the memory system in accordance with the indicated storage configuration, wherein each partition of the plurality of partitions is associated with at least one pool of the plurality of pools of memory cells for the memory management operations within the partition. [Gyl as shown above teaches partitioning information for controlling partitioning of memory device and spare blocks being used for wear leveling (memory management operation) for each partition (see above; para. 42-43, 12, 15-17, 22-23, 26), and Gorobets as shown above teaches configurations including a plurality of partitions respectively associated with a spare block pool (Gorobets: para. 157-163)]
Gyl and Gorobets are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention, having knowledge of Gyl and Gorobets, to modify the disclosures by Gyl to include disclosures by Gorobets since they both teach data storage and memory access, wherein Gorobets is directed to improvements in managing usage of blocks (para. 3, 157). Therefore, it would be applying a known technique (partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared) to a known device (memory controller partitioning memory according to host provided partitioning information) ready for improvement to yield predictable results (according to host provided partitioning information, executing partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared; doing so would provide for more flexible handling of spare memory blocks). MPEP 2143
As per claim 9, Gyl in view of Gorobets teaches claim 8 as shown above and further teaches:
9. The method of claim 8, further comprising: receiving one or more access commands in accordance with the allocation, each access command of the one or more access commands indicating one or more logical addresses associated with one or more partitions of the plurality of partitions memory; and performing one or more access operations based on allocating the plurality of partitions and based on receiving the one or more access commands. [Gorobets teaches host accessing the partitions using logical addresses and issuing commands (para. 90-96, 100-101, 141-142; figs. 8-9, 11, 18 and associated paragraphs)]
Gyl and Gorobets are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention, having knowledge of Gyl and Gorobets, to modify the disclosures by Gyl to include disclosures by Gorobets since they both teach data storage and memory access, wherein Gorobets is directed to improvements in managing usage of blocks (para. 3, 157). Therefore, it would be applying a known technique (partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared) to a known device (memory controller partitioning memory according to host provided partitioning information) ready for improvement to yield predictable results (according to host provided partitioning information, executing partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared; doing so would provide for more flexible handling of spare memory blocks). MPEP 2143
As per claim 10, Gyl in view of Gorobets teaches claim 8 as shown above and further teaches:
10. The method of claim 8, further comprising: performing one or more memory management operations for the plurality of partitions of memory using one or more associated pools of the plurality of pools of memory cells and in accordance with the allocation. [Gyl in view of Gorobets as shown above teaches spare block pools associated with the partitions (see claim 8 above) and further teaches spare blocks used for wear leveling of a partition (Gyl: para. 16, 21)]
As per claim 11, Gyl in view of Gorobets teaches claim 10 as shown above and further teaches:
11. The method of claim 10, wherein the one or more memory management operations comprise one or more wear leveling operations. [Gyl in view of Gorobets as shown above teaches spare block pools associated with the partitions (see claim 8 above) and further teaches spare blocks used for wear leveling of a partition (Gyl: para. 16, 21)]
As per claim 12, Gyl in view of Gorobets teaches claim 8 as shown above and further teaches:
12. The method of claim 8, further comprising: operating a partition of the plurality of partitions of memory in a read-only mode based on a quantity of available memory cells of a pool of memory cells associated with the partition satisfying a threshold. [Gorobets teaches going read-only mode, or end of life mode, responsive no spare blocks remaining (para. 154, 156, 158-159, 161)
Gyl and Gorobets are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention, having knowledge of Gyl and Gorobets, to modify the disclosures by Gyl to include disclosures by Gorobets since they both teach data storage and memory access, wherein Gorobets is directed to improvements in managing usage of blocks (para. 3, 157). Therefore, it would be applying a known technique (partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared) to a known device (memory controller partitioning memory according to host provided partitioning information) ready for improvement to yield predictable results (according to host provided partitioning information, executing partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared; doing so would provide for more flexible handling of spare memory blocks). MPEP 2143
As per claim 13, Gyl in view of Gorobets teaches claim 8 as shown above and further teaches:
13. The method of claim 8, wherein the at least one pool comprises one or more memory cells configured for one or more wear leveling operations, one or more spare memory cells, or any combination thereof. [Gyl in view of Gorobets as shown above teaches spare block pools associated with the partitions (see claim 8 above) and further teaches spare blocks used for wear leveling of a partition (Gyl: para. 16, 21)]
As per claim 17,
17. A memory system, comprising: one or more memory devices; and processing circuitry coupled with the one or more memory devices and configured to cause the memory system to: receive an indication of a storage configuration for the memory system, the storage configuration one of a plurality of candidate storage configurations supported by the memory system, wherein the plurality of candidate storage configurations comprises: [Gyl teaches a system comprising a host and a memory module comprising a controller and memory devices (abstract, para. 8, 19-20, 40); Gyl teaches the memory controller receiving signal, from the host, comprising partitioning information for controlling partitioning of memory device and accordingly controlling partitioning of the memory device, the controlling information at least including information associated with assigning of spare blocks used for wear leveling for each partition and size of each partition (para. 42-43, 12, 15-17, 22-23, 26; figs. 1, 4-5 and associated paragraphs);
Gyl does not explicitly disclose, but Gorobets discloses:
a first storage configuration associated with allocation of a single partition for each memory type of a plurality of memory types of the memory system and associated with at least one shared pool of memory cells that is configured to be shared for memory management operations associated with at least two memory types of the plurality of memory types of the memory system; and [Gyl as shown above teaches partitioning information for controlling partitioning of memory device and spare blocks being used for wear leveling (memory management operation) for each partition (see above; Gyl: para. para. 42-43, 12, 15-17, 22-23, 26); Gorobets provides for example memory arrangements comprising partitions having respective spare block pools, including an arrangement having a binary block (SLC) partition and an MLC partition, where each partition comprises a separate spare block pool, but where the spare block pool of the MLC partition may transfer blocks to the SLC spare block (shared) (para. 157-161, 155-156; figs. 20-21 and associated paragraphs), where a configuration so described having an SLC partition and an MLC partition may correspond to the first storage configuration] a second storage configuration associated with allocation of one or more partitions for each memory type of the plurality of memory types and associated with at least one separate pool of memory cells for the memory management operations for each memory type of the plurality of memory types; and [Gorobets provides additional example arrangements for partitioning, including using more than one MLC partition and different partitions being used as SLC partitions (para. 162-163), where, for example, a configuration so comprising two, rather than just one, SLC partitions and at least an MLC partition may correspond to the second storage configuration] allocate a plurality of partitions of memory within the memory system and a plurality of pools of memory cells within the memory system in accordance with the indicated storage configuration, wherein each partition of the plurality of partitions is associated with at least one pool of the plurality of pools of memory cells for the memory management operations within the partition. [Gyl as shown above teaches partitioning information for controlling partitioning of memory device and spare blocks being used for wear leveling (memory management operation) for each partition (see above; para. 42-43, 12, 15-17, 22-23, 26), and Gorobets as shown above teaches configurations including a plurality of partitions respectively associated with a spare block pool (Gorobets: para. 157-163)]
Gyl and Gorobets are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention, having knowledge of Gyl and Gorobets, to modify the disclosures by Gyl to include disclosures by Gorobets since they both teach data storage and memory access, wherein Gorobets is directed to improvements in managing usage of blocks (para. 3, 157). Therefore, it would be applying a known technique (partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared) to a known device (memory controller partitioning memory according to host provided partitioning information) ready for improvement to yield predictable results (according to host provided partitioning information, executing partitioning of memory involving configurations comprising SLC partition(s) and an MLC partition having separate spare block pools but with at least the spare block pool for the MLC partition being shared; doing so would provide for more flexible handling of spare memory blocks). MPEP 2143
Claim 18 is rejected for reasons similar to claim 9.
Claim 19 is rejected for reasons similar to claim 10.
Claim 20 is rejected for reasons similar to claim 11.
Claim 21 is rejected for reasons similar to claim 12.
Claim 22 is rejected for reasons similar to claim 13.
Claims 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over Gyl et al. (US 20130124793 A1) in view of Gorobets et al. (US 20100172179 A1) in view of Kantani et al. (US 20240094932 A1).
As per claim 14, Gyl in view of Gorobets teaches claim 8 as shown above. It does not explicitly disclose, but Kantani discloses:
14. The method of claim 8, wherein: the first storage configuration is associated with allocation of a first partition of memory for a first memory type of the plurality of memory types and a second partition of memory for a system memory area for operations of the memory system, the system memory area associated with a second memory type of the plurality of memory types; and the first storage configuration is associated with allocation of the at least one shared pool of memory cells that is shared for the memory management operations associated with the first partition of memory for the first memory type and the second partition of memory for the system memory area. [Gyl in view of Gorobets as shown above teaches SLC (second type) and MLC (first type) partitions having a shared spare block pool (see claim 8 above); Gyl in view of Gorobets does not explicitly disclose, but Kantani teaches using SLC area for storing system data (para. 51, 55)]
Gyl, Gorobets, and Kantani are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have combined the disclosures provided by Gyl in view of Gorobets with Kantani’s disclosures directed towards use of an SLC area for storing system data. Doing so would allow for improved read latency (Kantani: para. 30).
As per claim 15, Gyl in view of Gorobets teaches claim 8 as shown above. It does not explicitly disclose, but Kantani discloses:
15. The method of claim 8, wherein: the second storage configuration is associated with allocation of a first partition of memory for a first memory type of the plurality of memory types and a second partition of memory for a system memory area for operations of the memory system, the system memory area associated with a second memory type of the plurality of memory types; and the second storage configuration is associated with allocation of a first pool of memory cells for the memory management operations for the first partition of memory for the first memory type and a second pool of memory cells for the memory management operations for the second partition of memory for the system memory area, the second pool of memory cells separate from the first pool of memory cells. [Gyl in view of Gorobets as shown above teaches two SLC (second type) partitions and an MLC (first type) partition having respective block pools (see claim 8 above); Gyl in view of Gorobets does not explicitly disclose, but Kantani teaches using SLC area for storing system data (para. 51, 55)]
Gyl, Gorobets, and Kantani are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have combined the disclosures provided by Gyl in view of Gorobets with Kantani’s disclosures directed towards use of an SLC area for storing system data. Doing so would allow for improved read latency (Kantani: para. 30).
Claims 16 is rejected under 35 U.S.C. 103 as being unpatentable over Gyl et al. (US 20130124793 A1) in view of Gorobets et al. (US 20100172179 A1) in view of Wakutsu et al. (US 20240094923 A1).
As per claim 15, Gyl in view of Gorobets teaches claim 8 as shown above. It does not explicitly disclose, but Wakutsu discloses:
16. The method of claim 8, wherein: the second storage configuration is associated with allocation of a first partition of memory for a first memory type of the plurality of memory types and allocation of a second partition of memory for the first memory type; the first partition is configured for storing system critical data of the first memory type; and the second partition is configured for storing system non-critical data of the first memory type. [Gyl in view of Gorobets as shown above teaches an arrangement with the partitions, such as the second configuration comprising two SLC partitions and at least an MLC partition (see claim 8 above; Gorobets: para. 157-163) and also teaches partitions respectively being used for system data and user data (Gorobets: para. 163); Gyl in view of Gorobets does not explicitly disclose, but Wakutsu discloses using an SLC area as buffer for host writes due (non-critical data) to fast write operation speed (para. 92-97; fig. 6 and associated paragraphs) and also teaches using an SLC area as system area (critical data) due to SLC mode having high reliability (para. 181; fig. 15 and associated paragraphs)]
Gyl, Gorobets, and Wakutsu are analogous to the claimed invention because they are in the same field of endeavor involving data storage.
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have combined the disclosures provided by Gyl in view of Gorobets with Wakutsu’s disclosures directed towards a buffer area comprising SLC area and a system data area comprising SLC area. Doing so would provide for faster write operation speed and provision of higher reliability for system data (Wakutsu: para. 95, 181).
Relevant Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Hayakawa et al. (US 20180067650 A1) teaches a system comprising a system area, an SLC data area, and an MLC data area.
Eilert et al. (US 20040196723 A1) teaches dividing an available block pool to provide separate pools for each partition.
Conclusion
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/E.Y.K./Examiner, Art Unit 2135
/JARED I RUTZ/Supervisory Patent Examiner, Art Unit 2135
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