Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application KOREA, REPUBLIC OF 10-2022-0065544, filed on 05/27/2022.
Information Disclosure Statement
As required by M.P.E.P. 609 (C), the applicant’s submission of the information Disclosure Statement dated 03/11/2026 is acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending. As required by M.P.E.P. 609 C(2), a copy of the PTOL-1449 initialed and dated by the examiner is attached to the instant office action.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
Claims 7-26 are rejected under the judicially created doctrine of obviousness-type double patenting as being unpatentable over claims 1-9 of U.S. Patent No. US 12,373,344. Although the conflicting claims are not identical, they are not patentably distinct from each other because of the following reasons:
Claims 1-9 of U.S. Patent No. US 12,373,344 (hereinafter, “Patent”), contains every element of claims 7-26 of the instant application (hereinafter, “Instant Applicant”) and thus anticipate the claims of the instant application. Claims of the instant application therefore are not patently distinct from the earlier patent claims and as such are unpatentable over obvious-type double patenting. A later patent claim is not patentably distinct from an earlier claim if the later claim is anticipated by the earlier claim.
"A later patent claim is not patentably distinct from an earlier patent claim if the later claim is obvious over, or anticipated by, the earlier claim. In re Longi, 759 F.2d at 896, 225 USPQ at 651 (affirming a holding of obviousness-type double patenting because the claims at issue were obvious over claims in four prior art patents); In re Berg, 140 F.3d at 1437, 46 USPQ2d at 1233 (Fed. Cir. 1998) (affirming a holding of obviousness-type double patenting where a patent application claim to a genus is anticipated by a patent claim to a species within that genus). " ELI LILLY AND COMPANY v BARR LABORATORIES, INC., United States Court of Appeals for the Federal Circuit, ON PETITION FOR REHEARING EN BANC (DECIDED: May 30, 2001).
“Claim 12 and Claim 13 are generic to the species of invention covered by claim 3 of the patent. Thus, the generic invention is "anticipated" by the species of the patented invention. Cf., Titanium Metals Corp. v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985) (holding that an earlier species disclosure in the prior art defeats any generic claim) 4. This court's predecessor has held that, without a terminal disclaimer, the species claims preclude issuance of the generic application. In re Van Ornum, 686 F.2d 937, 944, 214 USPQ 761, 767 (CCPA 1982); Schneller, 397 F.2d at 354. Accordingly, absent a terminal disclaimer, claims 12 and 13 were properly rejected under the doctrine of obviousness-type double patenting.” (In re Goodman (CA FC) 29 USPQ2d 2010 (12/3/1993).
US 12,373,344
Instant Application
1. A controller controlling an operation of a semiconductor memory device based on a request received from a host, the controller comprising: a host interface configured to generate a first internal command in response to the request; a first function block configured to generate a second internal command in response to the first internal command; a second function block configured to operate in response to the second internal command; and an internal command cache configured to cache at least one internal command corresponding to a reference internal command, wherein when the second internal command corresponding to the first internal command is not cached in the internal command cache, the first function block generates the second internal command, and transmits the generated second internal command to the second function block.
1. A storage device comprising: a semiconductor memory device having a plurality of memory blocks; a controller configured to control an operation of the semiconductor memory device based on a request received from a host; and a host interface configured to generate a first internal command in response to the request, wherein the controller comprises: a first function block configured to generate a second internal command in response to the first internal command; a second function block configured to operate in response to the second internal command; and an internal command cache configured to cache at least one internal command corresponding to a reference internal command, and wherein, when the second internal command corresponding to the first internal command is not cached in the internal command cache, the first function block is configured to generate the second internal command and transmit the generated second internal command to the second function block.
Reasons of Allowance
Claims 7-26 would be allowable if the double patenting rejection were overcome.
The closest prior art, Ish et al. (Pub. No.: US 2021/0294522), discloses “the controller comprising: a host interface configured to generate a first internal command in response to the request; a first function block configured to generate a second internal command in response to the first internal command; a second function block configured to operate in response to the second internal command; and an internal command cache configured to cache at least one internal command corresponding to a reference internal command”.
However, the prior art differs from the present invention because the prior art fails to disclose “a controller configured to control an operation of the semiconductor memory device based on a request received from a host; and a host interface configured to generate a first internal command in response to the request, wherein the controller comprises: a first function block configured to generate a second internal command in response to the first internal command; an internal command cache configured to cache at least one internal command corresponding to a reference request; and a second function block configured to operate in response to the second internal command, wherein, when the second internal command corresponding to the request is not cached in the internal command cache, the first function block is configured to generate the second internal command and transmit the generated second internal command to the second function block”.
The following is an examiner’s statement of reasons for allowance:
Independent Claims 7, 12 and 21 identify the distinct features “a controller configured to control an operation of the semiconductor memory device based on a request received from a host; and a host interface configured to generate a first internal command in response to the request, wherein the controller comprises: a first function block configured to generate a second internal command in response to the first internal command; an internal command cache configured to cache at least one internal command corresponding to a reference request; and a second function block configured to operate in response to the second internal command, wherein, when the second internal command corresponding to the request is not cached in the internal command cache, the first function block is configured to generate the second internal command and transmit the generated second internal command to the second function block", which are not taught or suggested by the prior art of records.
Claims 7-26 would be allowable over the prior art of record because the claimed features as mentioned above in combination with other claimed features are not recited or suggested by the prior art of records. The above features in conjunction with all other limitations of the dependent and independent claims 7-26 are hereby allowed.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
JUNG et al. (Pub. No.: US 2020/0201571) “MEMORY SYSTEM AND OPERATING METHOD THEREOF”
Considered for teachings related to an electronic device, and more particularly, to a memory system and an operating method thereof.
Does not disclose or suggest a controller configured to control an operation of the semiconductor memory device based on a request received from a host; and a host interface configured to generate a first internal command in response to the request, wherein the controller comprises: a first function block configured to generate a second internal command in response to the first internal command; an internal command cache configured to cache at least one internal command corresponding to a reference request; and a second function block configured to operate in response to the second internal command, wherein, when the second internal command corresponding to the request is not cached in the internal command cache, the first function block is configured to generate the second internal command and transmit the generated second internal command to the second function block.
Somanache et al. (Pub. No.: US 2013/0019051) “META DATA HANDLING WITHIN A FLASH MEDIA CONTROLLER”
Considered for teachings related to flash media systems generally and, more particularly, to a method and/or apparatus for handling meta data within a flash media controller.
Does not disclose or suggest a controller configured to control an operation of the semiconductor memory device based on a request received from a host; and a host interface configured to generate a first internal command in response to the request, wherein the controller comprises: a first function block configured to generate a second internal command in response to the first internal command; an internal command cache configured to cache at least one internal command corresponding to a reference request; and a second function block configured to operate in response to the second internal command, wherein, when the second internal command corresponding to the request is not cached in the internal command cache, the first function block is configured to generate the second internal command and transmit the generated second internal command to the second function block.
Any inquiry concerning this communication should be directed to Yong Choe at telephone number 571-270-1053 or email to yong.choe@uspto.gov. The examiner can normally be reached on M-F 10:00 am to 6:30pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rutz, Jared Ian can be reached on (571) 272-5535. Any inquiry of a general nature or relating to the status of this application should be directed to the TC 2100 whose telephone number is (571) 272-2100.
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/YONG J CHOE/Primary Examiner, Art Unit 2135
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