DETAILED ACTION
1. This is a first office action in response to application no. 19/261,361 filed on July 7th 2025 in which claims 1-20 are presented for examination.
Notice of Pre-AIA or AIA Status
The present application is being examined under the pre-AIA first to invent provisions.
Double Patenting
2. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on non-statutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
3. Claim 1-20 are rejected on the ground of non-statutory double patenting as being unpatentable over claims 1-20 of U.S. Patent no. 12,375,735 to Lim et al.
Although the claims at issue are not identical, they are not patentably distinct from each other because claim 1, 9 and 17 of the instant application and claim 1, 10 and 19 of referenced Patent are drawn to the same invention. A close look at the instant application will show that claim 1 calls for a system comprising: a receiver configurable to receive a bit stream; and a decoder coupled to the receiver and configurable to: decode a first instance of a coefficient level flag for a sub-block in the bit stream; initialize a context index variable for the first instance of the coefficient level flag for the sub-block when no coefficient level flags have been decoded for the sub-block before the first instance of the coefficient level flag; select a context model for each instance of the coefficient level flag in the sub-block using the context index variable; determine a value of each coefficient level flag in the sub-block using a respective context model; and increment the context index variable after initializing the context index variable and in response to determining that the value of the coefficient level flag equals zero, wherein the context index variable is incremented no more than twice for the sub-block.
Patent no. 12,375,735 also calls for similar limitations, in fact claim 1 of Patent no. 12,375,735
calls for a method comprising: receiving, by a decoder system, a plurality of coeff_abs_level_greater1 flags associated with a sub-block, wherein each flag of the plurality of coeff_abs_level_greater1 flags is associated with a coefficient value for the sub-block; initializing, by the decoder system, a context index variable to a value of one for processing a first instance of a coeff_abs_level_greater1 flag in the sub-block when no previous coeff_abs_level_greater1 flags have been decoded for the sub-block; determining, by the decoder system, a context for a coeff_abs_level_greater1 flag in the plurality of coeff_abs_level_greater1 flags using the context index variable; and incrementing the context index variable in response to determining that a coeff_abs_level_greater1 flag is set to a particular value, wherein the context index variable is incremented no more than twice for the sub-block after initializing the context index variable to the value of one.
Therefore, when comparing claim 1 of the instant application and claim 1 of the cited Patent, the claims of the cited Patent indicate the actual flags that the instant application is referring to. To the examiner, it is clear that the differences between the claims do not rise to a patentability level.
The difference between the instant examined claim and the conflicting patented claim is that the conflicting patented claims is narrower in scope and falls within the scope of the examined claims. Therefore, a patent to the examined claim genus would improperly extend the right to exclude granted by a patent to the species or sub-genus should the genus issue as a patent after the species or sub-genus. See MPEP §804(II)(B)(1).
Claim 9 of the instant application call for limitations similar to the limitations of claim 10 of Patent no. 12,375,735.
Claim 9 of the instant application calls for a method comprising: decoding a first instance of a coefficient level flag for a sub-block in a bit stream; initializing a context index variable for the first instance of the coefficient level flag for the sub-block when no coefficient level flags have been decoded for the sub-block before the first instance of the coefficient level flag; selecting a context model for each instance of the coefficient level flag in the sub- block using the context index variable; determining a value of each coefficient level flag in the sub-block using a respective context model; and incrementing the context index variable after initializing the context index variable and in response to determining that the value of the coefficient level flag equals zero, wherein the context index variable is incremented no more than twice for the sub- block.
Similarly, claim 10 of Patent no. 12,375,735 calls for a non-transitory computer-readable medium having executable instructions stored thereon, configured to be executable by one or more processors for causing the one or more processors to: receive a plurality of coeff_abs_level_greater1 flags associated with a sub-block, wherein each flag of the plurality of coeff_abs_level_greater1 flags is associated with a coefficient value for the sub-block; initialize a context index variable to a value of one for processing a first instance of a coeff_abs_level_greater1 flag in the sub-block when no previous coeff_abs_level_greater1 flags have been decoded for the sub-block; determine a context for a coeff_abs_level_greater1 flag in the plurality of coeff_abs_level_greater1 flags using the context index variable; and increment the context index variable in response to determining that a coeff_abs_level_greater1 flag is set to a particular value, wherein the context index variable is incremented no more than twice for the sub-block after initializing the context index variable to the value of one.
Claim 17 of the instant application call for limitations similar to the limitations of claim 19 of Patent no. 12,375,735.
Claim 17 of the instant application calls for a system comprising: a memory configurable to store a context model; and a decoder coupled to the memory and configurable to: decode a first instance of a coefficient level flag for a sub-block in a bit stream; initialize a context index variable for the first instance of the coefficient level flag for the sub-block when no coefficient level flags have been decoded for the sub-block before the first instance of the coefficient level flag; select the context model for each instance of the coefficient level flag in the sub-block using the context index variable; determine a value of each coefficient level flag in the sub-block using a respective context model; and increment the context index variable after initializing the context index variable and in response to determining that the value of the coefficient level flag equals zero, wherein the context index variable is incremented no more than twice for the sub-block.
Similarly, claim 19 of Patent no. 12,375,735 calls for a system comprising: a decoder configured to: decode a first instance of a coefficient level flag for a sub-block; determine that no coefficient level flags have been decoded for the sub-block before the first instance of the coefficient level flag; initialize a context index variable for the first instance of the coefficient level flag for the sub-block in response to determining that no coefficient level flags have been decoded for the sub-block before the first instance of the coefficient level flag; select a context model for each instance of the coefficient level flag in the sub-block based on the context index variable; determine a value of each coefficient level flag in the sub-block by at least debinarizing a respective bin using the respective context model; increment the context index variable after initializing the context index variable and in response to determining that the value of the coefficient level flag equals zero, wherein the context index variable is incremented no more than twice for the sub-block; and generate a picture by decoding the sub-block using the context model; and a display coupled to the decoder and configured to display the picture.
Claims 2-4 and 10-12 of the instant application are directed to the value of the coefficients level flag which is somewhat similar to the limitations of claim 3 of Patent no. 12,375,735.
Claims 8 and 16 of the instant application relate to sub-block size values, which is similar to claims 2 and 11.
Claims 5-7, 13-15, 18, and 20 are rejected by dependency to claims 1, 9 and 17, respectively.
The difference between the instant examined claim and the conflicting patented claim is that the conflicting patented claims is narrower in scope and falls within the scope of the examined claims. Therefore, a patent to the examined claim genus would improperly extend the right to exclude granted by a patent to the species or sub-genus should the genus issue as a patent after the species or sub-genus. See MPEP §804(II)(B)(1).
Claim Rejections - 35 USC § 103
4. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made.
5. Claims 1-5, 8-13, 16-19 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over of Sole Rojas et al. (US Patent Application Publication no. 2013/0058407) in view of Sasai et al. (US Patent Application Publication no. 2012/0177300).
As per claim 1, Sole Rojas discloses a system comprising: a receiver configurable to receive a bit stream (See Sole Rojas Fig. 4, item 26 and [0100]) and a decoder coupled to the receiver and configurable (See Sole Rojas [0100]) to: decode a first instance of a coefficient level flag for a sub-block in the bit stream (See Sole Rojas [0160]); initialize a context index variable for the first instance of the coefficient level flag for the sub-block when no coefficient level flags have been decoded for the sub-block before the first instance of the coefficient level flag (See Sole Rojas [0083]-[0084]); select a context model for each instance of the coefficient level flag in the sub-block using the context index variable (See Sole Rojas [0010], [0080]); determine a value of each coefficient level flag in the sub-block using a respective context model (See Sole Rojas [0072], [0076], and [0084]); and increment the context index variable after initializing the context index variable and in response to determining that the value of the coefficient level flag equals zero (See Sole Rojas [0084],[0177]).
It is noted that Sole Rojas is silent about wherein the context index variable is incremented no more than twice for the sub-block.
However, Sasai teaches wherein the context index variable is incremented no more than twice for the sub-block (See Sasai [0149], [0178]).
Therefore, it is considered obvious that one skilled in the art, before the effective filing date of the claimed invention, would recognize the advantage of modifying Sole Rojas to incorporate Sasai’s teachings wherein the context index variable is incremented no more than twice for the sub-block. The motivation for performing such a modification in Sole Rojas is to increase the accuracy of the symbol occurrence probabilities PE and to thereby perform control adapted to the features of the image.
As per claim 9, Sole Rojas discloses a method comprising: decoding a first instance of a coefficient level flag for a sub-block in a bit stream (See Sole Rojas [0160]); initializing a context index variable for the first instance of the coefficient level flag for the sub-block when no coefficient level flags have been decoded for the sub-block before the first instance of the coefficient level flag (See Sole Rojas [0083]-[0084]); selecting a context model for each instance of the coefficient level flag in the sub-block using the context index variable (See Sole Rojas [0010], [0080]); determining a value of each coefficient level flag in the sub-block using a respective context model (See Sole Rojas [0072], [0076], and [0084]); and incrementing the context index variable after initializing the context index variable and in response to determining that the value of the coefficient level flag equals zero (See Sole Rojas [0084],[0177]).
It is noted that Sole Rojas is silent about wherein the context index variable is incremented no more than twice for the sub-block.
However, Sasai teaches wherein the context index variable is incremented no more than twice for the sub-block (See Sasai [0149], [0178]).
Therefore, it is considered obvious that one skilled in the art, before the effective filing date of the claimed invention, would recognize the advantage of modifying Sole Rojas to incorporate Sasai’s teachings wherein the context index variable is incremented no more than twice for the sub-block. The motivation for performing such a modification in Sole Rojas is to increase the accuracy of the symbol occurrence probabilities PE and to thereby perform control adapted to the features of the image.
As per claim 17, Sole Rojas discloses a system comprising: a memory configurable to store a context model; and a decoder coupled to the memory (See Sole Rojas [0014]) and configurable to: decode a first instance of a coefficient level flag for a sub-block in a bit stream (See Sole Rojas [0083]-[0084]); initialize a context index variable for the first instance of the coefficient level flag for the sub-block when no coefficient level flags have been decoded for the sub-block before the first instance of the coefficient level flag (See Sole Rojas [0083]-[0084]); select the context model for each instance of the coefficient level flag in the sub-block using the context index variable (See Sole Rojas [0010], [0080]); determine a value of each coefficient level flag in the sub-block using a respective context model (See Sole Rojas [0072], [0076], and [0084]); and increment the context index variable after initializing the context index variable and in response to determining that the value of the coefficient level flag equals zero (See Sole Rojas [0084],[0177]).
It is noted that Sole Rojas is silent about wherein the context index variable is incremented no more than twice for the sub-block.
However, Sasai teaches wherein the context index variable is incremented no more than twice for the sub-block (See Sasai [0149], [0178]).
Therefore, it is considered obvious that one skilled in the art, before the effective filing date of the claimed invention, would recognize the advantage of modifying Sole Rojas to incorporate Sasai’s teachings wherein the context index variable is incremented no more than twice for the sub-block. The motivation for performing such a modification in Sole Rojas is to increase the accuracy of the symbol occurrence probabilities PE and to thereby perform control adapted to the features of the image.
As per claims 2-3, 10-11 and 18, the combination of Sole Rojas and Sansai further teaches wherein the value of the coefficient level flag equaling zero/one indicates that a significant coefficient in the sub-block has an absolute value of one or greater than one (See Sole Rojas [0133]-[0134],[0157], [0163]).
As per claims 4-5, 12-13 and 19, the combination of Sole Rojas and Sansai further teaches wherein to determine the value of each coefficient level flag, the decoder is configurable to determine the value of each coefficient level flag in the sub-block by at least arithmetically decoding one or more symbols in the bit stream using a respective context model (See Sole Rojas [0198]-[0199]).
As per claims 8, 16, most of the limitations of these claims have been noted in the above rejection of claims 1 and 9. In addition, the combination of Sole Rojas, Sasai further teaches wherein a size of the sub-block is 4x4 pixels (See Sole Rojas [0086]).
6. Claims 6-7, 14-15 and 20 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over of Sole Rojas et al. (US Patent Application Publication no. 2013/0058407) in view of Sasai et al. (US Patent Application Publication no. 2012/0177300) as applied to claims 1, 9 and 17 above, and further in view of Sankaran (US Patent Application Publication no. 20080267513).
Regarding claims 6 and 14, it is noted that the combination of Sole Rojas and Sasai is silent about wherein to initialize the context index variable, the decoder is configurable to initialize the context index variable to a value of one for the first instance of the coefficient level flag for the sub-block when no coefficient level flags have been decoded for the sub-block before the first instance of the coefficient level flag.
However, Sankaran teaches wherein to initialize the context index variable, the decoder is configurable to initialize the context index variable to a value of one for the first instance of the coefficient level flag for the sub-block when no coefficient level flags have been decoded for the sub-block before the first instance of the coefficient level flag (See Sankaran [0071], [0115]).
Therefore, is it considered obvious that one skilled in the art, before the effective filing date of the claimed invention, would recognize the advantage of modifying the combination of Sole Rojas and Sasai to incorporate Sankaran’s teachings wherein to initialize the context index variable, the decoder is configurable to initialize the context index variable to a value of one for the first instance of the coefficient level flag for the sub-block when no coefficient level flags have been decoded for the sub-block before the first instance of the coefficient level flag. The motivation for performing such a modification in the combination of Sole Rojas and Sasai is to cause an initial selection of the constant corresponding to unary exponential golomb coding. This selection is changed upon detection of a decoded 0 bit during the count up portion of the loop.
As per claims 7, 15 and 20, most of the limitations of these claims have been noted in the above rejection of claims 6, 14 and 17. In addition, the combination of Sole Rojas, Sasai and Sankaran further teaches wherein a maximum value of the context index variable could be three (See Sasai [0146]-[0148]).
7. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
See the Notice of References Cited (PTO-892).
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/GIMS S PHILIPPE/Primary Examiner, Art Unit 2424
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