Prosecution Insights
Last updated: August 17, 2026
Application No. 19/263,495

IMAGING DEVICE

Non-Final OA §102§103
Filed
Jul 09, 2025
Priority
Jul 11, 2024 — RE 10-2024-0091897
Examiner
BARRY, STEVEN DANIEL
Art Unit
2638
Tech Center
2600 — Communications
Assignee
SK hynix Inc.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
1y 1m
Est. Remaining
79%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
27 granted / 31 resolved
+25.1% vs TC avg
Minimal -8% lift
Without
With
+-8.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
18 currently pending
Career history
47
Total Applications
across all art units

Statute-Specific Performance

§101
1.9%
-38.1% vs TC avg
§103
67.0%
+27.0% vs TC avg
§102
27.4%
-12.6% vs TC avg
§112
0.9%
-39.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 31 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statements (IDS) submitted on 07/09/2025 & 02/13/2026 were filed after the mailing date of the non-final rejection on 07/16/2026. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-3, 5-10, 14-17, & 19-20 are rejected under 35 U.S.C. 102 as being anticipated by Xu et al (US 20190273879 A1, hereinafter, "Xu"). Regarding Claim 1, Xu teaches an imaging device comprising: a split transistor (Xu, Fig. 4, SGTX) configured to distinguish between a first time during which first pixel data of a first pixel is generated and a second time during which second pixel data of at least one second pixel is generated; a first photoelectric conversion element (Xu, Fig. 4, lpd) connected to a first electrode of the split transistor (Xu, Fig. 4, connected through FD to the drain of SGTX) through a first transfer transistor (Xu, Fig. 4, LTX) and included in the first pixel; a second photoelectric conversion element (Xu, Fig. 4, spd) connected to a second electrode of the split transistor through a second transfer transistor (Xu, Fig. 4, source of SGTX) and included in the second pixel; a floating diffusion region (Xu, Fig. 4, FD) configured to accumulate photocharges generated by the first photoelectric conversion element or the second photoelectric conversion element; a capacitor configured to adjust capacitance of the floating diffusion region (Xu, Fig. 4, Cdcg); and a dual conversion gain (DCG) transistor connected between the capacitor and the floating diffusion region and configured to control the capacitance of the floating diffusion region (Xu, Fig. 4, DCG). Regarding Claim 2, Xu teaches the limitations of dependent Claim 1 as noted above. Xu teaches the first photoelectric conversion element is configured to generate the first pixel data based on the photocharges when the split transistor is turned off (Xu, Fig. 5, Step 8, [0037], ln. 2-4, "During step 8 control signal ltx is set high to turn on transfer transistor LTX and allow the charge accumulated in large photodiode [lpd] to be transferred through transfer transistor LTX on to floating drain FD." SGTX=0 in step 8); and the second photoelectric conversion element is configured to generate the second pixel data based on the photocharges when the split transistor is turned on (Xu, Fig. 5, Step 18, [0038], ln. 20-24, "Control signal sgtx is set to a high level during step 18 which transfers any remaining charge from capacitor Cms on to floating drain FD and then control signal sgtx is set low during step 19. Since dcg is set high during steps 18 and 19 the image signal read out during step 19 is the Low Conversion Gain (LCG) signal related to small photodiode spd." SGTX=1 at step 18). Regarding Claim 3, Xu teaches the limitations of dependent Claim 1 as noted above. Xu teaches the floating diffusion region is connected to the first electrode (Xu, Fig. 4, FD connects to the drain of SGTX); and the first pixel and the at least one second pixel are configured to share the split transistor (Xu, Fig. 4, spd connects to the source of SGTX; lpd connects to the drain), the floating diffusion region (Xu, Fig. 4, spd & lpd connect at FD), the capacitor (Xu, Fig. 4, spd connects to Cms through SSG; lpd connects through LTX and SGTX), and the DCG transistor (Xu, Fig. 4, spd & lpd connect to the drain of DCG). Regarding Claim 5, Xu teaches the limitations of dependent Claim 1 as noted above. Xu teaches a reset transistor connected to the DCG transistor and configured to reset a voltage level of the floating diffusion region (Xu, Fig. 4, RST). Regarding Claim 6, Xu teaches the limitations of dependent Claim 1 as noted above. Xu teaches a drain transistor connected to the second electrode and configured to drain or discharge overflow charges of the second photoelectric conversion element (Xu, Fig. 4, SRTX).’ Regarding Claim 7, Xu teaches the limitations of dependent Claim 6 as noted above. Xu teaches a signal controller configured to generate a control signal, wherein at least one of the split transistor, the DCG transistor, and the drain transistor is configured to be turned on or off based on the control signal (Xu, Fig. 5 implies that SGTX, DCG, and SRTX are controlled). Regarding Claim 8, Xu teaches the limitations of dependent Claim 1 as noted above. Xu teaches a read controller including a source follower transistor configured to amplify a change in electrical potential of the floating diffusion region (Xu, Fig. 4, SF), and a selection transistor configured to output, as a pixel signal, an electrical signal received from the source follower transistor (Xu, Fig. 4, ROWSEL). Regarding Claim 9, Xu teaches the limitations of dependent Claim 1 as noted above. Xu teaches the first pixel and the at least one second pixel correspond to color filters of one color, and share a first microlens (Xu, Fig. 3, [0032], ln. 5-6, "Since the two photodiodes share the same color filter CF and microlens ML, they effectively sample the same point in the image."). Regarding Claim 10, Xu teaches the limitations of dependent Claim 1 as noted above. Xu teaches a first analog-to-digital converter (ADC) configured to: compare a first pixel signal generated based on the first pixel with a ramp signal, generate first image data based on a result of the comparison (Xu, Fig. 1, [0029], ln. 9-13, "In one example, after each pixel has acquired its image data or image charge, the image data is readout by readout circuitry 104 using a readout mode specified by state register 112 and then transferred to function logic 106. In various examples, readout circuitry 104 may include amplification circuitry, analog-to-digital (ADC) conversion circuitry, or otherwise."); and compares a second pixel signal generated based on each of the at least one second pixel with the ramp signal, and generate second image data based on a result of the comparison (Xu, Fig. 1, [0029], ln. 9-13, "In one example, after each pixel has acquired its image data or image charge, the image data is readout by readout circuitry 104 using a readout mode specified by state register 112 and then transferred to function logic 106. In various examples, readout circuitry 104 may include amplification circuitry, analog-to-digital (ADC) conversion circuitry, or otherwise."). Regarding Claim 14, Xu teaches an imaging device comprising: a multi-pixel that includes a split transistor (Xu, Fig. 4, SGTX) configured to distinguish between a first time during which first pixel data of a first pixel is generated and a second time during which second pixel data of at least one second pixel is generated, a first photoelectric conversion element (Xu, Fig. 4, lpd) connected to a first electrode of the split transistor through a first transfer transistor (Xu, Fig. 4, connected through FD to the drain of SGTX) and included in the first pixel, a second photoelectric conversion element (Xu, Fig. 4, spd) connected to a second electrode of the split transistor through a second transfer transistor (Xu, Fig. 4, source of SGTX) and included in the second pixel, a floating diffusion region (Xu, Fig. 4, FD) configured to accumulate photocharges generated by the first photoelectric conversion element or the second photoelectric conversion element, a capacitor configured to adjust capacitance of the floating diffusion region (Xu, Fig. 4, Cdcg), and a dual conversion gain (DCG) transistor connected between the capacitor and the floating diffusion region and configured to control the capacitance of the floating diffusion region (Xu, Fig. 4, DCG); a signal controller configured to generate a control signal to control each of the split transistor and the DCG transistor (Xu, Fig. 5 implies that SGTX and DCG are controlled); and an image synthesizer configured to generate a high dynamic range (HDR) image by synthesizing first image data generated based on the first pixel and second image data generated based on the at least one second pixel (Xu, [0014], ln. 1-3, "A pixel cell and readout method comprise a single exposure high dynamic range [SEHDR] imaging system which mitigates the artifacts from moving objects or time-varying light sources while providing high image quality under low light. Each pixel includes a combination of two photodiodes."). Regarding Claim 15, Xu teaches the limitations of dependent Claim 14 as noted above. Xu teaches the first photoelectric conversion element has lower light transmittance than the second photoelectric conversion element (Xu, [0014], ln. 3-5, "One of the photodiodes can be used to sense bright light conditions while another photodiode can be used to sense low light conditions."). Regarding Claim 16, Xu teaches the limitations of dependent Claim 14 as noted above. Xu teaches the signal controller is configured to: turn off the split transistor in a first illuminance environment (Xu, Fig. 5, Step 8, [0037], ln. 2-4, "During step 8 control signal ltx is set high to turn on transfer transistor LTX and allow the charge accumulated in large photodiode [lpd] to be transferred through transfer transistor LTX on to floating drain FD." SGTX=0 in step 8); and turn on the split transistor in a second illuminance environment having a lower illuminance than the first illuminance environment (Xu, Fig. 5, Step 18, [0038], ln. 20-24, "Control signal sgtx is set to a high level during step 18 which transfers any remaining charge from capacitor Cms on to floating drain FD and then control signal sgtx is set low during step 19. Since dcg is set high during steps 18 and 19 the image signal read out during step 19 is the Low Conversion Gain (LCG) signal related to small photodiode spd." SGTX=1 at step 18). Regarding Claim 17, Xu teaches the limitations of dependent Claim 14 as noted above. Xu teaches the signal processor is configured to: turn on the DCG transistor so that the capacitance becomes greater than a reference capacitance (Xu, Fig. 5, [0037], ln. 10-12, "During step 10 control signal dcg is set high to enable the capacitance of capacitor Cdcg to be added to the capacitance of floating drain FD and control signal ltx is also set high to transfer any remaining charge from [lpd] on to the combined capacitance of Cdcg and FD."); and turn off the DCG transistor so that the capacitance becomes smaller than the reference capacitance (Xu, Fig. 5, [0038], ln. 9-11, "During steps 15, 16 and 17 control signal rst is set low isolating floating drain FD and control signal dcg is also set low isolating floating drain FD from dynamic range enhancement capacitor Cdcg."). Regarding Claim 19, Xu teaches An image sensing method comprising: generating first pixel data based on first photocharges generated by a first photoelectric conversion element, when a split transistor is turned off and a dual conversion gain (DCG) transistor is turned on (Xu, Fig. 5, [0037], ln. 2-4, "During step 11 control signal ltx is returned to a low level and the signal then read out from 1pd is the Low Conversion Gain [LCG] signal related to the exposure of large photodiode 1pd." In step 11, SGTX=0; DCG=1), wherein the split transistor is configured to distinguish between photocharges generated by the first photoelectric conversion element and at least one second photoelectric conversion element; adjusting, to a first capacitance, capacitance of a floating diffusion region configured to accumulate second photocharges generated by the at least one second photoelectric conversion element, when the split transistor is turned on and the DCG transistor is turned on (Xu, Fig. 5, [0038], ln. 20-22, "Control signal sgtx is set to a high level during step 18 which transfers any remaining charge from capacitor Cms on to floating drain FD." During step 18, SGTX=1; DCG=1); generating second pixel data corresponding to a first conversion gain based on the second photocharges (Xu, Fig. 5, [0038], ln. 7-9, "…the initial reference image signal read out during step 13 is the Low Conversion Gain (LCG) reference level for the read out of the image signal to be derived from the exposure of small photodiode spd."); adjusting the capacitance to a second capacitance when the split transistor is turned on and the DCG transistor is turned off (Xu, Fig. 5, [0038], ln. 13-15, "…set to a high level during step 16 which transfers image related charge accumulated on capacitor Cms as a result of the previous chopped exposures to floating drain FD." During step 16, SGTX=1; DCG=0); and generating third pixel data corresponding to a second conversion gain based on the second photocharges (Xu, Fig. 5, [0038], ln. 11-13, "During step 15 the initial reference image signal read out is the High Conversion Gain [HCG] reference level for the read out of the image signal to be derived from the exposure of small photodiode spd."). Regarding Claim 20, Xu teaches the limitations of dependent Claim 19 as noted above. Xu teaches generating a high dynamic range (HDR) image based on the first to third pixel data (Xu, Fig. 4, [0034], ln. 2-4, "As shown in FIG. 4, the pixel cell 400 comprising several signal dynamic range enhancing features which can be made to work together inventively to provide wide dynamic range."). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Xu in view of Hun et al (KR 20230050011 A, hereinafter, "Hun"), Kurase & Sato (US 11736631 B2, hereinafter, "Kurase"), and Higashitani et al (JP 7375852 B2, hereinafter, "Higashitani"). Regarding Claim 4, Xu teaches the limitations of dependent Claim 1 as noted above. Hun teaches he light blocking structure includes a half-shield structure (Hun, pg. 3, para. 9, ln. 1-3, "…pixels acquiring two types of images are paired so that two adjacent pixels share one on-chip lens, or a light-blocking layer on one half of the light-receiving area (eg, the left half). It can be implemented in a half-shield method…"). Hun does not teach a neutral-density (ND) filter, or a gray filter. However, Kurase teaches a neutral-density (ND) filter (Kurase, [0130], ln. 3-4, "A neutral density filter (ND filter) can be used as the material absorbing light."), and Higashitani teaches a gray filter (Higashitani, pg. 14, para. 7, ln. 1-2, "The low-sensitivity pixel includes a gray filter that reduces the transmittance of light in the visible light region at a predetermined rate above or below the color filter."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Hun, Kurase, and Higashitani with those of Xu because it is widely known in the art to utilize all three of these light blocking structures. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Xu in view of Ren et al (CN 108322676 A, hereinafter, "Ren"). Regarding Claim 11, Xu teaches the limitations of dependent Claim 10 as noted above. Ren teaches a third pixel and at least one fourth pixel (Ren, pg. 9, last para., ln. 1-2, "the column A/D converting unit 150 corresponding to the pixel array 110 in each column of the pixels, which are used for analog/digital conversion under the control of the logic control unit 120 to realize the line signal."); and a second ADC configured to: compare a third pixel signal generated based on the third pixel with a ramp signal, and generate third image data based on a result of the comparison (Ren, pg. 9, last para., ln. 1-2, "the column A/D converting unit 150 corresponding to the pixel array 110 in each column of the pixels, which are used for analog/digital conversion under the control of the logic control unit 120 to realize the line signal."); and compare a pixel signal generated based on the at least one fourth pixel with the ramp signal, and generate fourth image data based on a result of the comparison (Ren, pg. 9, last para., ln. 1-2, "the column A/D converting unit 150 corresponding to the pixel array 110 in each column of the pixels, which are used for analog/digital conversion under the control of the logic control unit 120 to realize the line signal."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Ren with those of Xu because it is widely known in the art to employ a plurality of ADCs to compare a plurality of pixels using ramp signals. Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Xu in view of Ren and Yamashita et al (US 20180269241 A1, hereinafter, "Yamashita"). Regarding Claim 12, Xu and Ren teach the limitations of dependent Claim 11 as noted above. Yamashita teaches an image signal processor configured to generate a phase-difference image using the first image data generated based on the first pixel and the third image data generated based on the third pixel (Yamashita, Fig. 36, [0296], ln. 3-4, "The mode illustrated in FIG. 36 is preferably used as a mode for focal point detection signals."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Yamashita with those of Xu and Ren because it is widely known in the art to generate phase-difference images based on multiple images. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Xu and Yamashita. Regarding Claim 13, Xu teaches the limitations of dependent Claim 10 as noted above. Yamashita teaches an image signal processor configured to generate a phase-difference image using the second image data generated based on each of the at least one second pixel (Yamashita, Figs. 39 & 40, [0338], ln. 2-3, "…one example of the phase contrast detection will be described where the focal point detection is performed during imaging on the imaging face."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Yamashita with those of Xu because it is widely known in the art to generate phase-difference images based on image data generated from at least one pixel. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Xu in view of Berkovich et al (JP 2021528890 A, hereinafter, "Berkovich"). Regarding Claim 18, Xu teaches the limitations of dependent Claim 14 as noted above. Berkovich teaches an overflow detector configured to generate a detection signal when a quantity of photocharges generated by the second photoelectric conversion element is greater than or equal to a threshold value (Berkovich, Fig. 13B, pg. 24, para. 1, ln. 7-10, "Between time T0 and time T2, the controller 920 detects the overflow charge by configuring the charge storage device 902 at maximum capacitance and biasing the mobile switch M1a with the photodiode PD0 partially on. Other mobile switches such as M1b and M1n can be disabled to prevent other photodiodes from moving the overflow charge to the charge detection unit 614 while making it movable to the unit 614."); and a drain transistor connected to the second electrode and configured to drain or discharge the photocharges greater than the threshold value generated by the second photoelectric conversion element, wherein the signal controller is configured to enable the drain transistor to be turned on based on the detection signal from the overflow detector (Berkovich, Fig. 13B, pg. 24, para. 1, ln. 7-10, "Between time T0 and time T2, the controller 920 detects the overflow charge by configuring the charge storage device 902 at maximum capacitance and biasing the mobile switch M1a with the photodiode PD0 partially on. Other mobile switches such as M1b and M1n can be disabled to prevent other photodiodes from moving the overflow charge to the charge detection unit 614 while making it movable to the unit 614."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Berkovich with those of Xu because it is widely known in the art to implement an overflow detection circuit to generate a signal when photoelectric charges become excessive and turn on a transistor (or switch) when that occurs. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN DANIEL BARRY whose telephone number is (571)270-0432. The examiner can normally be reached M-Th 0730-1630. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lin Ye can be reached on 517-272-7372. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STEVEN DANIEL BARRY/Examiner, Art Unit 2638 /LIN YE/Supervisory Patent Examiner, Art Unit 2638
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Prosecution Timeline

Jul 09, 2025
Application Filed
Jul 24, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
79%
With Interview (-8.5%)
2y 2m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 31 resolved cases by this examiner. Grant probability derived from career allowance rate.

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