Prosecution Insights
Last updated: July 17, 2026
Application No. 19/265,358

ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD

Non-Final OA §102
Filed
Jul 10, 2025
Priority
Dec 12, 2019 — provisional 62/947,185 +7 more
Examiner
TORRENTE, RICHARD T
Art Unit
Tech Center
Assignee
Panasonic Holdings Corporation
OA Round
1 (Non-Final)
70%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allowance Rate
738 granted / 1061 resolved
+9.6% vs TC avg
Moderate +14% lift
Without
With
+14.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
24 currently pending
Career history
1087
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
80.2%
+40.2% vs TC avg
§102
11.9%
-28.1% vs TC avg
§112
2.3%
-37.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1061 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on DATE is/are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification. Drawings The drawings were received on 7/10/25. These drawings are acceptable. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b). Claims 1-3 are rejected on the ground of nonstatutory double patenting over claims 1-3 of U. S. Patent No. 11,849,147 since the claims, if allowed, would improperly extend the "right to exclude" already granted in the patent. Although the conflicting claims are not identical, they are not patentably distinct from each other because claims 1-3 of the present application encompass claims 1-3 of U.S. Patent No. 11,849,147 . The subject matter claimed in the instant application is fully disclosed in the patent and is covered by the patent since the patent and the application are claiming common subject matter, as follows in the Table below. Instant Application 11,849,147 1. An encoder, comprising: circuitry; and memory connected to the circuitry, wherein the circuitry, in operation, determines a block from a coding tree unit (CTU),determines a mode to be applied to the block from a plurality of merge modes based on a width of the block and a height of the block, when the mode determined is a first mode, stores in a bitstream an index indicating a distance and an angle that define two partitions having a non-rectangular shape in the block, and encodes the block using the first mode, disables the first mode and storing of the index in the bitstream when (i) the width is 64 pixels and the height is 8 pixels or (ii) the height is 64 pixels and the width is 8 pixels, and applies the first mode to the block when (i) a ratio of the width to the height is smaller than 8 and (ii) a ratio of the height to the width is smaller than 8, wherein the plurality of merge modes include a combined inter merge/intra prediction (CIIP) mode. 1. An encoder, comprising: circuitry; and memory connected to the circuitry, wherein the circuitry, in operation, determines a block from a coding tree unit (CTU), determines a mode to be applied to the block from a plurality of merge modes based on a width of the block and a height of the block, when the mode determined is a first mode, stores in a bitstream an index indicating a distance and an angle that define two partitions in the block, and encodes the block using the first mode, disables the first mode and storing of the index in the bitstream when (i) the width is 64 pixels and the height is 8 pixels or (ii) the height is 64 pixels and the width is 8 pixels, and applies the first mode to the block when (i) a ratio of the width to the height is smaller than 8 and (ii) a ratio of the height to the width is smaller than 8, wherein the plurality of merge modes include a combined inter merge/intra prediction (CIIP) mode. It would have been obvious to one skilled in the art at the time of the invention was made to modify the cited steps as indicated in claim 1 of the instant US application since the omission/addition/alteration of the cited limitations would not have changed the process of determining a merge mode to apply to a block based on block height and width. Therefore, the ordinary skilled artisan would have been also motivated to modify claim 1 of the cited instant US application by altering the step of defining a block size. Claims 2-3 of the instant application are analogous to double patenting of 2-3 of patent No. 11,849,147 for the same reason as the claims discussed above. The cited altering elements would not interfere with the functionality of the steps previously claimed and would perform the same function. In re Karlson, 136, USPQ 184 (CCPA 1963). Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 3 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Liao et al. (US 2021/0051335). Claim 3 discloses a “non-transitory computer readable medium storing a bitstream and a computer program having instructions for transmission thereof, the bitstream including information according to which a decoder” process the information, the process comprising… is a product by process claim limitation where the product is the bit stream and the process is the method steps to generate the bitstream. MPEP §2113 recites “Product-by-Process claims are not limited to the manipulations of the recited steps, only the structure implied by the steps”. Thus, the scope of the claim is the storage medium storing the bitstream (with the structure implied by the method steps). The structure includes the information and samples manipulated by the steps. Also the computer program for transmission is not tied to the decoding process. “To be given patentable weight, the printed matter and associated product must be in a functional relationship. A functional relationship can be found where the printed matter performs some function with respect to the product to which it is associated”. MPEP §2111.05(I)(A). When a claimed “computer-readable medium merely serves as a support for information or data, no functional relationship exists. MPEP §2111.05(III). The storage medium storing the claimed bitstream merely services as a support for the storage of the bitstream and provides no fictional relationship between the stored bitstream and storage medium. Therefor the structure bitstream, which scope is implied by the method steps, is non-functional descriptive material and given no patentable weight. MPEP §2111.05(III). Thus, the claim scope is just a storage medium storing data and computer program for transmission, and is anticipated by Liao which recites a storage medium storing a bitstream (e.g. see ¶ [0006]) and computer program for transmission (e.g. see ¶ [0104]). Allowable Subject Matter Claim(s) 1-3 is/are allowed upon overcoming the above rejections. The following is an Examiner’s statement of reasons for allowance: Claim(s) 1-3 discloses an encoder/decoder, comprising: circuitry; and memory connected to the circuitry, wherein the circuitry, in operation, determines a block from a coding tree unit (CTU),determines a mode to be applied to the block from a plurality of merge modes based on a width of the block and a height of the block, when the mode determined is a first mode, stores in a bitstream an index indicating a distance and an angle that define two partitions having a non-rectangular shape in the block, and encodes the block using the first mode, disables the first mode and storing of the index in the bitstream when (i) the width is 64 pixels and the height is 8 pixels or (ii) the height is 64 pixels and the width is 8 pixels, and applies the first mode to the block when (i) a ratio of the width to the height is smaller than 8 and (ii) a ratio of the height to the width is smaller than 8, wherein the plurality of merge modes include a combined inter merge/intra prediction (CIIP) mode. 3. The closest prior Liao et al. (US 2021/0051335) in view of Ye et al. (US 2020/0366901 A1) fail to anticipate or render the above underlined limitation obvious. Liao discloses An encoder/decoder and medium (see figs. 2A and 3A), comprising: circuitry; and memory connected to the circuitry (see 404 in fig. 4), determines a block from a coding tree unit (CTU) (e.g. see I [0070]), wherein the circuitry, in operation, determines a mode to be applied to a block from a plurality of merge modes (e.g. see selecting geometric partition among regular, MMVD, subblock, CIIP and triangle merge mode in fig. 16) based on a width of the block and a height of the block (e.g. see geometric partition mode is only applied to blocks based on width and height in I 0146]), when the mode determined is a first mode (e.g. see geometric partition in fig. 16), stores in a bitstream an index indicating a distance and an angle that define two partitions in the block (see fig. 14), and encodes the block using the first mode (see "true" in fig. 16; see 226 in fig. 2A), wherein the plurality of merge modes include a combined inter merge/intra prediction (CIIP) mode (see fig. 16), but does not disclose disabling the first mode and storing of the index in the bitstream when (i) the width is 64 pixels and the height is 8 pixels or (ii) the height is 64 pixels and the width is 8 pixels, wherein the plurality of merge modes include a combined inter merge/intra prediction (CIIP) mode. The secondary reference Ye discloses encoding with merge mode and disabling based on block size but the teaching is away from Liao underlined limitation which makes the references not obvious to combine. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Citation of Pertinent Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. 1. Huang et al. (US 2020/0374528), discloses merge mode with video coding. 2. Koo et al. (US 2021/0105477), discloses coding with block width and height ratio. 3. Lee et al. (US 2021/0120265), discloses affine motion merge mode. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to RICHARD T TORRENTE whose telephone number is (571)270-3702. The examiner can normally be reached M-F: 6:45-3:15 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jay Patel can be reached at (571) 272-2988. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RICHARD T TORRENTE/Primary Examiner, Art Unit 2485
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Prosecution Timeline

Jul 10, 2025
Application Filed
Jun 23, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
70%
Grant Probability
84%
With Interview (+14.0%)
3y 6m (~2y 6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1061 resolved cases by this examiner. Grant probability derived from career allowance rate.

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