Prosecution Insights
Last updated: August 16, 2026
Application No. 19/271,783

CLOCK GENERATION APPARATUS, CLOCK GENERATION METHOD, ADJUSTMENT APPARATUS, ADJUSTMENT METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM

Non-Final OA §102
Filed
Jul 17, 2025
Priority
Oct 31, 2022 — JP 2022-174144 +1 more
Examiner
GANNON, LEVI
Art Unit
2849
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Asahi Kasei Kabushiki Kaisha
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
1244 granted / 1504 resolved
+14.7% vs TC avg
Moderate +7% lift
Without
With
+6.9%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
34 currently pending
Career history
1535
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
43.0%
+3.0% vs TC avg
§102
36.4%
-3.6% vs TC avg
§112
12.5%
-27.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1504 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by He (US 2013/0321048). Regarding claim 1, He teaches an adjustment apparatus (Figure 2. Also see figures 3 and 7.) which adjusts a clock generation apparatus (114) which compensates a frequency of an output clock signal (output of PLL 114) by using a compensation function (generated in temperature to frequency compensation software 120) associated with each of a plurality of temperature zones (see temperatures zones in figure 7) into which a predetermined temperature range (-35 to 90 degrees Celsius) is divided, the adjustment apparatus comprising: a compensation function decision unit (122-124) which decides, for each of the plurality of temperature zones, the compensation function by using a zone defined to partially overlap with an adjacent temperature zone (Figure 7 and Para. [0071]-[0075] teach overlapping temperature ranges to generate a hysteresis effect. Para. [0020]-[0021] teach generating temperature to frequency deviation estimates.); and a compensation function setting unit (Output device of 124 connected to PLL 114.) which sets, in the clock generation apparatus, the compensation function corresponding to each of the plurality of temperature zones (Para. [0019] and [0040] teach providing a frequency error correction signal to the PLL 114 to correct for temperature changes.). Regarding claim 2, the method as recited in the claim is inherently present in the structure discussed above in the rejection of claim 1. Regarding claim 3, He teaches a non-transitory computer readable medium having recorded thereon an adjustment program which causes a computer (Para. [0183]) to function as an adjustment apparatus (Figure 2. Also see figures 3 and 7.) which adjusts a clock generation apparatus (114) which compensates a frequency of an output clock (output of PLL 114) signal by using a compensation function (generated in temperature to frequency compensation software 120) associated with each of a plurality of temperature zones (see temperature zones in figure 7) into which a predetermined temperature range (-35 to 90 degrees Celsius) is divided, the adjustment program causing the computer to function as: a compensation function decision unit (122-124) which decides, for each of the plurality of temperature zones, the compensation function by using a zone defined to partially overlap with an adjacent temperature zone (Figure 7 and Para. [0071]-[0075] teach overlapping temperature ranges to generate a hysteresis effect. Para. [0020]-[0021] teach generating temperature to frequency deviation estimates.); and a compensation function setting unit (Output device of 124 connected to PLL 114.) which sets, in the clock generation apparatus, the compensation function corresponding to each of the plurality of temperature zones (Para. [0019] and [0040] teach providing a frequency error correction signal to the PLL 114 to correct for temperature changes.). Allowable Subject Matter Claims 4-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The best prior art reference of record, He, fails to teach: “an AD converter which includes: a second voltage-controlled oscillator which outputs an internal clock signal phase-locked to the output clock signal in response to a digital temperature signal having become a value corresponding to an analog temperature signal from a temperature sensor; a phase comparator which detects a phase difference between the output clock signal and the internal clock signal; and a digital temperature signal generator which generates a digital temperature signal according to the phase difference detected by the phase comparator, to output it to the second voltage-controlled oscillator; and a digital temperature compensation circuit which compensates the frequency of the output clock signal of the first voltage-controlled oscillator by using the digital temperature signal.”, as set forth in claim 4. Conclusion The prior art references made of record and not relied upon teach oscillator control system including overlapping temperature ranges. Any inquiry concerning this communication or earlier communications from the examiner should be directed to LEVI GANNON whose telephone number is (571)272-7971. The examiner can normally be reached 7:00AM-4:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached at 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LEVI GANNON/Primary Examiner, Art Unit 2836 July 13, 2026
Read full office action

Prosecution Timeline

Jul 17, 2025
Application Filed
Jul 16, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
90%
With Interview (+6.9%)
2y 0m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1504 resolved cases by this examiner. Grant probability derived from career allowance rate.

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