Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 08/21/2025 & 12/01/2025 were filed after the mailing date of the non-final rejection on 10/06/2026. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 3, & 19-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ise & Arai (US 20180115729 A1, hereinafter, "Ise").
Regarding Claim 1, Ise teaches an imaging element including a focus related pixel, which is a pixel that is configured to acquire data related to a focus state of a subject (Ise, Abstract, ln. 1-3, "a first calculator that calculates a phase difference evaluation value for focus detection by a phase difference detection method based on signal from the pixel."), the imaging element comprising: a reading circuit configured to read out pixel data obtained by imaging the subject at a first frame rate (Ise, [0085], ln. 9-11, "When the first image signals are to be acquired, the first pixel group is read out at a first frame rate. When the second image signals are to be acquired, the second pixel group is read out at a second frame rate that is higher than the first frame rate."); a memory configured to store the pixel data read out by the reading circuit (Ise, Fig. 1, [0061], ln. 1-2, "The controller 106 includes, for example, a central processor [CPU], a read only memory [ROM], and a random access memory [RAM]."); and an output circuit configured to output image data based on the pixel data stored in the memory at a second frame rate, wherein the first frame rate is a higher frame rate than the second frame rate (Ise, [0085], ln. 9-11, "When the first image signals are to be acquired, the first pixel group is read out at a first frame rate. When the second image signals are to be acquired, the second pixel group is read out at a second frame rate that is higher than the first frame rate."), wherein the pixel data includes focus related pixel data, which is data related to the focus state (Ise, [0010], ln. 3-5, "…a first calculator that calculates a phase difference evaluation value for focus detection by a phase difference detection method based on a signal from a pixel for phase difference detection included in the plurality of pixels."), and non-focus related pixel data different from the focus related pixel data (Ise, [0010], ln. 8-11, "…a second calculator that calculates a contrast evaluation value for focus detection by a contrast detection method based on the image signal including the signal generated by the interpolation processor through the interpolation."), and wherein the reading circuit configured to perform reading of the non-focus related pixel data and a plurality of readings of the focus related pixel data within an output period defined by the second frame rate as a period in which the image data of one frame is output (Ise, [0086], ln. 3-5, "…the first image signal and the second image signal having different charge accumulation time periods, different data sizes, and different frame rates can be acquired in parallel.").
Regarding Claim 3, Ise teaches the limitations of dependent Claim 1 as noted above. Ise teaches the reading circuit reads out the pixel data in units of lines (Ise, [0083, ln. 14-15, "…the phase difference AF row are transmitted to the contrast evaluation value calculator 218 via the column signal lines 202b and the horizontal signal line 215b.").
Regarding Claim 19, Ise teaches an operation method of an imaging element that includes a focus related pixel, which is a pixel that is configured to acquire data related to a focus state of a subject (Ise, Abstract, ln. 1-3, "a first calculator that calculates a phase difference evaluation value for focus detection by a phase difference detection method based on signal from the pixel."), a reading circuit configured to read out pixel data obtained by imaging the subject at a first frame rate (Ise, [0085], ln. 9-11, "When the first image signals are to be acquired, the first pixel group is read out at a first frame rate. When the second image signals are to be acquired, the second pixel group is read out at a second frame rate that is higher than the first frame rate."), a memory configured to store the pixel data read out by the reading circuit (Ise, Fig. 1, [0061], ln. 1-2, "The controller 106 includes, for example, a central processor [CPU], a read only memory [ROM], and a random access memory [RAM]."), and an output circuit configured to output image data based on the pixel data stored in the memory at a second frame rate (Ise, [0010], ln. 8-11, "…a second calculator that calculates a contrast evaluation value for focus detection by a contrast detection method based on the image signal including the signal generated by the interpolation processor through the interpolation."), wherein the first frame rate is a higher frame rate than the second frame rate, and wherein the pixel data includes focus related pixel data and non-focus related pixel data different from the focus related pixel data (Ise, [0085], ln. 9-11, "When the first image signals are to be acquired, the first pixel group is read out at a first frame rate. When the second image signals are to be acquired, the second pixel group is read out at a second frame rate that is higher than the first frame rate."), the operation method comprising, by the reading circuit, performing reading of the non-focus related pixel data and a plurality of readings of the focus related pixel data within an output period defined by the second frame rate as a period in which the image data of one frame is output (Ise, [0086], ln. 3-5, "…the first image signal and the second image signal having different charge accumulation time periods, different data sizes, and different frame rates can be acquired in parallel.").
Regarding Claim 20, Ise teaches a non-transitory computer-readable storage medium storing a program executable by a computer to function, in an imaging element including a focus related pixel, which is a pixel that is configured to acquire data related to a focus state of a subject (Ise, Abstract, ln. 1-3, "a first calculator that calculates a phase difference evaluation value for focus detection by a phase difference detection method based on signal from the pixel."), as a reading circuit configured to read out pixel data obtained by imaging the subject at a first frame rate (Ise, [0085], ln. 9-11, "When the first image signals are to be acquired, the first pixel group is read out at a first frame rate. When the second image signals are to be acquired, the second pixel group is read out at a second frame rate that is higher than the first frame rate."), as a memory configured to store the pixel data read out by the reading circuit (Ise, Fig. 1, [0061], ln. 1-2, "The controller 106 includes, for example, a central processor [CPU], a read only memory [ROM], and a random access memory [RAM]."), and as an output circuit configured to output image data based on the pixel data stored in the memory at a second frame rate, wherein the first frame rate is a higher frame rate than the second frame rate (Ise, [0085], ln. 9-11, "When the first image signals are to be acquired, the first pixel group is read out at a first frame rate. When the second image signals are to be acquired, the second pixel group is read out at a second frame rate that is higher than the first frame rate."), wherein the pixel data includes focus state pixel data that is data related to the focus state and non-focus related pixel data different from the focus state pixel data (Ise, [0085], ln. 9-11, "When the first image signals are to be acquired, the first pixel group is read out at a first frame rate. When the second image signals are to be acquired, the second pixel group is read out at a second frame rate that is higher than the first frame rate."), and wherein the reading circuit performs reading of the non-focus related pixel data and a plurality of readings of the focus related pixel data within an output period defined by the second frame rate as a period in which the image data of one frame is output (Ise, [0086], ln. 3-5, "…the first image signal and the second image signal having different charge accumulation time periods, different data sizes, and different frame rates can be acquired in parallel.").
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2 & 4-12 are rejected under 35 U.S.C. 103 as being unpatentable over Ise in view of Komaba & Naru (JP 2009089143 A, hereinafter, "Komaba").
Regarding Claim 2, Ise teaches the limitations of dependent Claim 1 as noted above. Komaba teaches the reading circuit performs reading of the non-focus related pixel data and reading of the focus related pixel data in parallel (Komaba, pg. 12, para. 1, ln. 7-12, "With this configuration, three types of signals, that is, an image pixel, a focus detection pixel in which the pupil division direction is in the column direction, and a focus detection pixel in which the pupil division direction is in the row direction are simultaneously and independently obtained. Since it can be read out, the focus detection signal can be read out independently without being influenced by the readout time of the image signal, and the speed of the focus detection process can be further increased."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Komaba with those of Ise because it is widely known in the art to read out focus pixels and image pixels simultaneously.
Regarding Claim 4, Ise teaches the limitations of dependent Claim 1 as noted above. Komaba teaches the focus related pixel data is pixel data of the focus related pixel, and the non-focus related pixel data is pixel data of a non-focus related pixel that is a pixel different from the focus related pixel (Komaba, pg. 12, para. 1, ln. 7-12, "With this configuration, three types of signals, that is, an image pixel, a focus detection pixel in which the pupil division direction is in the column direction, and a focus detection pixel in which the pupil division direction is in the row direction are simultaneously and independently obtained. Since it can be read out, the focus detection signal can be read out independently without being influenced by the readout time of the image signal, and the speed of the focus detection process can be further increased."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Komaba with those of Ise because it is widely known in the art to use focus pixels and imaging pixels in the same image sensor.
Regarding Claim 5, Ise and Komaba teach the limitations of dependent Claim 4 as noted above. Komaba teaches reading of the non-focus related pixel data is reading of the non-focus related pixel data from the non-focus related pixel, and the plurality of readings of the focus related pixel data is a plurality of readings of the focus related pixel data from the focus related pixel (Komaba, pg. 12, para. 1, ln. 7-12, "With this configuration, three types of signals, that is, an image pixel, a focus detection pixel in which the pupil division direction is in the column direction, and a focus detection pixel in which the pupil division direction is in the row direction are simultaneously and independently obtained. Since it can be read out, the focus detection signal can be read out independently without being influenced by the readout time of the image signal, and the speed of the focus detection process can be further increased."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Komaba with those of Ise and Komaba because it is widely known in the art to read imaging data from imaging pixels and focus data from focus detection pixels.
Regarding Claim 6, Ise and Komaba teach the limitations of dependent Claim 4 as noted above. Komaba teaches an imaging surface on which a plurality of first lines including the focus related pixel and a plurality of second lines consisting of only the non-focus related pixel are arranged (Komaba, Fig. 1, odd rows P[1,X], P[3,X], & P[5,X] are focus pixels and even rows P[2,X] & P[4,X] are image pixels), wherein the reading circuit includes a first reading circuit that reads out the focus related pixel data from each focus related pixel included in the plurality of first lines, and a second reading circuit that reads out the non-focus related pixel data from each non-focus related pixel included in the plurality of second lines (Komaba, pg. 12, para. 1, ln. 7-12, "With this configuration, three types of signals, that is, an image pixel, a focus detection pixel in which the pupil division direction is in the column direction, and a focus detection pixel in which the pupil division direction is in the row direction are simultaneously and independently obtained. Since it can be read out, the focus detection signal can be read out independently without being influenced by the readout time of the image signal, and the speed of the focus detection process can be further increased."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Komaba with those of Ise and Komaba because it is widely known in the art to place focus pixels on one row and imaging pixels on another row and read imaging data from the row of imaging pixels and focus data from the row of focus detection pixels.
Regarding Claim 7, Ise and Komaba teach the limitations of dependent Claim 6 as noted above. Komaba teaches reading of the focus related pixel data from the focus related pixel by the first reading circuit and reading of the non-focus related pixel data from the non-focus related pixel by the second reading circuit are independently performed (Komaba, pg. 12, para. 1, ln. 7-12, "With this configuration, three types of signals, that is, an image pixel, a focus detection pixel in which the pupil division direction is in the column direction, and a focus detection pixel in which the pupil division direction is in the row direction are simultaneously and independently obtained. Since it can be read out, the focus detection signal can be read out independently without being influenced by the readout time of the image signal, and the speed of the focus detection process can be further increased."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Komaba with those of Ise and Komaba because it is widely known in the art to read imaging pixels and focus detection pixels independently on separate reading circuits.
Regarding Claim 8, Ise and Komaba teach the limitations of dependent Claim 7 as noted above. Komaba teaches in a reading period of one frame, reading of the focus related pixel data from the focus related pixel by the first reading circuit is performed earlier than reading of the non-focus related pixel data from the non-focus related pixel by the second reading circuit (Komaba, Fig. 2 DS1-DS3 & DVS1-DVS3 focus detection signals are read out prior to DHG1-DHG3 image signals). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Komaba with those of Ise and Komaba because it is widely known in the art to read focus detection signals prior to imaging signals.
Regarding Claim 9, Ise teaches the limitations of dependent Claim 1 as noted above. Komaba teaches the reading circuit reads out the non-focus related pixel data of one frame as recording pixel data within a reading period of one frame, and reads out the focus related pixel data during reading of the non-focus related pixel data as the recording pixel data (Komaba, pg. 12, para. 1, ln. 7-12, "With this configuration, three types of signals, that is, an image pixel, a focus detection pixel in which the pupil division direction is in the column direction, and a focus detection pixel in which the pupil division direction is in the row direction are simultaneously and independently obtained. Since it can be read out, the focus detection signal can be read out independently without being influenced by the readout time of the image signal, and the speed of the focus detection process can be further increased."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Komaba with those of Ise because it is widely known in the art to read out imaging pixels and focus detection pixels simultaneously.
Regarding Claim 10, Ise and Komaba teach the limitations of dependent Claim 9 as noted above. Komaba teaches the reading circuit reads out the non-focus related pixel data and the focus related pixel data as display pixel data within the reading period of one frame, and reads out the non-focus related pixel data as the recording pixel data in a case in which a predetermined condition is satisfied (Komaba, Fig. 2 DS1-DS3 & DVS1-DVS3 focus detection signals are read out prior to DHG1-DHG3 image signals. This all occurs within one frame, and focus detection readout is the predetermined condition that is satisfied.). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Komaba with those of Ise and Komaba because it is widely known in the art to read out image signals during the time period of a single frame after focus detection signals have been read out.
Regarding Claim 11, Ise teaches the limitations of dependent Claim 1 as noted above. Komaba teaches the image data includes first pixel data based on the non-focus related pixel data and second pixel data based on the focus related pixel data obtained by the plurality of reading of the focus related pixel data, and in a case of outputting the image data of one frame, the output circuit outputs the first pixel data and the second pixel data at different timings. (Komaba, Fig. 2 DS1-DS3 & DVS1-DVS3 focus detection signals are read out prior to DHG1-DHG3 image signals). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Komaba with those of Ise because it is widely known in the art to output focus detection and imaging data at different times.
Regarding Claim 12, Ise and Komaba teach the limitations of dependent Claim 11 as noted above. Komaba teaches the output circuit outputs the first pixel data after output of the second pixel data is completed (Komaba, Fig. 2 DS1-DS3 & DVS1-DVS3 focus detection signals are read out prior to DHG1-DHG3 image signals). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Komaba with those of Ise and Komaba because it is widely known in the art to output imaging data after output of focus detection data is completed.
Claims 13 & 18 are rejected under 35 U.S.C. 103 as being unpatentable over Ise in view of Izawa (US 20150181127 A1, hereinafter, "Izawa").
Regarding Claim 13, Ise teaches the limitations of dependent Claim 1 as noted above. Izawa teaches the image data includes pixel data based on the non-focus related pixel data and pixel data based on a statistical value of the focus related pixel data obtained by the plurality of reading of the focus related pixel data (Izawa, [0198], ln. 3-6, "…an example has been given in which single color pixels are employed as the phase difference pixels, however there is no limitation thereto, and two or more types of pixel out of the R, G, B pixels may be employed as the phase difference pixels."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Izawa with those of Ise because it is widely known in the art to use RGB pixels as phase difference pixels as well.
Regarding Claim 18, Ise teaches an imaging apparatus comprising: the imaging element according to claim 1 (Reasons for rejection identical to Claim 1). Ise does not teach a processor configured to perform at least one of a control for displaying the image based on the image data output by the output circuit on a display or a control for storing the image data output by the output circuit in a storage device. However, Izawa teaches a processor configured to perform at least one of a control for displaying the image based on the image data output by the output circuit on a display (Izawa, [0014], ln. 1 & 11-14, "An image processing device according to a first aspect of the present invention includes…a display controller that displays on the display section the first display image generated by the first display image generation section, and displays on the display section the second display image generated by the second display image generation section within a display region of the first display image.") or a control for storing the image data output by the output circuit in a storage device (Izawa, [0072], ln. 10-11, "The memory 26 includes a non-volatile storage region [for example EEPROM or the like] stored with parameters, programs, and the like..."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Izawa with those of Ise because it is widely known in the art to use a processing device that includes a display controller. It is also widely known in the art to use non-volatile storage.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Ise in view of Negishi (US 20170264846 A1, hereinafter, "Negishi").
Regarding Claim 14, Ise teaches the limitations of dependent Claim 1 as noted above. Negishi teaches an A/D converter that is shared for the focus related pixel data and the non-focus related pixel data, wherein the A/D converter performs A/D conversion on the focus related pixel data and the non-focus related pixel data at different timings (Negishi, [0074] ln. 1-5 & [0075], ln. 1-4, "In step S901, the reference voltage VREF is switched in synchronization with trigger signals φTRi and φTRf output from TG108 in the image sensor 606. Specifically, in the case of the time period Tf during which focus detection pixels are read out, the procedure advances to step S902, and in the case of the time period Ti during which image forming pixels are read out, the procedure advances to step S903." Continuing to [0075], ln. 1-4, "Accordingly, the reference voltage VREF is switched between image forming pixels and focus detection pixels. This makes it possible to perform more accurate A/D conversion on focus detection pixels whose sensitivity is relatively low compared to image forming pixels, in the case where the pixel signal VSsig is lower than Vc."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Negishi with those of Ise because it is widely known in the art to use the same A/D converter to convert image pixel signals and focus detection pixel signals at different times.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Ise in view of Takuma & Kawakami (US 4833541 A, hereinafter, "Takuma").
Regarding Claim 15, Ise teaches the limitations of dependent Claim 1 as noted above. Takuma teaches a plurality of A/D converters, wherein the plurality of A/D converters include a first A/D converter used for only the focus related pixel data and a second A/D converter used for only the non-focus related pixel data (Takuma, [0028], ln. 5-8, "However, dedicated A/D converters and accumulating circuits are provided for calculating the focus evaluating value and the exposure evaluating value, so that the automatic focusing operation and the automatic iris operation can be performed with a higher precision in response to the evaluating value every one field."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Takuma with those of Ise because it is widely known in the art to use dedicated A/D converters for calculating focus and exposure values separately.
Claims 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Ise in view of Choi et al (US 20190074316 A1, hereinafter, "Choi").
Regarding Claim 16, Ise teaches the limitations of dependent Claim 1 as noted above. Choi teaches at least a photoelectric conversion element and the memory are formed in one chip (Choi, Abstract, ln. 3-4, "A memory chip [200] is mounted on the first surface of the image sensor chip…"). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Choi with those of Ise because it is widely known in the art to mount a memory chip on an image sensor chip.
Regarding Claim 17, Ise and Choi teach the limitations of dependent Claim 16 as noted above. Choi teaches the imaging element is a laminated imaging element in which the photoelectric conversion element is laminated with the memory (Choi, Abstract, ln. 6-7, "A mold layer [300] is formed on the first surface of the image sensor chip to cover a side surface of the memory chip to form a chip stack."). It would have been obvious to a person having ordinary skill in the art at the time of the invention to combine the teachings of Choi with those of Ise and Choi because it is widely known in the art to form a chip stack using a mold layer.
Conclusion
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/STEVEN DANIEL BARRY/Examiner, Art Unit 2638
/LIN YE/Supervisory Patent Examiner, Art Unit 2638
