Prosecution Insights
Last updated: August 17, 2026
Application No. 19/272,459

METHOD FOR DETECTING FAULT, ELECTRONIC DEVICE AND STORAGE MEDIUM

Non-Final OA §102§103
Filed
Jul 17, 2025
Priority
Dec 16, 2024 — CN 202411855982.2
Examiner
TRUONG, LOAN
Art Unit
Tech Center
Assignee
Baidu Online Network Technology (Beijing) Co., Ltd.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
462 granted / 604 resolved
+16.5% vs TC avg
Moderate +11% lift
Without
With
+11.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
15 currently pending
Career history
633
Total Applications
across all art units

Statute-Specific Performance

§101
8.0%
-32.0% vs TC avg
§103
49.4%
+9.4% vs TC avg
§102
24.8%
-15.2% vs TC avg
§112
8.6%
-31.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 604 resolved cases

Office Action

§102 §103
DETAILED ACTION This office action is in response to the filed application 19/272,459 on July 17, 2025. Claims 1-20 are presented for examination. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statements (IDS) submitted on September 22, 2025 was in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements were considered by the Examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-6, 9-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al. (US 2023/0169351). In regard to claim 1, Wang et al. teach a method for detecting a fault, comprising: determining a plurality of computing devices, wherein the plurality of computing devices are used to perform model training based on a pipeline parallelism strategy (slicing the model to be trained … so that various parallel strategies may be flexibly represented and combined, para. 43); determining a parameter and a scheduling strategy used by the pipeline parallelism strategy (a distribution strategy of each of slicing results in the computing resources is determined, fig. 1, para. 31-35); determining idle time of each computing device among the plurality of computing devices in a model training process based on the parameter and the scheduling strategy (an attribute of computing resource allocated to the model for training is obtained … based on … idle computing resources, para. 31-35, fig. 1); and performing fault detection on each computing device during the idle time of each computing device in the model training process (trigger fault-tolerance function of a task being trained, para. 50). In regard to 2, Wang et al. teach the method of claim 1, wherein the parameter comprises a pipeline dimension (slicing strategy, fig. 3, para. 65-68). In regard to 3, Wang et al. teach the method of claim 2, wherein determining the idle time of each computing device among the plurality of computing devices in the model training process based on the parameter and the scheduling strategy, comprises: determining the number of idle times of each computing device in the model training process according to the pipeline dimension (obtaining an attribute of computing resources allocated to the model … idle computing resources, fig. 1, S102); and determining the idle time of each computing device in the model training process based on the number and a distribution rule of the idle times specified by the scheduling strategy (determining a distribution strategy of each of the slicing results in the computing resources based on the attributes, fig. 1, S103). In regard to 4, Wang et al. teach the method of claim 3, wherein the model is divided into a plurality of micro-batches; and the distribution rule comprises: for each micro-batch, in a forward calculation process of the micro-batch, the plurality of computing devices sequentially perform calculation processes for the micro-batch in a first order (for each slice … slicing mapping information of the slice, fig. 4, para. 69-75); and each computing device waits for other computing devices before the computing device to complete calculation before performing calculation, wherein the waiting time is the idle time (slicing of the model to be trained and determination of the attribute of the computing resource may be performed in parallel … available resource on the training platform may be analyzed as a whole based on the trigger condition, to determine a computing resource allocation result in response to the model training request based on the computing resource requirement of the model to be trained, the computing resources occupied by the other models being trained and the idle computing resources, para. 53); and in a backward calculation process of the micro-batch, the plurality of computing devices sequentially execute calculation processes for the micro-batch in a reverse order of the first order (determining placement information of each slice using the distributed attribute of each slice, fig. 5, para. 83-87); and each computing device waits for other computing devices behind the computing device to complete calculation before performing calculation, and the waiting time is the idle time (allocation of computing resources may be determined based on a content of the model training request initiated by the client …. where queuing situation may occur in the computing resources, para. 121-122). In regard to 5, Wang et al. teach the method of claim 1, wherein performing the fault detection on each computing device, comprises: for each computing device, calling a fault detection program during the idle time of the computing device to implement fault detection of the computing device (if the current idle hardware can meet the current user demand, … trigger a fault-tolerant function of a task being trained, para. 50) In regard to 6, Wang et al. teach the method of claim 5, further comprising: determining the fault detection program, wherein the fault detection program is used to detect at least one of hardware status, calculation accuracy, or memory and storage medium of the computing device (failure recovery of the computing resources is waited in response to the training mode being a fault-tolerant training mode, para. 151). In regard to 9, Wang et al. teach the method of claim 1, further comprising: stopping the model training process, in a case of a fault in any one of the computing devices is detected (otherwise the task ends and exits, para. 154). In regard to 10, Wang et al. teach an electronic device, comprising: at least one processor (device, para. 4); and a memory connected in communication with the at least one processor (storage medium, para. 4); wherein the memory stores an instruction executable by the at least one processor, and the instruction, when executed by the at least one processor, enables the at least one processor to execute: determining a plurality of computing devices, wherein the plurality of computing devices are used to perform model training based on a pipeline parallelism strategy (slicing the model to be trained … so that various parallel strategies may be flexibly represented and combined, para. 43); determining a parameter and a scheduling strategy used by the pipeline parallelism strategy (a distribution strategy of each of slicing results in the computing resources is determined, fig. 1, para. 31-35); determining idle time of each computing device among the plurality of computing devices in a model training process based on the parameter and the scheduling strategy (an attribute of computing resource allocated to the model for training is obtained … based on … idle computing resources, para. 31-35, fig. 1); and performing fault detection on each computing device during the idle time of each computing device in the model training process (trigger fault-tolerance function of a task being trained, para. 50). In regard to 11, Wang et al. teach the electronic device of claim 10, wherein the parameter comprises a pipeline dimension (slicing strategy, fig. 3, para. 65-68). In regard to 12, Wang et al. teach the electronic device of claim PNG media_image1.png 87 5 media_image1.png Greyscale 11, wherein the instruction, when executed by the at least one processor, enables the at least one processor to execute determining the idle time of each computing device among the plurality of computing devices in the model training process based on the parameter and the scheduling strategy, by: determining the number of idle times of each computing device in the model training process according to the pipeline dimension (obtaining an attribute of computing resources allocated to the model … idle computing resources, fig. 1, S102); and determining the idle time of each computing device in the model training process based on the number and a distribution rule of the idle times specified by the scheduling strategy (determining a distribution strategy of each of the slicing results in the computing resources based on the attributes, fig. 1, S103). In regard to 13, Wang et al. teach the electronic device of claim 12, wherein the model is divided into a plurality of micro- batches; and the distribution rule comprises: for each micro-batch, in a forward calculation process of the micro-batch, the plurality of computing devices sequentially perform calculation processes for the micro-batch in a first order (for each slice … slicing mapping information of the slice, fig. 4, para. 69-75); and each computing device waits for other computing devices before the computing device to complete calculation before performing calculation, wherein the waiting time is the idle time (slicing of the model to be trained and determination of the attribute of the computing resource may be performed in parallel … available resource on the training platform may be analyzed as a whole based on the trigger condition, to determine a computing resource allocation result in response to the model training request based on the computing resource requirement of the model to be trained, the computing resources occupied by the other models being trained and the idle computing resources, para. 53); and in a backward calculation process of the micro-batch, the plurality of computing devices sequentially execute calculation processes for the micro-batch in a reverse order of the first order (determining placement information of each slice using the distributed attribute of each slice, fig. 5, para. 83-87); and each computing device waits for other computing devices behind the computing device to complete calculation before performing calculation, and the waiting time is the idle time (allocation of computing resources may be determined based on a content of the model training request initiated by the client …. where queuing situation may occur in the computing resources, para. 121-122). In regard to 14, Wang et al. teach the electronic device of claim 10, wherein the instruction, when executed by the at least one processor, enables the at least one processor to execute performing the fault detection on each computing device, by: for each computing device, calling a fault detection program during the idle time of the computing device to implement fault detection of the computing device (if the current idle hardware can meet the current user demand, … trigger a fault-tolerant function of a task being trained, para. 50). In regard to 15, Wang et al. teach the electronic device of claim 14, wherein the instruction, when executed by the at least one processor, enables the at least one processor to further execute: determining the fault detection program, wherein the fault detection program is used to detect at least one of hardware status, calculation accuracy, or memory and storage medium of the computing device (failure recovery of the computing resources is waited in response to the training mode being a fault-tolerant training mode, para. 151). In regard to 16, Wang et al. teach a non-transitory computer-readable storage medium storing a computer instruction thereon, wherein the computer instruction is used to cause a computer to execute: determining a plurality of computing devices, wherein the plurality of computing devices are used to perform model training based on a pipeline parallelism strategy (slicing the model to be trained … so that various parallel strategies may be flexibly represented and combined, para. 43); determining a parameter and a scheduling strategy used by the pipeline parallelism strategy (a distribution strategy of each of slicing results in the computing resources is determined, fig. 1, para. 31-35); determining idle time of each computing device among the plurality of computing devices in a model training process based on the parameter and the scheduling strategy (an attribute of computing resource allocated to the model for training is obtained … based on … idle computing resources, para. 31-35, fig. 1); and performing fault detection on each computing device during the idle time of each computing device in the model training process (trigger fault-tolerance function of a task being trained, para. 50). In regard to 17, Wang et al. teach the non-transitory computer-readable storage medium of claim 16, wherein the parameter comprises a pipeline dimension (slicing strategy, fig. 3, para. 65-68). In regard to 18, Wang et al. teach the non-transitory computer-readable storage medium of claim 17, wherein the computer instruction is used to cause the computer to execute determining the idle time of each computing device among the plurality of computing devices in the model training process based on the parameter and the scheduling strategy, by: determining the number of idle times of each computing device in the model training process according to the pipeline dimension (obtaining an attribute of computing resources allocated to the model … idle computing resources, fig. 1, S102); and determining the idle time of each computing device in the model training process based on the number and a distribution rule of the idle times specified by the scheduling strategy (determining a distribution strategy of each of the slicing results in the computing resources based on the attributes, fig. 1, S103). In regard to 19, Wang et al. teach the non-transitory computer-readable storage medium of claim 18, wherein the model is divided into a plurality of micro-batches; and the distribution rule comprises: for each micro-batch, in a forward calculation process of the micro-batch, the plurality of computing devices sequentially perform calculation processes for the micro-batch in a first order (for each slice … slicing mapping information of the slice, fig. 4, para. 69-75); and each computing device waits for other computing devices before the computing device to complete calculation before performing calculation, wherein the waiting time is the idle time (slicing of the model to be trained and determination of the attribute of the computing resource may be performed in parallel … available resource on the training platform may be analyzed as a whole based on the trigger condition, to determine a computing resource allocation result in response to the model training request based on the computing resource requirement of the model to be trained, the computing resources occupied by the other models being trained and the idle computing resources, para. 53); and in a backward calculation process of the micro-batch, the plurality of computing devices sequentially execute calculation processes for the micro-batch in a reverse order of the first order (determining placement information of each slice using the distributed attribute of each slice, fig. 5, para. 83-87); and each computing device waits for other computing devices behind the computing device to complete calculation before performing calculation, and the waiting time is the idle time (allocation of computing resources may be determined based on a content of the model training request initiated by the client …. where queuing situation may occur in the computing resources, para. 121-122). In regard to 20, Wang et al. teach the non-transitory computer-readable storage medium of claim 16, wherein the computer instruction is used to cause the computer to execute performing the fault detection on each computing device, by: for each computing device, calling a fault detection program during the idle time of the computing device to implement fault detection of the computing device (if the current idle hardware can meet the current user demand, … trigger a fault-tolerant function of a task being trained, para. 50). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 2023/0169351) in further view of Patil et al. (US 2025/0307050). In regard to 7, Wang et al. does not explicitly teach the method of claim 6, wherein detecting the calculation accuracy comprises: controlling the computing device to execute a preset calculation task and obtain a calculation result; comparing the calculation result with an expected result of the calculation task; and determining a detection result of the calculation accuracy according to a comparison result. Patil et al. teach of a model training (para. 88). The system may determine the first recommendation based on the first output conducting a structured comparison between the expected and actual performance of a specific component (para. 120). Once the system identifies both the actual and expected routes, it performs a comparisons to detect discrepancies (para. 136). It would have been obvious to modify the method of Wang et al. by adding Patil et al. training the AI model. A person of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to make the modification because it would aid in continuously refining process execution through AI driven analysis, the system ensures optimal performance, reliability and resilience (para. 147). In regard to 8, Wang et al. does not explicitly teach the method of claim 7, wherein detecting the memory and storage medium comprises: detecting at least one of memory leak and read/write anomaly. Patil et al. teach of the system applies AI-driven anomaly detection, static code analysis, and pattern recognition to identify errors such as syntax issues, runtime exceptions, logical inconsistencies, memory leaks, or inefficient code execution (para. 158). Refer to claim 7 for motivational statement. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO 892. Franza et al. (US 12,682,039) monitoring software container and training a model Piccolo et al. (US 12,619,941) training of the scoring model, evaluation or detection of memory leaks Pasquali et al. (US 2026/0119835) model training Hamachi et al. (US 2026/0010831) machine learning model and calculate accuracy Pappas et al. (US 2025/0307689) training foundation models and comparing output for accuracy calculations Diao et al. (US 2026/0203135) deep learning models Le et al. (US 2026/0195646) forward and backward passes in parallel processing Any inquiry concerning this communication or earlier communications from the examiner should be directed to Loan Truong whose telephone number is 408-918-7552. The examiner can normally be reached on 10AM-6PM PST M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner' s supervisor, Ashish Thomas can be reached on 571-272-0631. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Loan L.T. Truong/Primary Examiner, Art Unit 2114 HYPERLINK "mailto:Loan.truong@uspto.gov" Loan.truong@uspto.gov
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Prosecution Timeline

Jul 17, 2025
Application Filed
Jul 30, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
88%
With Interview (+11.4%)
3y 2m (~2y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 604 resolved cases by this examiner. Grant probability derived from career allowance rate.

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