DETAILED ACTION
This Action is responsive to the Application filed on 07/21/2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Status
Claims 1-20 are presented. Claims 1-20 are pending and have been examined.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 11 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Khayat et al. (US 20240054046 A1)(hereafter referred to as Khayat).
Regarding Claim 1,
Khayat anticipates the following limitations:
A storage device (Fig. 1A) comprising:
a plurality of nonvolatile memory devices (Memory Device 130, Fig. 1A // “one or more non-volatile memory devices” [0032] // “Each of the memory devices 130 can include one or more arrays of memory cells … a particular memory device can include an SLC portion, and an MLC portion, a TLC portion, a QLC portion, or a PLC portion of memory cells” [0040]) – A memory sub-system includes one or more non-volatile memory devices 130. Memory Devices 130 include one or more types or memory cell arrays including SLC, MLC, TLC, QLC, or PLC cells. In the context of Khayat, memory devices 130 including SLC cells can be considered as first memory devices out of the plurality of memory devices. Similarly, memory devices including QLC cells can be considered as second memory devices out of the plurality of memory devices--; and
a memory controller (Memory Sub-System Controller 115, Fig. 1A) configured to control the plurality of nonvolatile memory devices (¶0042), wherein the memory controller is further configured to (¶¶0077; 0100), in a copyback operation (Figs. 6 + 8): -- A management component of controller 115 initiates the copyback operations depicted in Figs. 8 and 6.
transfer (Fig. 8, step 810 // Fig. 6, step 670) first read commands (¶0086) to first nonvolatile memory devices (“a source block(s) in an SLC portion” [0079]) among the plurality of nonvolatile memory devices (“At operation 810, the processing logic can initiate a copyback operation”[0101] // “At operation 670, the processing logic sends, to the memory device, a corrective copyback command … In particular, the processing logic can performs a scan of the data by reading the data out of the memory device” [0086] // ¶¶0077-86 // ¶0020) -- During step 810, a copyback operation (e.g., a corrective copyback operation; see Fig. 6) is initiated. To perform corrective copyback, the controller reads source data from source memory blocks (i.e., “transfer[s] first read commands” which are located in an SLC portion of memory devices 130 (i.e., at least “to first nonvolatile memory devices”)--,
transfer (Fig. 8, step 810 // Fig. 6, step 690) first program commands and first data (¶0089) read in response to the first read commands to second nonvolatile memory devices (“a destination block(s) in a QLC portion” [0079]) among the plurality of nonvolatile memory devices (“At operation 690, the processing logic sends the corrected data to the memory device to be programed to the destination block … The data can be programmed to the destination block using coarse-fine programming” [0089]) – As part of corrective copyback, corrected data read from the source blocks (i.e., “first data”) of the SLC portion of devices 130 is programmed into destination blocks of the QLC portion of devices 130 (i.e., “transfer[ring] first program commands” to the destination blocks; i.e., to nonvolatile devices 130). In the context of Fig. 1A, the memory devices 130 containing a QLC portion of memory correspond to “one or more second nonvolatile memory devices”--, and
transfer (Fig. 8, step 820) suspend commands associated with the first program commands to the second nonvolatile memory devices. (“while performing operations related to the copyback operation … the processing device receives a memory access command … At operation 820, the processing logic initiates a program suspend protocol … related to the copyback operation” [0102-103] // “a program suspend command” [0025]) – While performing the copyback operations, a read command is received. In step 820, a program suspend protocol is initiated with respect to the copyback operation. The program suspend protocol involves transferring a program suspend command to the non-volatile memory device to suspend a write operation which is currently being performed. One of ordinary skill in the art would understand that the write operation performed as part of copyback and thus which would be suspended would be the write operation of corrected data to the QLC portion of memory (e.g., step 690 of Fig. 6) because during copyback, data is read from a source and is written to a destination.
Regarding Claim 11,
Khayat anticipates the following limitations:
An operating method of a storage device (Fig. 1A) which comprises a plurality of nonvolatile memory devices (Memory Device 130, Fig. 1A // “one or more non-volatile memory devices” [0032] // “Each of the memory devices 130 can include one or more arrays of memory cells … a particular memory device can include an SLC portion, and an MLC portion, a TLC portion, a QLC portion, or a PLC portion of memory cells” [0040]) – A memory sub-system includes one or more non-volatile memory devices 130. Memory Devices 130 include one or more types or memory cell arrays including SLC, MLC, TLC, QLC, or PLC cells. In the context of Khayat, memory devices 130 including SLC cells can be considered as first memory devices out of the plurality of memory devices. Similarly, memory devices including QLC cells can be considered as second memory devices out of the plurality of memory devices--
and a memory controller (Memory Sub-System Controller 115, Fig. 1A), the operating method comprising:
transferring (Fig. 8, step 810 // Fig. 6, step 670), by the memory controller (¶0100), first read commands (¶0086) to first nonvolatile memory devices (“a source block(s) in an SLC portion” [0079]) among the plurality of nonvolatile memory devices, in a copyback operation (“At operation 810, the processing logic can initiate a copyback operation”[0101] // “At operation 670, the processing logic sends, to the memory device, a corrective copyback command … In particular, the processing logic can performs a scan of the data by reading the data out of the memory device” [0086] // ¶¶0077-86 // ¶0020) -- During step 810, a copyback operation (e.g., a corrective copyback operation; see Fig. 6) is initiated. To perform corrective copyback, the controller reads source data from source memory blocks (i.e., “transfer[s] first read commands” which are located in an SLC portion of memory devices 130 (i.e., at least “to first nonvolatile memory devices”)--;
transferring (Fig. 8, step 810 // Fig. 6, step 690), by the memory controller, first program commands and first data (¶0089) read in response to the first read commands to second nonvolatile memory devices (“a destination block(s) in a QLC portion” [0079]) among the plurality of nonvolatile memory devices, in the copyback operation (“At operation 690, the processing logic sends the corrected data to the memory device to be programed to the destination block … The data can be programmed to the destination block using coarse-fine programming” [0089]) – As part of corrective copyback, corrected data read from the source blocks (i.e., “first data”) of the SLC portion of devices 130 is programmed into destination blocks of the QLC portion of devices 130 (i.e., “transfer[ring] first program commands” to the destination blocks; i.e., to nonvolatile devices 130). In the context of Fig. 1A, the memory devices 130 containing a QLC portion of memory correspond to “one or more second nonvolatile memory devices”--; and
transferring (Fig. 8, step 820), by the memory controller, suspend commands associated with the first program commands to the second nonvolatile memory devices, in the copyback operation. (“while performing operations related to the copyback operation … the processing device receives a memory access command … At operation 820, the processing logic initiates a program suspend protocol … related to the copyback operation” [0102-103] // “a program suspend command” [0025]) – While performing the copyback operations, a read command is received. In step 820, a program suspend protocol is initiated with respect to the copyback operation. The program suspend protocol involves transferring a program suspend command to the non-volatile memory device to suspend a write operation which is currently being performed. One of ordinary skill in the art would understand that the write operation performed as part of copyback and thus which would be suspended would be the write operation of corrected data to the QLC portion of memory (e.g., step 690 of Fig. 6) because during copyback, data is read from a source and is written to a destination.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 2-4, 7, 12-14, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Khayat further in view of Gohain et al. (US 20240220126 A1)(hereafter referred to as Gohain).
Regarding Claim 2,
Khayat discloses the following limitations:
A storage device (Fig. 1A) comprising:
a plurality of nonvolatile memory devices (Memory Device 130, Fig. 1A // “one or more non-volatile memory devices” [0032]) – A memory sub-system includes one or more non-volatile memory devices 130.--
a memory controller (Memory Sub-System Controller 115, Fig. 1A) configured to control the plurality of nonvolatile memory devices (¶0042), wherein the memory controller is further configured to (¶¶0077; 0100), in a copyback operation (Figs. 6 + 8): -- A management component of controller 115 initiates the copyback operations depicted in Figs. 8 and 6.
transfer (Fig. 8, step 810 // Fig. 6, step 670) first read commands (¶0086) to … nonvolatile memory devices (“a source block(s) in an SLC portion” [0079]) among the plurality of nonvolatile memory devices(“At operation 810, the processing logic can initiate a copyback operation”[0101] // “At operation 670, the processing logic sends, to the memory device, a corrective copyback command … In particular, the processing logic can performs a scan of the data by reading the data out of the memory device” [0086] // ¶¶0077-86 // ¶0020) -- During step 810, a copyback operation (e.g., a corrective copyback operation; see Fig. 6) is initiated. To perform corrective copyback, the controller reads source data from source memory blocks (i.e., “transfer[s] first read commands” which are located in an SLC portion of memory devices 130 (i.e., at least to “nonvolatile memory devices”)--,
transfer (Fig. 8, step 810 // Fig. 6, step 690) first program commands and first data (¶0089) read in response to the first read commands to second nonvolatile memory devices (“a destination block(s) in a QLC portion” [0079]) among the plurality of nonvolatile memory devices (“At operation 690, the processing logic sends the corrected data to the memory device to be programed to the destination block … The data can be programmed to the destination block using coarse-fine programming” [0089]) – As part of corrective copyback, corrected data read from the source blocks (i.e., “first data”) of the SLC portion of devices 130 is programmed into destination blocks of the QLC portion of devices 130 (i.e., “transfer[ring] first program commands” to the destination blocks; i.e., to nonvolatile devices 130). In the context of Fig. 1A, the memory devices 130 containing a QLC portion of memory correspond to “one or more second nonvolatile memory devices”--, and
transfer (Fig. 8, step 820) suspend commands associated with the first program commands to the second nonvolatile memory devices. (“while performing operations related to the copyback operation … the processing device receives a memory access command … At operation 820, the processing logic initiates a program suspend protocol … related to the copyback operation” [0102-103] // “a program suspend command” [0025]) – While performing the copyback operations, a read command is received. In step 820, a program suspend protocol is initiated with respect to the copyback operation. The program suspend protocol involves transferring a program suspend command to the non-volatile memory device to suspend a write operation which is currently being performed. One of ordinary skill in the art would understand that the write operation performed as part of copyback and thus which would be suspended would be the write operation of corrected data to the QLC portion of memory (e.g., step 690 of Fig. 6) because during copyback, data is read from a source and is written to a destination.
Although Khayat ¶0020 discloses the non-volatile memory devices 130 can include both an SLC portion of memory cells and a QLC portion of memory cells, Khayat does not specify how SLC memory cells and QLC memory cells are distributed across the one or more memory devices 130. Thus, Khayat does not make clear whether a read command sent to a source SLC cell would necessarily be located on a memory device 130 which is distinct from a memory device including the destination QLC cell. Specifically, Khayat does not anticipate the following limitations:
transfer first read commands to first nonvolatile memory devices …
transfer first program commands and first data … to second nonvolatile memory devices
However, Gohain discloses within the context of performing copyback (e.g.., folding; see Khayat ¶0024) operations that data read from a first memory device is written into a second memory device. Gohain discloses the following limitations:
transfer first read commands to first nonvolatile memory devices (Memory Devices 130, Fig. 1 // Die 210-a, Fig. 2A)(“memory system 110 may support folding operations (e.g., data transfer operations) … For example, the memory system 110 may perform single-die access operations to program data to a set of source data blocks (e.g., blocks 170 … that spans the planes 165 of multiple dies 160 or memory devices 130) of the memory system 110 … the data transfer diagram 200 … illustrate folding data 215 between blocks of a memory system” [0035-36]) – Examiner considers Memory System 110 depicted in Gohain Fig. 1 as analogous to the memory sub-system 110 depicted in Khayat Fig. 1A. As taught in Gohain ¶0035 and show in Fig. 2A, a data folding (i.e., copyback) operation is performed from a set of source blocks to a set of destination blocks. The set of source blocks are located on distinct dies which span multiple memory devices 130.. As shown in Fig. 2A, the folding operation relocates certain data (i.e., data 215-b of source data block 211-a; i.e., “first data”; see time 202) from a first, source memory die (i.e., die 210-a; i.e., “first nonvolatile memory devices”) to a second, destination memory die (i.e., die 210-b; see time 203). Accordingly, in order to fold data 215-b, a read command corresponding to data 215-b would be transmit to die 210-a-- …
transfer first program commands and first data … to second nonvolatile memory devices (Memory Devices 130, Fig. 1 // Die 210-b, Fig. 2A) – As discussed above, data 215-b is relocated from source chip 205-a to a distinct destination die 210-b (i.e., “second nonvolatile memory devices”). Accordingly, in order to fold data 215-b, a write command corresponding to data 215-b would be transmit to die 210-b.
Khayat and Gohain are considered analogous to the claimed invention because they all relate to the same field of scheduling folding operations within a storage environment comprising plural nonvolatile NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat with the teachings of Gohain and realize a copyback operation whereby data is read from a first nonvolatile memory device and is copied back into a second nonvolatile memory device. Performing folding across distinct memory devices enables data which is programmed according to a single-die programming to be converted into a sequential, multi-die access format for read accesses, which enables parallel reading of data and improves performance by improving read speed and reducing volatile memory usage, as disclosed in Gohain ¶0035: “data may be programmed to the source data blocks in a first order according to the single-die access operation, and the data may be folded to the destination data blocks in a second order … The second order may be based on a third order associated with reading the data the data as part of a multi-die access operation. Reading the data in the third order according to the multi-die access operation may support parallel reading, such that the data may be sequentially read across the memory dies of the memory system at a relatively high speed and with relatively low volatile memory usage.” [0035]
The combined teachings of Khayat and Gohain additionally disclose the following limitations:
wherein the memory controller is further configured to, in the copyback operation (see limitation mappings above):
transfer second read commands to third nonvolatile memory devices (Gohain, Die 210-d, Fig. 2A) among the plurality of nonvolatile memory devices; and
transfer second program commands and second data read by the second read commands to fourth nonvolatile memory devices (Gohain, Die 210-c ,Fig. 2A) among the plurality of nonvolatile memory devices. (Gohain, Fig. 2A) – As shown in Gohain, the folding operation relocates second data (i.e., data 215-k from a second, source data block 211-d; see time 202) from a second, source memory die (i.e., Die 210-d; i.e., “third nonvolatile memory devices”) to a second, destination memory die (i.e., Die 210-c, see time 203; i.e., “fourth nonvolatile memory devices”). Accordingly, in order to fold data 215-k, a read command corresponding to data 215-k would be transmit to die 210-d and a write command corresponding to data 215-k would be transmit to die 210-c.
Regarding Claim 3,
The same motivation to combine provided in Claim 2 is equally applicable to Claim 3. The combined teachings of Khayat and Gohain disclose the following limitations:
The storage device of claim 2, wherein the memory controller is further configured to, in the copyback operation,
transfer (Khayat, Fig. 8, step 855) resume commands to the second nonvolatile memory devices after transferring the second data and the second program commands to the fourth nonvolatile memory devices. (Khayat, “Responsive to the processing logic determining that the shallow error-handling techniques corrected the errors in the data … the operation related to the read command can be completed by the processing logic, and the processing logic proceeds to operation 855 where the processing logic resumes the copyback operation initiated in operation 810.” [0109] // Fig. 8) – As taught in Khayat Fig. 8, a copyback operation is initiated (step 810), program operations are suspended (step 820), and copyback is resumed (step 855). As previously discussed (see Claim 2 limitation mappings above), the suspend program operation performed during step 810 suspends the writing of data performed during copyback. One of ordinary skill in the art would understand that a suspend program command would be sent to a destination memory device (e.g., a QLC block) after a program command is sent to the destination memory device because otherwise, there would be no pending program command to suspend using a suspend command. As shown in Khayat Fig. 8, the resume operation of step 855 takes place after the suspend operation of step 820. Accordingly, the resume operation of step 855 would take place after a program operation is transmit to a destination device as part of copyback (i.e., after transferring the first data and the first program commands to second nonvolatile memory devices AND after “transferring the second data and the second program commands to the fourth nonvolatile memory devices”).
Regarding Claim 4,
The same motivation to combine provided in Claim 2 is equally applicable to Claim 4. The combined teachings of Khayat and Gohain disclose the following limitations:
The storage device of claim 3, wherein the second nonvolatile memory devices are configured to stop program operations associated with the first program commands in response to the suspend commands (Khayat, “a program suspend protocol … can suspend performing the operations related to the copyback operation” [0103]) and to resume the program operations associated with the first program commands in response to the resume commands. (Khayat, “the processing logic resumes the copyback operation initiated in operation 810” [0109]) – As taught in Khayat, the suspend command transmit to destination memory devices during step 820 suspends program operations which are performed as part of the copyback initiated in step 810. The resume commands transmit to destination memory devices during step 855 resume operations associated with the copyback initiated in step 810. One of ordinary skill in the art would accordingly understand that program operations, which were suspended during step 820, would be resumed during step 855.
Regarding Claim 7,
The same motivation to combine provided in Claim 2 is equally applicable to Claim 7. The combined teachings of Khayat and Gohain disclose the following limitations:
The storage device of claim 3, wherein the second nonvolatile memory devices (Gohain, Die 210-b, Fig. 2A) are distinguished from the fourth nonvolatile memory devices. (Gohain, Die 210-c ,Fig. 2A) – As shown in Gohain Fig. 2A, data is relocated to distinct destination memory die.
Regarding Claim 12,
Khayat discloses the following limitations:
An operating method of a storage device (Fig. 1A) which comprises a plurality of nonvolatile memory devices (Memory Device 130, Fig. 1A // “one or more non-volatile memory devices” [0032]) -- A memory sub-system includes one or more non-volatile memory devices 130.—
and a memory controller (Memory Sub-System Controller 115, Fig. 1A), the operating method comprising:
transferring (Fig. 8, step 810 // Fig. 6, step 670), by the memory controller (¶0100), first read commands (¶0086) to … nonvolatile memory devices (“a source block(s) in an SLC portion” [0079]) among the plurality of nonvolatile memory devices, in a copyback operation (“At operation 810, the processing logic can initiate a copyback operation”[0101] // “At operation 670, the processing logic sends, to the memory device, a corrective copyback command … In particular, the processing logic can performs a scan of the data by reading the data out of the memory device” [0086] // ¶¶0077-86 // ¶0020) -- During step 810, a copyback operation (e.g., a corrective copyback operation; see Fig. 6) is initiated. To perform corrective copyback, the controller reads source data from source memory blocks (i.e., “transfer[s] first read commands” which are located in an SLC portion of memory devices 130 (i.e., at least to “nonvolatile memory devices”)--;
transferring (Fig. 8, step 810 // Fig. 6, step 690), by the memory controller, first program commands and first data (¶0089) read in response to the first read commands to second nonvolatile memory devices (“a destination block(s) in a QLC portion” [0079]) among the plurality of nonvolatile memory devices, in the copyback operation (“At operation 690, the processing logic sends the corrected data to the memory device to be programed to the destination block … The data can be programmed to the destination block using coarse-fine programming” [0089]) – As part of corrective copyback, corrected data read from the source blocks (i.e., “first data”) of the SLC portion of devices 130 is programmed into destination blocks of the QLC portion of devices 130 (i.e., “transfer[ring] first program commands” to the destination blocks; i.e., to nonvolatile devices 130). In the context of Fig. 1A, the memory devices 130 containing a QLC portion of memory correspond to “one or more second nonvolatile memory devices”--; and
transferring (Fig. 8, step 820), by the memory controller, suspend commands associated with the first program commands to the second nonvolatile memory devices, in the copyback operation. (“while performing operations related to the copyback operation … the processing device receives a memory access command … At operation 820, the processing logic initiates a program suspend protocol … related to the copyback operation” [0102-103] // “a program suspend command” [0025]) – While performing the copyback operations, a read command is received. In step 820, a program suspend protocol is initiated with respect to the copyback operation. The program suspend protocol involves transferring a program suspend command to the non-volatile memory device to suspend a write operation which is currently being performed. One of ordinary skill in the art would understand that the write operation performed as part of copyback and thus which would be suspended would be the write operation of corrected data to the QLC portion of memory (e.g., step 690 of Fig. 6) because during copyback, data is read from a source and is written to a destination.
Although Khayat ¶0020 discloses the non-volatile memory devices 130 can include both an SLC portion of memory cells and a QLC portion of memory cells, Khayat does not specify how SLC memory cells and QLC memory cells are distributed across the one or more memory devices 130. Thus, Khayat does not make clear whether a read command sent to a source SLC cell would necessarily be located on a memory device 130 which is distinct from a memory device including the destination QLC cell. Specifically, Khayat does not anticipate the following limitations:
transferring … first read commands to first nonvolatile memory devices …
transferring … first program commands and first data … to second nonvolatile memory devices
However, Gohain discloses within the context of performing copyback (e.g.., folding; see Khayat ¶0024) operations that data read from a first memory device is written into a second memory device. Gohain discloses the following limitations:
transferring … first read commands to first nonvolatile memory devices (Memory Devices 130, Fig. 1 // Die 210-a, Fig. 2A)(“memory system 110 may support folding operations (e.g., data transfer operations) … For example, the memory system 110 may perform single-die access operations to program data to a set of source data blocks (e.g., blocks 170 … that spans the planes 165 of multiple dies 160 or memory devices 130) of the memory system 110 … the data transfer diagram 200 … illustrate folding data 215 between blocks of a memory system” [0035-36]) – Examiner considers Memory System 110 depicted in Gohain Fig. 1 as analogous to the memory sub-system 110 depicted in Khayat Fig. 1A. As taught in Gohain ¶0035 and show in Fig. 2A, a data folding (i.e., copyback) operation is performed from a set of source blocks to a set of destination blocks. The set of source blocks are located on distinct dies which span multiple memory devices 130.. As shown in Fig. 2A, the folding operation relocates certain data (i.e., data 215-b of source data block 211-a; i.e., “first data”; see time 202) from a first, source memory die (i.e., die 210-a; i.e., “first nonvolatile memory devices”) to a second, destination memory die (i.e., die 210-b; see time 203). Accordingly, in order to fold data 215-b, a read command corresponding to data 215-b would be transmit to die 210-a-- …
transferring … first program commands and first data … to second nonvolatile memory devices (Memory Devices 130, Fig. 1 // Die 210-b, Fig. 2A) – As discussed above, data 215-b is relocated from source chip 205-a to a distinct destination die 210-b (i.e., “second nonvolatile memory devices”). Accordingly, in order to fold data 215-b, a write command corresponding to data 215-b would be transmit to die 210-b.
Khayat and Gohain are considered analogous to the claimed invention because they all relate to the same field of scheduling folding operations within a storage environment comprising plural nonvolatile NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat with the teachings of Gohain and realize a copyback operation whereby data is read from a first nonvolatile memory device and is copied back into a second nonvolatile memory device. Performing folding across distinct memory devices enables data which is programmed according to a single-die programming to be converted into a sequential, multi-die access format for read accesses, which enables parallel reading of data and improves performance by improving read speed and reducing volatile memory usage, as disclosed in Gohain ¶0035: “data may be programmed to the source data blocks in a first order according to the single-die access operation, and the data may be folded to the destination data blocks in a second order … The second order may be based on a third order associated with reading the data the data as part of a multi-die access operation. Reading the data in the third order according to the multi-die access operation may support parallel reading, such that the data may be sequentially read across the memory dies of the memory system at a relatively high speed and with relatively low volatile memory usage.” [0035]
The combined teachings of Khayat and Gohain additionally disclose the following limitations:
transferring, by the memory controller, second read commands to third nonvolatile memory devices (Gohain, Die 210-d, Fig. 2A) among the plurality of nonvolatile memory devices, in the copyback operation; and
transferring, by the memory controller, second program commands and second data read in by the second read commands to fourth nonvolatile memory devices (Gohain, Die 210-c ,Fig. 2A) among the plurality of nonvolatile memory devices, in the copyback operation. (Gohain, Fig. 2A) – As shown in Gohain, the folding operation relocates second data (i.e., data 215-k from a second, source data block 211-d; see time 202) from a second, source memory die (i.e., Die 210-d; i.e., “third nonvolatile memory devices”) to a second, destination memory die (i.e., Die 210-c, see time 203; i.e., “fourth nonvolatile memory devices”). Accordingly, in order to fold data 215-k, a read command corresponding to data 215-k would be transmit to die 210-d and a write command corresponding to data 215-k would be transmit to die 210-c.
Regarding Claim 13,
The same motivation to combine provided in Claim 12 is equally applicable to Claim 13. The combined teachings of Khayat and Gohain disclose the following limitations:
The operating method of claim 12, further comprising:
transferring (Khayat, Fig. 8, step 855), by the memory controller, resume commands to the second nonvolatile memory devices after transferring the second data and the second program commands to the fourth nonvolatile memory devices, in the copyback operation. (Khayat, “Responsive to the processing logic determining that the shallow error-handling techniques corrected the errors in the data … the operation related to the read command can be completed by the processing logic, and the processing logic proceeds to operation 855 where the processing logic resumes the copyback operation initiated in operation 810.” [0109] // Fig. 8) – As taught in Khayat Fig. 8, a copyback operation is initiated (step 810), program operations are suspended (step 820), and copyback is resumed (step 855). As previously discussed (see Claim 12 limitation mappings above), the suspend program operation performed during step 810 suspends the writing of data performed during copyback. One of ordinary skill in the art would understand that a suspend program command would be sent to a destination memory device (e.g., a QLC block) after a program command is sent to the destination memory device because otherwise, there would be no pending program command to suspend using a suspend command. As shown in Khayat Fig. 8, the resume operation of step 855 takes place after the suspend operation of step 820. Accordingly, the resume operation of step 855 would take place after a program operation is transmit to a destination device as part of copyback (i.e., after transferring the first data and the first program commands to second nonvolatile memory devices AND after “transferring the second data and the second program commands to the fourth nonvolatile memory devices”).
Regarding Claim 14,
The same motivation to combine provided in Claim 12 is equally applicable to Claim 14. The combined teachings of Khayat and Gohain disclose the following limitations:
The operating method of claim 13, further comprising:
stopping, by the second nonvolatile memory devices, program operations associated with the first program commands in response to the suspend commands (Khayat, “a program suspend protocol … can suspend performing the operations related to the copyback operation” [0103]); and resuming, by the second nonvolatile memory devices, the program operations associated with the first program commands in response to the resume commands. (Khayat, “the processing logic resumes the copyback operation initiated in operation 810” [0109]) – As taught in Khayat, the suspend command transmit to destination memory devices during step 820 suspends program operations which are performed as part of the copyback initiated in step 810. The resume commands transmit to destination memory devices during step 855 resume operations associated with the copyback initiated in step 810. One of ordinary skill in the art would accordingly understand that program operations, which were suspended during step 820, would be resumed during step 855.
Regarding Claim 17,
The same motivation to combine provided in Claim 12 is equally applicable to Claim 17. The combined teachings of Khayat and Gohain disclose the following limitations:
The operating method of claim 13, wherein the second nonvolatile memory devices (Gohain, Die 210-b, Fig. 2A) are distinguished from the fourth nonvolatile memory devices. (Gohain, Die 210-c ,Fig. 2A) – As shown in Gohain Fig. 2A, data is relocated to distinct destination memory die.
Claims 5-6 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Khayat further in view of Gohain and D’Eliseo et al. (US 20200226059 A1)(hereafter referred to as D’Eliseo).
Regarding Claim 5,
The same motivation to combine provided in Claim 2 is equally applicable to Claim 5. The combined teachings of Khayat and Gohain disclose the following limitations:
The storage device of claim 4 (see Claim 4 limitation mappings above), wherein the memory controller is further configured to … the program operations associated with the first program commands are initiated in the second nonvolatile memory devices. (Gohain, “Folding the data 215 to the destination data blocks 212 may include transferring … the data from the source data blocks 211 to the volatile memory device (e.g., SRAM) according to the order 225, and subsequently transferring … the data 215 from the volatile memory device to the destination data blocks 212 according to the order 255.” [0047]) – As taught in Gohain, as part of folding data to the destination memory device, a two-step process is performed whereby data is first sensed into volatile memory and is subsequently written from the volatile memory into the destination. In the context of Gohain, sensing the data into volatile memory can be considered as loading the data to the destination; whereas transferring the data from volatile memory into the destination can be considered as “initiat[ing]” “the program operations” in the destination (i.e., data is first loaded to volatile memory, after which a write is initiated/executed to transfer the data from volatile memory to nonvolatile memory at the destination).
The combined teachings of Khayat and Gohain do not provide explicit detail as to when the suspend programming operation of Gohain Fig. 8 would be transmit to the destination device in relation to the two-step process disclosed in Khayat. Accordingly, Khayat and Gohain do not disclose the following limitations:
transfer the suspend commands to the second nonvolatile memory devices before the program operations associated with the first program commands are initiated in the second nonvolatile memory devices.
However, D’Eliseo clarifies a timing of suspend operations with respect to internal memory management. D’Eliseo discloses the following limitations:
transfer the suspend commands to the second nonvolatile memory devices before the program operations associated with the first program commands are initiated in the second nonvolatile memory devices. (“the garbage collection is suspended when: 1) A predetermined number of garbage collection writes has been collected and loaded (e.g., in a cache) and are ready to write to a new block … At the suspension, the buffer is flushed (e.g., pages are written to the new block)” [0033] // Fig. 1) – Examiner considers memory controller 115 depicted in D’Eliseo Fig. 1 as analogous to “the memory controller”. As taught in D’Eliseo, while performing “garbage collection writes” to “a new block” (i.e., analogous to folding first and second data to second and fourth nonvolatile devices), data is first loaded to a garbage collection buffer (i.e., analogous to the volatile memory buffer used during folding of Gohain ¶0047) until a threshold number of writes is reached; after which garbage collection is suspended (i.e., “transfer[ring] the suspend commands to the second nonvolatile memory devices” after loading a threshold amount of data to the buffer). Suspending garbage collection enables data loaded to the garbage collection buffer to be written into the destination new block (i.e., the suspension takes place “before” programming is initiated in the destination).
Khayat, Gohain, and D’Eliseo are all considered analogous to the claimed invention because they all relate to the same field of performing internal data movement operations within NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat and Gohain with the teachings of D’Eliseo and realize a storage device whereby program commands performed as part of a copyback operation are suspended at a destination prior to initiating programming at the destination. Doing so reduces host latencies while still allowing a storage device to keep up with garbage collection, as disclosed in D’Eliseo ¶0033: “By limiting the garbage collection in this manner, host latencies are reduced while the device is able to keep up with garbage collection (e.g., the garbage collection is able to complete).” [0033]
Regarding Claim 6,
The same motivation to combine provided in Claim 2 is equally applicable to Claim 6. The combined teachings of Khayat and Gohain disclose the following limitations:
The storage device of claim 4 (see Claim 4 limitation mappings above), wherein the memory controller is further configured to … the first data are loaded to the second nonvolatile memory devices. (Gohain, “Folding the data 215 to the destination data blocks 212 may include transferring … the data from the source data blocks 211 to the volatile memory device (e.g., SRAM) according to the order 225, and subsequently transferring … the data 215 from the volatile memory device to the destination data blocks 212 according to the order 255.” [0047]) – As taught in Gohain, as part of folding data to the destination memory device, a two-step process is performed whereby data is first sensed into volatile memory and is subsequently written from the volatile memory into the destination. In the context of Gohain, sensing the data into volatile memory can be considered as “loading” the data to the destination; whereas transferring the data from volatile memory into the destination can be considered as initiating programming in the destination (i.e., data is first loaded to volatile memory, after which a write is initiated/executed to transfer the data from volatile memory to nonvolatile memory at the destination).
The combined teachings of Khayat and Gohain do not provide explicit detail as to when the suspend programming operation of Gohain Fig. 8 would be transmit to the destination device in relation to the two-step process disclosed in Khayat. Accordingly, Khayat and Gohain do not disclose the following limitations:
transfer the suspend commands to the second nonvolatile memory devices after the first data are loaded to the second nonvolatile memory devices.
However, D’Eliseo clarifies a timing of suspend operations with respect to internal memory management. D’Eliseo discloses the following limitations:
transfer the suspend commands to the second nonvolatile memory devices after the first data are loaded to the second nonvolatile memory devices. (“the garbage collection is suspended when: 1) A predetermined number of garbage collection writes has been collected and loaded (e.g., in a cache) and are ready to write to a new block … At the suspension, the buffer is flushed (e.g., pages are written to the new block)” [0033] // Fig. 1) – Examiner considers memory controller 115 depicted in D’Eliseo Fig. 1 as analogous to “the memory controller”. As taught in D’Eliseo, while performing “garbage collection writes” to “a new block” (i.e., analogous to folding first and second data to second and fourth nonvolatile devices), data is first loaded to a garbage collection buffer (i.e., analogous to the volatile memory buffer used during folding of Gohain ¶0047) until a threshold number of writes is reached; after which garbage collection is suspended (i.e., “transfer[ring] the suspend commands to the second nonvolatile memory devices” after loading a threshold amount of data to the buffer).
Khayat, Gohain, and D’Eliseo are all considered analogous to the claimed invention because they all relate to the same field of performing internal data movement operations within NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat and Gohain with the teachings of D’Eliseo and realize a storage device whereby program commands performed as part of a copyback operation are suspended at a destination after data are loaded to the destination. Doing so reduces host latencies while still allowing a storage device to keep up with garbage collection, as disclosed in D’Eliseo ¶0033: “By limiting the garbage collection in this manner, host latencies are reduced while the device is able to keep up with garbage collection (e.g., the garbage collection is able to complete).” [0033]
Regarding Claim 15,
The same motivation to combine provided in Claim 12 is equally applicable to Claim 15. The combined teachings of Khayat and Gohain disclose the following limitations:
The operating method of claim 4 (see Claim 4 limitation mappings above), wherein … the program operations associated with the first program commands are initiated in the second nonvolatile memory devices. (Gohain, “Folding the data 215 to the destination data blocks 212 may include transferring … the data from the source data blocks 211 to the volatile memory device (e.g., SRAM) according to the order 225, and subsequently transferring … the data 215 from the volatile memory device to the destination data blocks 212 according to the order 255.” [0047]) – As taught in Gohain, as part of folding data to the destination memory device, a two-step process is performed whereby data is first sensed into volatile memory and is subsequently written from the volatile memory into the destination. In the context of Gohain, sensing the data into volatile memory can be considered as loading the data to the destination; whereas transferring the data from volatile memory into the destination can be considered as “initiat[ing]” “the program operations” in the destination (i.e., data is first loaded to volatile memory, after which a write is initiated/executed to transfer the data from volatile memory to nonvolatile memory at the destination).
The combined teachings of Khayat and Gohain do not provide explicit detail as to when the suspend programming operation of Gohain Fig. 8 would be transmit to the destination device in relation to the two-step process disclosed in Khayat. Accordingly, Khayat and Gohain do not disclose the following limitations:
the transferring the suspend command comprises: transferring, by the memory controller, the suspend commands to the second nonvolatile memory devices before the program operations associated with the first program commands are initiated in the second nonvolatile memory devices.
However, D’Eliseo clarifies a timing of suspend operations with respect to internal memory management. D’Eliseo discloses the following limitations:
the transferring the suspend command comprises: transferring, by the memory controller (Memory Controller 115, Fig. 1), the suspend commands to the second nonvolatile memory devices before the program operations associated with the first program commands are initiated in the second nonvolatile memory devices. (“the garbage collection is suspended when: 1) A predetermined number of garbage collection writes has been collected and loaded (e.g., in a cache) and are ready to write to a new block … At the suspension, the buffer is flushed (e.g., pages are written to the new block)” [0033] // Fig. 1) – Examiner considers memory controller 115 depicted in D’Eliseo Fig. 1 as analogous to “the memory controller”. As taught in D’Eliseo, while performing “garbage collection writes” to “a new block” (i.e., analogous to folding first and second data to second and fourth nonvolatile devices), data is first loaded to a garbage collection buffer (i.e., analogous to the volatile memory buffer used during folding of Gohain ¶0047) until a threshold number of writes is reached; after which garbage collection is suspended (i.e., “transfer[ring] the suspend commands to the second nonvolatile memory devices” after loading a threshold amount of data to the buffer). Suspending garbage collection enables data loaded to the garbage collection buffer to be written into the destination new block (i.e., the suspension takes place “before” programming is initiated in the destination).
Khayat, Gohain, and D’Eliseo are all considered analogous to the claimed invention because they all relate to the same field of performing internal data movement operations within NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat and Gohain with the teachings of D’Eliseo and realize a storage device whereby program commands performed as part of a copyback operation are suspended at a destination prior to initiating programming at the destination. Doing so reduces host latencies while still allowing a storage device to keep up with garbage collection, as disclosed in D’Eliseo ¶0033: “By limiting the garbage collection in this manner, host latencies are reduced while the device is able to keep up with garbage collection (e.g., the garbage collection is able to complete).” [0033]
Regarding Claim 16,
The same motivation to combine provided in Claim 12 is equally applicable to Claim 16. The combined teachings of Khayat and Gohain disclose the following limitations:
The operating method of claim 14 (see Claim 14 limitation mappings above), … the first data are loaded to the second nonvolatile memory devices. (Gohain, “Folding the data 215 to the destination data blocks 212 may include transferring … the data from the source data blocks 211 to the volatile memory device (e.g., SRAM) according to the order 225, and subsequently transferring … the data 215 from the volatile memory device to the destination data blocks 212 according to the order 255.” [0047]) – As taught in Gohain, as part of folding data to the destination memory device, a two-step process is performed whereby data is first sensed into volatile memory and is subsequently written from the volatile memory into the destination. In the context of Gohain, sensing the data into volatile memory can be considered as “loading” the data to the destination; whereas transferring the data from volatile memory into the destination can be considered as initiating programming in the destination (i.e., data is first loaded to volatile memory, after which a write is initiated/executed to transfer the data from volatile memory to nonvolatile memory at the destination).
The combined teachings of Khayat and Gohain do not provide explicit detail as to when the suspend programming operation of Gohain Fig. 8 would be transmit to the destination device in relation to the two-step process disclosed in Khayat. Accordingly, Khayat and Gohain do not disclose the following limitations:
the transferring the suspend command comprises: transferring, by the memory controller, the suspend commands to the second nonvolatile memory devices after the first data are loaded to the second nonvolatile memory devices.
However, D’Eliseo clarifies a timing of suspend operations with respect to internal memory management. D’Eliseo discloses the following limitations:
the transferring the suspend command comprises: transferring, by the memory controller (Memory Controller 115, Fig. 1), the suspend commands to the second nonvolatile memory devices after the first data are loaded to the second nonvolatile memory devices. (“the garbage collection is suspended when: 1) A predetermined number of garbage collection writes has been collected and loaded (e.g., in a cache) and are ready to write to a new block … At the suspension, the buffer is flushed (e.g., pages are written to the new block)” [0033] // Fig. 1) – Examiner considers memory controller 115 depicted in D’Eliseo Fig. 1 as analogous to “the memory controller”. As taught in D’Eliseo, while performing “garbage collection writes” to “a new block” (i.e., analogous to folding first and second data to second and fourth nonvolatile devices), data is first loaded to a garbage collection buffer (i.e., analogous to the volatile memory buffer used during folding of Gohain ¶0047) until a threshold number of writes is reached; after which garbage collection is suspended (i.e., “transfer[ring] the suspend commands to the second nonvolatile memory devices” after loading a threshold amount of data to the buffer).
Khayat, Gohain, and D’Eliseo are all considered analogous to the claimed invention because they all relate to the same field of performing internal data movement operations within NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat and Gohain with the teachings of D’Eliseo and realize a storage device whereby program commands performed as part of a copyback operation are suspended at a destination after data are loaded to the destination. Doing so reduces host latencies while still allowing a storage device to keep up with garbage collection, as disclosed in D’Eliseo ¶0033: “By limiting the garbage collection in this manner, host latencies are reduced while the device is able to keep up with garbage collection (e.g., the garbage collection is able to complete).” [0033]
Claims 8 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Khayat further in view of Gohain and Tiwari et al. (US 20240160352 A1)(hereafter referred to as Tiwari).
Regarding Claim 8,
The same motivation to combine provided in Claim 2 is equally applicable to Claim 8. The combined teachings of Khayat and Gohain disclose the following limitations:
The storage device of claim 3 (see Claim 3 limitation mappings above),
The combined teachings of Khayat and Gohain are silent regarding the following limitations:
wherein the memory controller is further configured to restrict a buffer corresponding to a first size of the first data or a second size of the second data so as to be used in the copyback operation.
However, Tiwari discloses the following limitations:
wherein the memory controller (Memory System Controller 115, Fig. 1) is further configured to restrict a buffer (Volatile Memory Device 320, Fig. 3) corresponding to a first size of the first data or a second size of the second data (¶0069) so as to be used in the copyback operation. (“To support folding data from the non-volatile memory device 325 to the non-volatile memory device 335, the memory system may temporarily store data read from the non-volatile memory device 325 to a volatile memory device 320 (e.g., … a buffer …) … if each page of the non-volatile memory device stored 16 kilobytes (KB) of data … the portion of the volatile memory device 320 allocated for data transfers (e.g., 16 KB) … To support data accumulation and multi-stage programming in view of limited storage capacity of the volatile memory device 320, the memory system may transfer … data from the non-volatile memory device 325 to the volatile memory device 320, for example, until satisfying (e.g., reaching) the allocated storage capacity of the volatile memory device 320.” [0071]) – Examiner considers Memory System Controller 115 of Tiwari Fig. 1 as analogous to “the memory controller”. As taught in Tiwari, during folding operations between memory devices 325 and 335, a portion of volatile memory 320 is allocated to serve as a buffer for data. Data is accumulated into volatile memory 320 until an allocated storage capacity for the buffer is reached, which in certain examples corresponds to a page of non-volatile memory. As taught in Khayat ¶0078, folding operations can be performed at a granularity according to “source memory pages”. Accordingly, sizing a volatile memory buffer 320 used during folding to a page of data, when applied in an application such as Khayat where folding takes place according to a size of a source memory page, would amount to limiting the buffer used during folding to a size of a page of source data (i.e., “a first size of the first data or a second size of the second data”).
Khayat, Gohain, and Tiwari are considered analogous to the claimed invention because they all relate to the same field of scheduling folding operations within a storage environment comprising plural nonvolatile NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat and Gohain with the teachings of Tiwari and realize storage device whereby a buffer used during a copyback operation is restricted according to a size of source data. Using a volatile memory buffer during copyback as opposed to non-volatile SLC cells enables faster access operations, as disclosed in Tiwari ¶0068: “To support folding data from the non-volatile memory device 325 to the non-volatile memory device 335, the memory system 310 may temporarily store data read from the non-volatile memory device 325 to a volatile memory device 320 (e.g., an SRAM device, a DRAM device, a buffer, a cache, or the like), which may support relatively faster access operations (e.g., in comparison to a non-volatile memory device, such as a NAND device) … Accordingly, the memory system 310 may allocate a portion of the volatile memory device 320 to be available for data transfers.” [0068]
Regarding Claim 18,
The same motivation to combine provided in Claim 12 is equally applicable to Claim 18. The combined teachings of Khayat and Gohain disclose the following limitations:
The operating method of claim 13 (see Claim 13 limitation mappings above),
The combined teachings of Khayat and Gohain are silent regarding the following limitations:
wherein the memory controller restricts a buffer corresponding to a first size of the first data or a second size of the second data so as to be used in the copyback operation.
However, Tiwari discloses the following limitations:
wherein the memory controller (Memory System Controller 115, Fig. 1) restricts a buffer (Volatile Memory Device 320, Fig. 3) corresponding to a first size of the first data or a second size of the second data (¶0069) so as to be used in the copyback operation. (“To support folding data from the non-volatile memory device 325 to the non-volatile memory device 335, the memory system may temporarily store data read from the non-volatile memory device 325 to a volatile memory device 320 (e.g., … a buffer …) … if each page of the non-volatile memory device stored 16 kilobytes (KB) of data … the portion of the volatile memory device 320 allocated for data transfers (e.g., 16 KB) … To support data accumulation and multi-stage programming in view of limited storage capacity of the volatile memory device 320, the memory system may transfer … data from the non-volatile memory device 325 to the volatile memory device 320, for example, until satisfying (e.g., reaching) the allocated storage capacity of the volatile memory device 320.” [0071]) – Examiner considers Memory System Controller 115 of Tiwari Fig. 1 as analogous to “the memory controller”. As taught in Tiwari, during folding operations between memory devices 325 and 335, a portion of volatile memory 320 is allocated to serve as a buffer for data. Data is accumulated into volatile memory 320 until an allocated storage capacity for the buffer is reached, which in certain examples corresponds to a page of non-volatile memory. As taught in Khayat ¶0078, folding operations can be performed at a granularity according to “source memory pages”. Accordingly, sizing a volatile memory buffer 320 used during folding to a page of data, when applied in an application such as Khayat where folding takes place according to a size of a source memory page, would amount to limiting the buffer used during folding to a size of a page of source data (i.e., “a first size of the first data or a second size of the second data”).
Khayat, Gohain, and Tiwari are considered analogous to the claimed invention because they all relate to the same field of scheduling folding operations within a storage environment comprising plural nonvolatile NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat and Gohain with the teachings of Tiwari and realize storage device whereby a buffer used during a copyback operation is restricted according to a size of source data. Using a volatile memory buffer during copyback as opposed to non-volatile SLC cells enables faster access operations, as disclosed in Tiwari ¶0068: “To support folding data from the non-volatile memory device 325 to the non-volatile memory device 335, the memory system 310 may temporarily store data read from the non-volatile memory device 325 to a volatile memory device 320 (e.g., an SRAM device, a DRAM device, a buffer, a cache, or the like), which may support relatively faster access operations (e.g., in comparison to a non-volatile memory device, such as a NAND device) … Accordingly, the memory system 310 may allocate a portion of the volatile memory device 320 to be available for data transfers.” [0068]
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Khayat further in view of Gohain and Bhalerao et al. (US 20170115884 A1)(hereafter referred to as Bhalerao).
Regarding Claim 9,
The same motivation to combine provided in Claim 2 is equally applicable to Claim 9. The combined teachings of Khayat and Gohain disclose the following limitations:
The storage device of claim 3 (see Claim 3 limitation mappings above), wherein, based on the suspend commands (Khayat, “a program suspend protocol … can suspend performing the operations related to the copyback operation” [0103]) and the resume commands (Khayat, “the processing logic resumes the copyback operation initiated in operation 810” [0109]), the memory controller is further configured to … first program operations of the first data and second program operations of the second data. (Gohain, “The data may be transferred from the source data blocks 211 to the destination data blocks 212 according to the order 225 as part of respective single-die access operations” [0047]) – As previously discussed (see Claim 3 limitation mappings above) and as taught in Khayat, the suspend and resume commands suspend and resume programming of first and second data. As taught in Gohain, programming data into the destination blocks is performed using respective single-die access operations.
Although Gohain ¶0013 teaches that multi-die program operations involve interleaving of program commands, Gohain teaches that folding data to a destination is achieved using single-die program operations as opposed to multi-die program operations. Accordingly, Khayat and Gohain do not explicitly disclose the following limitations:
interleave first program operations of the first data and second program operations of the second data
However, Bhalerao teaches that folding data to a destination can be performed by interleaving program commands. Bhalerao discloses the following limitations:
interleave first program operations of the first data and second program operations of the second data (“FIG. 14 illustrates an example of copying data of four fold-sets from four SLC blocks … to an MLC block … Data may be copied in any suitable order. For example, copying of data of different fold-sets is interleaved so that writing is directed to a given word line of all sets of strings and then proceeds to the next word line.” [0084-85] // Fig. 14) – As taught in Bhalerao, folding data from SLC blocks into an MLC block is performed using interleaved writes to the destination.
Khayat, Gohain, and Bhalerao are considered analogous to the claimed invention because they all relate to the same field of scheduling folding operations within a storage environment comprising plural nonvolatile NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat and Gohain with the teachings of Bhalerao and realize a storage device whereby copyback operations are performed by interleaving program operations. Doing so enables efficient copying of data, as disclosed in Bhalerao ¶0085: “Data may be copied in any suitable order. In one example, copying of data of different fold-sets is interleaved so that writing is directed to a given word line of all sets of strings and then proceeds to the next word line … In this way, copying may be carried out efficiently without sending data outside the die or plane.” [0085].
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Khayat further in view of Natarajan et al. (US 20200105363 A1)(hereafter referred to as Natarajan).
Regarding Claim 10,
Khayat discloses the following limitations:
The storage device of claim 1, wherein the memory controller is further configured to perform the copyback operation (see Claim 1 limitation mappings above) as a portion of a garbage collection operation.
Khayat does not explicitly disclose performing copyback as part of garbage collection. Accordingly, Khayat does not disclose the following limitations:
perform the copyback operation as a portion of a garbage collection operation.
However, Natarajan discloses the following limitations:
perform the copyback operation as a portion of a garbage collection operation. (“A copyback operation may be useful for a variety of memory management techniques including, for example, garbage collection” [0001])
Khayat and Natarajan are considered analogous to the claimed invention because they all relate to the same field of performing internal copyback operations in NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat with the teachings of Natarajan and realize a memory device which performs a copyback operation as part of memory management techniques including garbage collection. Doing so is useful, as disclosed in Natarajan ¶0001: “A copyback operation may be useful for a variety of memory management techniques including, for example, garbage collection.” [0001]
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Khayat further in view of Gohain and Natarajan.
Regarding Claim 19,
Khayat discloses the following limitations:
A storage device (Fig. 1A) comprising:
a plurality of nonvolatile memory devices (Memory Device 130, Fig. 1A // “one or more non-volatile memory devices” [0032] // “Each of the memory devices 130 can include one or more arrays of memory cells … a particular memory device can include an SLC portion, and an MLC portion, a TLC portion, a QLC portion, or a PLC portion of memory cells” [0040]) – A memory sub-system includes one or more non-volatile memory devices 130.-; and
a memory controller (Memory Sub-System Controller 115, Fig. 1A) configured to control the plurality of nonvolatile memory devices (¶0042),
wherein the memory controller is configured to (¶¶0077; 0100, in a copyback operation (Figs. 6 + 8): -- A management component of controller 115 initiates the copyback operations depicted in Figs. 8 and 6.
…:
transfer (Fig. 8, step 810 // Fig. 6, step 670) first read commands (¶0086) to … nonvolatile memory devices (“a source block(s) in an SLC portion” [0079]) among the plurality of nonvolatile memory devices(“At operation 810, the processing logic can initiate a copyback operation”[0101] // “At operation 670, the processing logic sends, to the memory device, a corrective copyback command … In particular, the processing logic can performs a scan of the data by reading the data out of the memory device” [0086] // ¶¶0077-86 // ¶0020) -- During step 810, a copyback operation (e.g., a corrective copyback operation; see Fig. 6) is initiated. To perform corrective copyback, the controller reads source data from source memory blocks (i.e., “transfer[s] first read commands” which are located in an SLC portion of memory devices 130 (i.e., at least to “nonvolatile memory devices”)--,
transfer (Fig. 8, step 810 // Fig. 6, step 690) first program commands and first data (¶0089) read in response to the first read commands to second nonvolatile memory devices (“a destination block(s) in a QLC portion” [0079]) among the plurality of nonvolatile memory devices (“At operation 690, the processing logic sends the corrected data to the memory device to be programed to the destination block … The data can be programmed to the destination block using coarse-fine programming” [0089]) – As part of corrective copyback, corrected data read from the source blocks (i.e., “first data”) of the SLC portion of devices 130 is programmed into destination blocks of the QLC portion of devices 130 (i.e., “transfer[ring] first program commands” to the destination blocks; i.e., to nonvolatile devices 130). In the context of Fig. 1A, the memory devices 130 containing a QLC portion of memory correspond to “one or more second nonvolatile memory devices”--, and
transfer (Fig. 8, step 820) suspend commands associated with the first program commands to the second nonvolatile memory devices. (“while performing operations related to the copyback operation … the processing device receives a memory access command … At operation 820, the processing logic initiates a program suspend protocol … related to the copyback operation” [0102-103] // “a program suspend command” [0025]) – While performing the copyback operations, a read command is received. In step 820, a program suspend protocol is initiated with respect to the copyback operation. The program suspend protocol involves transferring a program suspend command to the non-volatile memory device to suspend a write operation which is currently being performed. One of ordinary skill in the art would understand that the write operation performed as part of copyback and thus which would be suspended would be the write operation of corrected data to the QLC portion of memory (e.g., step 690 of Fig. 6) because during copyback, data is read from a source and is written to a destination.,
Although Khayat ¶0020 discloses the non-volatile memory devices 130 can include both an SLC portion of memory cells and a QLC portion of memory cells, Khayat does not specify how SLC memory cells and QLC memory cells are distributed across the one or more memory devices 130. Thus, Khayat does not make clear whether a read command sent to a source SLC cell would necessarily be located on a memory device 130 which is distinct from a memory device including the destination QLC cell. Specifically, Khayat does not anticipate the following limitations:
transfer first read commands to first nonvolatile memory devices …
transfer first program commands and first data … to second nonvolatile memory devices
However, Gohain discloses within the context of performing copyback (e.g.., folding; see Khayat ¶0024) operations that data read from a first memory device is written into a second memory device. Gohain discloses the following limitations:
transfer first read commands to first nonvolatile memory devices (Memory Devices 130, Fig. 1 // Die 210-a, Fig. 2A)(“memory system 110 may support folding operations (e.g., data transfer operations) … For example, the memory system 110 may perform single-die access operations to program data to a set of source data blocks (e.g., blocks 170 … that spans the planes 165 of multiple dies 160 or memory devices 130) of the memory system 110 … the data transfer diagram 200 … illustrate folding data 215 between blocks of a memory system” [0035-36]) – Examiner considers Memory System 110 depicted in Gohain Fig. 1 as analogous to the memory sub-system 110 depicted in Khayat Fig. 1A. As taught in Gohain ¶0035 and show in Fig. 2A, a data folding (i.e., copyback) operation is performed from a set of source blocks to a set of destination blocks. The set of source blocks are located on distinct dies which span multiple memory devices 130.. As shown in Fig. 2A, the folding operation relocates certain data (i.e., data 215-b of source data block 211-a; i.e., “first data”; see time 202) from a first, source memory die (i.e., die 210-a; i.e., “first nonvolatile memory devices”) to a second, destination memory die (i.e., die 210-b; see time 203). Accordingly, in order to fold data 215-b, a read command corresponding to data 215-b would be transmit to die 210-a-- …
transfer first program commands and first data … to second nonvolatile memory devices (Memory Devices 130, Fig. 1 // Die 210-b, Fig. 2A) – As discussed above, data 215-b is relocated from source chip 205-a to a distinct destination die 210-b (i.e., “second nonvolatile memory devices”). Accordingly, in order to fold data 215-b, a write command corresponding to data 215-b would be transmit to die 210-b.
Khayat and Gohain are considered analogous to the claimed invention because they all relate to the same field of scheduling folding operations within a storage environment comprising plural nonvolatile NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat with the teachings of Gohain and realize a copyback operation whereby data is read from a first nonvolatile memory device and is copied back into a second nonvolatile memory device. Performing folding across distinct memory devices enables data which is programmed according to a single-die programming to be converted into a sequential, multi-die access format for read accesses, which enables parallel reading of data and improves performance by improving read speed and reducing volatile memory usage, as disclosed in Gohain ¶0035: “data may be programmed to the source data blocks in a first order according to the single-die access operation, and the data may be folded to the destination data blocks in a second order … The second order may be based on a third order associated with reading the data the data as part of a multi-die access operation. Reading the data in the third order according to the multi-die access operation may support parallel reading, such that the data may be sequentially read across the memory dies of the memory system at a relatively high speed and with relatively low volatile memory usage.” [0035]
The combined teachings of Khayat and Gohain additionally disclose the following limitations:
wherein the memory controller is further configured to, in the copyback operation (see limitation mappings above) … :
transfer second read commands to third nonvolatile memory devices (Gohain, Die 210-d, Fig. 2A) among the plurality of nonvolatile memory devices; and
transfer second program commands and second data read by the second read commands to fourth nonvolatile memory devices (Gohain, Die 210-c ,Fig. 2A) among the plurality of nonvolatile memory devices. (Gohain, Fig. 2A) – As shown in Gohain, the folding operation relocates second data (i.e., data 215-k from a second, source data block 211-d; see time 202) from a second, source memory die (i.e., Die 210-d; i.e., “third nonvolatile memory devices”) to a second, destination memory die (i.e., Die 210-c, see time 203; i.e., “fourth nonvolatile memory devices”). Accordingly, in order to fold data 215-k, a read command corresponding to data 215-k would be transmit to die 210-d and a write command corresponding to data 215-k would be transmit to die 210-c.
wherein the memory controller is further configured to, in the copyback operation …,
transfer (Khayat, Fig. 8, step 855) resume commands to the second nonvolatile memory devices after transferring the second data and the second program commands to the fourth nonvolatile memory devices. (Khayat, “Responsive to the processing logic determining that the shallow error-handling techniques corrected the errors in the data … the operation related to the read command can be completed by the processing logic, and the processing logic proceeds to operation 855 where the processing logic resumes the copyback operation initiated in operation 810.” [0109] // Fig. 8) – As taught in Khayat Fig. 8, a copyback operation is initiated (step 810), program operations are suspended (step 820), and copyback is resumed (step 855). As previously discussed (see limitation mappings above), the suspend program operation performed during step 810 suspends the writing of data performed during copyback. One of ordinary skill in the art would understand that a suspend program command would be sent to a destination memory device (e.g., a QLC block) after a program command is sent to the destination memory device because otherwise, there would be no pending program command to suspend using a suspend command. As shown in Khayat Fig. 8, the resume operation of step 855 takes place after the suspend operation of step 820. Accordingly, the resume operation of step 855 would take place after a program operation is transmit to a destination device as part of copyback (i.e., after transferring the first data and the first program commands to second nonvolatile memory devices AND after “transferring the second data and the second program commands to the fourth nonvolatile memory devices”).
Khayat does not explicitly disclose performing copyback as part of garbage collection. Accordingly, Khayat and Gohain do not disclose the following limitations:
a copyback operation belonging to a garbage collection operation
However, Natarajan discloses the following limitations:
a copyback operation belonging to a garbage collection operation. (“A copyback operation may be useful for a variety of memory management techniques including, for example, garbage collection” [0001])
Khayat, Gohain, and Natarajan are considered analogous to the claimed invention because they all relate to the same field of performing internal copyback operations in NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat and Gohain with the teachings of Natarajan and realize a memory device which performs a copyback operation as part of memory management techniques including garbage collection. Doing so is useful, as disclosed in Natarajan ¶0001: “A copyback operation may be useful for a variety of memory management techniques including, for example, garbage collection.” [0001]
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Khayat further in view of Gohain, Natarajan, and Bhalerao.
Regarding Claim 20,
The same motivation to combine provided in Claim 19 is equally applicable to Claim 20. The combined teachings of Khayat, Gohain, and Natarajan disclose the following limitations:
The storage device of claim 19 (see Claim 19 limitation mappings above), wherein the memory controller is further configured to, based on the suspend commands (Khayat, “a program suspend protocol … can suspend performing the operations related to the copyback operation” [0103]) and the resume commands (Khayat, “the processing logic resumes the copyback operation initiated in operation 810” [0109]), … first program operations of the first data and second program operations of the second data. (Gohain, “The data may be transferred from the source data blocks 211 to the destination data blocks 212 according to the order 225 as part of respective single-die access operations” [0047]) – As previously discussed (see Claim 3 limitation mappings above) and as taught in Khayat, the suspend and resume commands suspend and resume programming of first and second data. As taught in Gohain, programming data into the destination blocks is performed using respective single-die access operations.
Although Gohain ¶0013 teaches that multi-die program operations involve interleaving of program commands, Gohain teaches that folding data to a destination is achieved using single-die program operations as opposed to multi-die program operations. Accordingly, Khayat, Gohain, and Natarajan do not explicitly disclose the following limitations:
interleave first program operations of the first data and second program operations of the second data
However, Bhalerao teaches that folding data to a destination can be performed by interleaving program commands. Bhalerao discloses the following limitations:
interleave first program operations of the first data and second program operations of the second data (“FIG. 14 illustrates an example of copying data of four fold-sets from four SLC blocks … to an MLC block … Data may be copied in any suitable order. For example, copying of data of different fold-sets is interleaved so that writing is directed to a given word line of all sets of strings and then proceeds to the next word line.” [0084-85] // Fig. 14) – As taught in Bhalerao, folding data from SLC blocks into an MLC block is performed using interleaved writes to the destination.
Khayat, Gohain, Natarajan and Bhalerao are considered analogous to the claimed invention because they all relate to the same field of scheduling folding operations within a storage environment comprising plural nonvolatile NAND devices. Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Khayat, Gohain, and Natarajan with the teachings of Bhalerao and realize a storage device whereby copyback operations are performed by interleaving program operations. Doing so enables efficient copying of data, as disclosed in Bhalerao ¶0085: “Data may be copied in any suitable order. In one example, copying of data of different fold-sets is interleaved so that writing is directed to a given word line of all sets of strings and then proceeds to the next word line … In this way, copying may be carried out efficiently without sending data outside the die or plane.” [0085].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Yoo et al. (US 20150205540 A1) – Discloses a method of performing simultaneous copy-back operations in an interleaving manner (see Fig. 4 // ¶0052)
Siciliani (US 20220137856 A1) – Discloses a method of suspending a QLC program operation (see Fig. 4, steps 405 + 415)
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/J.S.M./Examiner, Art Unit 2133
/ROCIO DEL MAR PEREZ-VELEZ/Supervisory Patent Examiner, Art Unit 2133
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