Detailed Action
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-16 are pending in the application.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on August 29, 2026 is in compliance with the provisions of 37 CFR 1.97, and accordingly, the IDS has been considered by the examiner.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 9-16 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter.
Regarding claim 9, Applicant is seeking to patent a “network interface controller.” The controller, as claimed, does not comprise any structure. Applicant’s specification, on paragraph [0079], discloses that “components may be implemented in software that when included in an execution environment constitutes a machine, hardware, or a combination of software and hardware.” Therefore, the claimed controller could be directed to software aspects of the controller. An invention that covers a software embodiment is considered non-statutory subject matter as software does not meet one of the four categories of invention. It is suggested that Applicant amend the claim to recite functional hardware such as hardware processor and memory to overcome the rejection.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the claim comprises multiple uses of reference numbers enclosed with parentheses, e.g., (102), (104A-N). It is not clear whether Applicant intends the reference numbers as references to the figures or as limitations to further define the claim. Claims 5-6, 9-16 are rejected under a similar rationale as claim 1.
Furthermore, it is noted that reference characters generally do not affect the scope of the claim.
See MPEP 608.01(m) states, Reference characters corresponding to elements recited in the detailed description and the drawings may be used in conjunction with the recitation of the same element or group of elements in the claims. The reference characters, however, should be enclosed within parentheses so as to avoid confusion with other numbers or characters which may appear in the claims. Generally, the presence or absence of such reference characters does not affect the scope of a claim.
Regarding claim 1, the claim recites, "wherein each counter has a bit 0 configured as a write lock bit and one or more further bits configured as a read counter bits." It is not clear whether “each counter” is referring broadly to the “array of counters” or specifically to the “several bit counter for each atomic sector.”
Regarding claim 3, there is insufficient antecedent basis for “the counter value.” Claim 4 is rejected for the same reason as claim 3.
Regarding claim 9, the claim recites, "wherein each counter has a bit 0 configured as a write lock bit and one or more further bits configured as a read counter bits." It is not clear whether “each counter” is referring broadly to the “array of counters” or specifically to the “several bit counter for each atomic sector.”
Regarding claim 11, there is insufficient antecedent basis for “the counter value.” Claim 12 is rejected for the same reason as claim 3.
Allowable Subject Matter
Claims 1-16 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Bugge US Patent Publication No. 2013/0054726 discloses remote direct memory access operations comprising: defining a sector atomic region comprising a plurality of atomic sectors of a predefined size to which an RDMA network interface controller provides access to RDMA requests for atomic sectors (para. [0057] using the conditional RDMA write for the purpose of sector atomics. Sector atomics allows for multiple possible clients (e.g., requester systems) to update a memory sector while ensuring that only one client has access to the memory sector at any given time); in response to receiving an RDMA write request for an atomic sector from a client, the controller issuing an atomic compare and swap operation (para. [0056] conditional RDMA write is received. para. [0057] performing an RDMA conditional write based on the success of a compare-and-swap atomic operation)
Marcovitch et al. US Patent Publication No. 2025/0355822 discloses remote direct memory access operations comprising: creating an array of counters; in reply to receiving an RDMA request from a client, a controller handling the RDMA read request using a counter; and in reply to receiving an RDMA write request from a client, handling the RDMA write request (para. [0018] send an RDMA WRITE request with the data to a target network controller. new transaction can be an ATOMIC RDMA operation (e.g., an ATOMIC Fetch and Add) that increments a counter in the target memory device. para. [0030] counting-WRITE operation can initialize a counter 166 that counts arrival of memory units at target memory 160. initializing counter 166 may include starting a new counter, setting the value stored in the new or existing counter to zero (or any other suitable value). para. [0098] counting-READ unified operation, unified network READ response 1050 can identify an address for a counter to be incremented on requestor device).
The prior art of record does not teach, individually or in combination, the invention as claimed including: defining a sector atomic memory region comprising a plurality of atomic sectors of a predefined size to which an RDMA network interface controller, RNIC (100, 202), provides access only to RDMA requests for atomic sectors that are sector size aligned and span one or more of the sectors, creating an array of counters comprising a several bit counter for each atomic sector in the sector atomic memory region, wherein each counter has a bit 0 configured as a write lock bit and one or more further bits configured as read counter bits to be indicative of ongoing operations with the associated atomic sector, in reply to receiving an RDMA read request for an atomic sector from a client, the RNIC handling the RDMA read request using a counter of said atomic sector, and in reply to receiving an RDMA write request for an atomic sector from a client, the RNIC issuing an atomic compare and swap operation to modify a value of a counter of said atomic sector from 0 to 1 and handling the RDMA write request based on a result of the atomic compare and swap operation.
Conclusion
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/JOSHUA JOO/Primary Examiner, Art Unit 2445
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