DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I in the reply filed on 7/4/2026 is acknowledged.
The restriction requirement between Species A and B, as set forth in the Office action mailed on 5/06/2026, has been reconsidered in view of the prior art and is hereby withdrawn because the claims directed to both species require all limitations of claim 2 which is currently indicated as allowable subject matter. However, the restriction requirement between Invention I and II is maintained.
Once a restriction requirement is withdrawn, the provisions of 35 U.S.C. 121 are no longer applicable. See In re Ziegler, 443 F.2d 1211, 1215, 170 USPQ 129, 131-32 (CCPA 1971). See also MPEP § 804.01.
Currently, claims 1-20 are pending, but claims 15-20 are withdrawn from consideration and claims 1-14 are examined as follows.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “Display device with gate control signal supplied to data driving circuit for display of same image”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Tanaka et al. in US 2024/0355287 (hereinafter Tanaka) in view of Konishi et al. in US 2017/0295343 (hereinafter Konishi).
Tanaka disclose a display device (Tanaka’s par. 1), comprising:
a display area (Tanaka’s Fig. 8 and par. 98: display portion 11) in which an image is displayed (Tanaka’s par. 97) and a plurality of subpixels are disposed (Tanaka’s Fig. 6 and par. 97: see Pix); a non-display area located around an outer edge of the display area (Tanaka’s Fig. 6: area outside 11); a data driving circuit disposed in the non-display area (Tanaka’s Fig. 6 and par. 98: see 30) and configured to supply data voltages to the plurality of subpixels (Tanaka’s Fig. 6 and par. 102, 104: data signals); a gate driving circuit disposed in the non-display area (Tanaka’s Fig. 6 and par. 98: see 40) and configured to supply at least one gate signal to the plurality of subpixels (Tanaka’s Fig. 6 and par. 103-104); and a controller (Tanaka’s Fig. 6 and par. 101: see 20) configured to control the data driving circuit and the gate driving circuit (Tanaka’s Fig. 6 and par. 101), wherein, while image data is not supplied to the data signal lines (Tanaka’s Fig. 8 and par. 110: during pause driving mode for still image, the data signals lines driving is stopped during periods Tnrf), at least one gate control signal (Tanaka’s par. 111: operation mode control signal Sm which is part of the scanning-side control signals Scs) supplied from the controller to the gate driving circuit (Tanaka’s Fig. 8 and par. 111: Sm is part of Scs sent from 20 to 40) is supplied to the data driving circuit (Tanaka’s Fig. 8 and par. 111: Sm is also sent as part of Scd to the driver 30), and a same image is displayed in the display area (Tanaka’s Fig. 8 and par. 110-111: image data from immediately preceding drive period [same image] displayed during the pause period).
Tanaka fails to disclose image data is not supplied from the controller to the data driving circuit.
However, Konishi disclose that when still image is detected, the transmission data from the controller to the data driver does not include image data (Konishi’s Figs. 4, 7 and par. 77: see Transmission Data Tcon-SD during Still image region, which includes Stop Transmission).
Therefore, it would have been obvious to one of ordinary skill in the art, that Tanaka’s device stops supply of image data from the controller to the data driving circuit during still image (as taught by Konishi), in order to obtain the benefit of reducing power consumption of the display panel (Konishi’s par. 77).
By doing such combination, Tanaka in view of Konishi disclose:
A display device (Tanaka’s par. 1), comprising:
a display area (Tanaka’s Fig. 8 and par. 98: display portion 11) in which an image is displayed (Tanaka’s par. 97) and a plurality of subpixels are disposed (Tanaka’s Fig. 6 and par. 97: see Pix);
a non-display area located around an outer edge of the display area (Tanaka’s Fig. 6: area outside 11);
a data driving circuit disposed in the non-display area (Tanaka’s Fig. 6 and par. 98: see 30) and configured to supply data voltages to the plurality of subpixels (Tanaka’s Fig. 6 and par. 102, 104: data signals);
a gate driving circuit disposed in the non-display area (Tanaka’s Fig. 6 and par. 98: see 40) and configured to supply at least one gate signal to the plurality of subpixels (Tanaka’s Fig. 6 and par. 103-104); and
a controller (Tanaka’s Fig. 6 and par. 101: see 20) configured to control the data driving circuit and the gate driving circuit (Tanaka’s Fig. 6 and par. 101),
wherein, while image data is not supplied from the controller to the data driving circuit (Tanaka’s Fig. 6 and par. 110: during pause driving mode for still image, the control circuit 20 does not transmit data to the data driver 30 upon combination with Konishi’s Fig. 4 and par. 77), at least one gate control signal (Tanaka’s par. 111: operation mode control signal Sm which is part of the scanning-side control signals Scs) supplied from the controller to the gate driving circuit (Tanaka’s Fig. 8 and par. 111: Sm is part of Scs sent from 20 to 40) is supplied to the data driving circuit (Tanaka’s Fig. 8 and par. 111: Sm is also sent as part of Scd to the driver 30), and a same image is displayed in the display area (Tanaka’s Fig. 8 and par. 110-111: image data from immediately preceding drive period [same image] displayed during the pause period).
Allowable Subject Matter
Claims 2-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2, the prior art fails to disclose ALL limitations of claim 1 in addition to “wherein the data driving circuit comprises: a logic circuit configured to receive the at least one gate control signal and output at least one selection signal; and a selection circuit driven based on the at least one selection signal”.
Dependent claims 3-14 are indicated as allowable for at least the same reason.
The closest prior art to Tanaka fails to disclose the limitations described in claim 2.
Lin et al. in US 2022/0036827 disclose logic that stops supply to the source driver during a power saving mode (Fig. 6A), but fails to disclose the gate control signal as described in claim 1, and the logic is not part of the data driving circuit as necessary for claim 2.
Nor does any other prior art disclose all features of claims 1+2.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wu et al. in US 2024/0233631 (Fig. 5) disclose a display controller that supplies the same control signal to source and gate drivers and Park et al. in US 2021/0027707 (Fig. 9) that stops supply of data during some display periods.
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/LILIANA CERULLO/ Primary Examiner, Art Unit 2621
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