Prosecution Insights
Last updated: October 21, 2026
Application No. 19/282,719

NEGATIVE VOLTAGE GENERATOR WITH P-TYPE FLY CAPACITOR

Non-Final OA §102§103
Filed
Jul 28, 2025
Priority
Jul 18, 2022 — provisional 63/368,733 +3 more
Examiner
SKIBINSKI, TOMI SWEET
Art Unit
2836
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Skyworks Solutions Inc.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
750 granted / 894 resolved
+15.9% vs TC avg
Minimal +3% lift
Without
With
+3.4%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 9m
Avg Prosecution
9 currently pending
Career history
904
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
53.3%
+13.3% vs TC avg
§102
26.7%
-13.3% vs TC avg
§112
17.4%
-22.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 894 resolved cases

Office Action

§102 §103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 11, 17, and 19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cassia (US PGPUB 2011/0018619). Regarding claim 1, Figure 7A of Cassia discloses a negative voltage generator comprising: a first set of switches arranged between a supply voltage and a ground, the first set of switches including a first N-type switch and a first P-type switch [512 and 514] a second set of switches arranged between the ground and an output node, the second set of switches including a second N-type switch and a second P-type switch [516 and 518] a P-type fly capacitor connected to the first set of switches and the second set of switches [522], the second N-type switch being connected between the P-type fly capacitor and the output node [518], and the negative voltage generator configured to output a negative voltage [Vneg] Regarding claim 2, Figure 7A of Cassia discloses wherein a negative terminal of the P-type fly capacitor is connected to a node between the second N-type switch and second P-type switch [522; 0V]. Regarding claim 3, Figure 7A of Cassia discloses wherein a positive terminal of the P-type fly capacitor is connected to a node between the first N-type switch and first P-type switch [522; Vref]. Regarding claim 4, Figure 7A of Cassia discloses wherein the first N-type switch is connected between the ground and an intermediate node [514], the first P-type switch is connected between the intermediate node and a power supply voltage [512], and the first set of switches is connected to the P-type fly capacitor at the intermediate node [522]. Regarding claim 11, Figure 7A of Cassia discloses a radio frequency system [900 Figure 9] comprising: a negative voltage generator [912 Figure 9] including a first set of switches [512 and 514], a second set of switches [516 and 518], and a P-type fly capacitor connected to the first set of switches and the second set of switches [522], an N-type switch of the second set of switches being connected between the P-type fly capacitor and an output node of the negative voltage generator [518] and the negative voltage generator configured to output a negative voltage at the output node [Vneg] a switch driver configured to receive the negative voltage from the negative voltage generator and to output a control signal [916 Figure 9; paragraph 42] a radio frequency switch configured to toggle state based on the control signal, the radio frequency switch configured to pass a radio frequency signal [paragraph 42] Regarding claim 17, Figure 7A of Cassia discloses a plurality of additional radio frequency switches configured to receive control signals from the switch driver [paragraph 42]. Regarding claim 19, Figure 7A of Cassia discloses a method of controlling a radio frequency switch [paragraph 42], the method comprising: generating a negative voltage using a negative voltage charge pump [912 Figure 9], the negative voltage charge pump including a first set of switches arranged between a supply voltage and a ground [512 and 514], a second set of switches arranged between the ground and an output node [516 and 518], and a P-type fly capacitor connected to the first set of switches and the second set of switches [522], an N-type switch of the second set of switches being connected between the P- type fly capacitor and the output node [518] driving a radio frequency switch with a control signal that is based on the negative voltage to toggle a state of the radio frequency switch [paragraph 42] Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 5, 6, 12, 14-16, 18, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cassia (US PGPUB 2011/0018619). Regarding claim 5, Cassia does not explicitly disclose wherein the P-type fly capacitor includes a P-type field effect transistor having a source connected to a drain. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the circuit of Cassia by using a capacitor connected P-type field effect transistor as a matter of simple design-choice, since it was well-known in the art to use a capacitor connected transistor (i.e. source connected to drain) as a capacitor in integrated circuits and RF applications. Regarding claim 6, Figure 7A of Cassia, as applied to claim 5, discloses wherein the P-type field effect transistor has a gate connected to the second set of switches, and the source and the drain are connected to the first set of switches [522]. Regarding claim 12, Cassia does not explicitly disclose wherein the P-type fly capacitor includes a P-type field effect transistor having a gate connected to the second set of switches, and the P-type field effect transistor has a source and a drain connected to each other and to the first set of switches. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the circuit of Cassia by using a capacitor connected P-type field effect transistor as a matter of simple design-choice, since it was well-known in the art to use a capacitor connected transistor (i.e. source connected to drain) as a capacitor in integrated circuits and RF applications. Regarding claim 14, Cassia does not explicitly disclose wherein the radio frequency switch is included in a signal path between a power amplifier and a filter. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the circuit of Cassia by controlling an RF switch included between a power amplifier and a filter as a matter of simple design-choice, since it was well-known in the art to use RF switches in various signals paths in RF systems, and it appears that the negative voltage generator of Cassia and the instant application would perform equally well controlling an RF switch regardless of its location in an RF signal path. Regarding claim 15, Cassia does not explicitly disclose wherein the radio frequency switch is included in a signal path between a low noise amplifier and a filter. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the circuit of Cassia by controlling an RF switch included between a low noise amplifier and a filter as a matter of simple design-choice, since it was well-known in the art to use RF switches in various signals paths in RF systems, and it appears that the negative voltage generator of Cassia and the instant application would perform equally well controlling an RF switch regardless of its location in an RF signal path. Regarding claim 16, Cassia does not explicitly disclose wherein the radio frequency switch is included in a signal path between filter and an antenna port. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the circuit of Cassia by controlling an RF switch included between a filter and an antenna port as a matter of simple design-choice, since it was well-known in the art to use RF switches in various signals paths in RF systems, and it appears that the negative voltage generator of Cassia and the instant application would perform equally well controlling an RF switch regardless of its location in an RF signal path. Regarding claim 18, Cassia does not explicitly disclose wherein the radio frequency switch includes a silicon-on-insulator transistor. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the circuit of Cassia by using an SOI transistor as the RF switch as a matter of simple design-choice, since it was well-known in the art to use SOI transistors as RF switches. Regarding claim 20, Cassia does not explicitly disclose wherein the P-type fly capacitor includes a P-type field effect transistor, the P-type field effect transistor having a gate connected to the second set of switches, and the P-type field effect transistor having a source and a drain connected to each other and the first set of switches. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Cassia by using a capacitor connected P-type field effect transistor as a matter of simple design-choice, since it was well-known in the art to use a capacitor connected transistor (i.e. source connected to drain) as a capacitor in integrated circuits and RF applications. Allowable Subject Matter Claims 7-10 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tomi S Skibinski whose telephone number is (571)270-7581. The examiner can normally be reached Mon. - Thurs. 8am - 6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Regis Betsch can be reached at (571)270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TOMI SKIBINSKI/Primary Examiner, Art Unit 2836
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Prosecution Timeline

Jul 28, 2025
Application Filed
Oct 15, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
87%
With Interview (+3.4%)
1y 9m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 894 resolved cases by this examiner. Grant probability derived from career allowance rate.

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