DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 6 objected to because of the following informalities: claim 6 recites the phrase, “the subunit,” which refers back to the previously stated, “a sub-unit”. The Applicant is reminded that if the initial “sub-unit” phrase is to be hyphenated, it should remain the same throughout the claims. Appropriate correction is required.
Claim 7 objected to because of the following informalities: claim 7 recites the phrase, “the forward based diode,” (emphasis added) which appears to be a typo. The Examiner will read and interpret said phrase as “the forward biased diode” (emphasis added). Appropriate correction is required.
Claim 15 objected to because of the following informalities: claim 15 recites the phrase, “the plurality of capacitors,” which lacks proper antecedent basis. For the sake of expediting prosecution, the Examiner will interpret said plurality of capacitors as referring back to the “at least one capacitor” as presented within claim 13. Appropriate correction is required.
Claim 19 objected to because of the following informalities: claim 19 recites the phrase, “the free standing membrane,” which refers back to the previously stated, “a free-standing membrane”. The Applicant is reminded that if the initial “free-standing” phrase is to be hyphenated, it should remain the same throughout the claims. Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-16 of U.S. Patent No. 11,705,756. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the patent application are clearly anticipated by the claims of Patent Number 11,705,756, as Patent Number 11,705,756 fully encompasses the claims of the patent application (Noted: claim 1 of Patent Number 11,705,756 fully encompasses claims 1, and 4-6 of the instant application and claim 10 of Patent Number 11,705,756 fully encompasses claims 13 and 15 of the instant application).
Instant Application
Patent Number 11,705,756
1. An energy harvesting system, comprising: a DC voltage source connected to at least one capacitor that generates an AC noise signal; a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; and respective diodes rectifying the first power signal to charge a positive cycle storage capacitor and a negative cycle storage capacitor with the first AC power signal.
1. An energy harvesting system, comprising: a DC voltage source connected to at least one capacitor that generates an AC noise signal; a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; a plurality of repeated sub-units comprising respective pairs of a forward biased diode and a reverse biased diode, wherein the repeated sub-units receive the first AC power signal; respective positive cycle metal trace connections connected to each forward biased diode; respective negative cycle metal trace connections connected to each reverse biased diode; a positive cycle storage capacitor connected to each forward biased diode with the respective positive cycle metal trace connections; a negative cycle storage capacitor connected to each reverse biased diode with the respective negative cycle metal trace connections; and wherein the sub-units are repeated with the respective positive cycle metal trace connections connected to the positive cycle storage capacitor and respective negative cycle metal trace connections connected to the negative cycle storage capacitor to rectify the first AC power signal and charge the positive cycle storage capacitor and the negative cycle storage capacitor.
2. The system of claim 1, wherein the AC noise signal is a thermal noise signal and the at least one capacitor is a plurality of capacitors connected in series.
2. The system of claim 1, wherein the AC noise signal is a thermal noise signal and the at least one capacitor is a plurality of capacitors connected in series.
3. The system of claim 1, wherein the capacitor is configured with storage capacity of 1 pico-Farad.
3. The system of claim 1, wherein the capacitor is configured with storage capacity of 1 pico-Farad.
4. The system of claim 1, further comprising the first AC power signal rectified through a forward biased diode during a positive cycle of the first AC power signal to produce an output power signal.
1. An energy harvesting system, comprising: a DC voltage source connected to at least one capacitor that generates an AC noise signal; a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; a plurality of repeated sub-units comprising respective pairs of a forward biased diode and a reverse biased diode, wherein the repeated sub-units receive the first AC power signal; respective positive cycle metal trace connections connected to each forward biased diode; respective negative cycle metal trace connections connected to each reverse biased diode; a positive cycle storage capacitor connected to each forward biased diode with the respective positive cycle metal trace connections; a negative cycle storage capacitor connected to each reverse biased diode with the respective negative cycle metal trace connections; and wherein the sub-units are repeated with the respective positive cycle metal trace connections connected to the positive cycle storage capacitor and respective negative cycle metal trace connections connected to the negative cycle storage capacitor to rectify the first AC power signal and charge the positive cycle storage capacitor and the negative cycle storage capacitor.
5. The system of claim 4, further comprising the first AC power signal rectified through a reverse biased diode during a negative cycle of the first AC power signal to produce an output power signal.
1. An energy harvesting system, comprising: a DC voltage source connected to at least one capacitor that generates an AC noise signal; a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; a plurality of repeated sub-units comprising respective pairs of a forward biased diode and a reverse biased diode, wherein the repeated sub-units receive the first AC power signal; respective positive cycle metal trace connections connected to each forward biased diode; respective negative cycle metal trace connections connected to each reverse biased diode; a positive cycle storage capacitor connected to each forward biased diode with the respective positive cycle metal trace connections; a negative cycle storage capacitor connected to each reverse biased diode with the respective negative cycle metal trace connections; and wherein the sub-units are repeated with the respective positive cycle metal trace connections connected to the positive cycle storage capacitor and respective negative cycle metal trace connections connected to the negative cycle storage capacitor to rectify the first AC power signal and charge the positive cycle storage capacitor and the negative cycle storage capacitor.
6. The system of claim 5, wherein the diodes are paired as a sub-unit and the subunit is connected to a positive cycle metal trace connection and a negative cycle metal trace connection, and the sub-units are repeated with respective connections to the positive cycle metal trace connection and the negative cycle metal trace connection.
1. An energy harvesting system, comprising: a DC voltage source connected to at least one capacitor that generates an AC noise signal; a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; a plurality of repeated sub-units comprising respective pairs of a forward biased diode and a reverse biased diode, wherein the repeated sub-units receive the first AC power signal; respective positive cycle metal trace connections connected to each forward biased diode; respective negative cycle metal trace connections connected to each reverse biased diode; a positive cycle storage capacitor connected to each forward biased diode with the respective positive cycle metal trace connections; a negative cycle storage capacitor connected to each reverse biased diode with the respective negative cycle metal trace connections; and wherein the sub-units are repeated with the respective positive cycle metal trace connections connected to the positive cycle storage capacitor and respective negative cycle metal trace connections connected to the negative cycle storage capacitor to rectify the first AC power signal and charge the positive cycle storage capacitor and the negative cycle storage capacitor.
7. The system of claim 5, wherein the forward based diode and the reversed biased diode are connected to additional diodes in a Cockcroft-Walton full-wave rectifier and multiplier circuit.
4. The system of claim 1, wherein the forward biased diodes and the reversed biased diodes are connected to additional diodes in a Cockcroft-Walton full-wave rectifier and multiplier circuits.
8. The system of claim 1, wherein the plurality of capacitors comprises variable gap capacitors generating both the first AC power signal from the AC noise signal and a second AC power signal from a variable gap capacitor discharge cycle.
5. The system of claim 1, wherein the plurality of capacitors comprises variable gap capacitors generating both the first AC power signal from the AC noise signal and a second AC power signal from a variable gap capacitor discharge cycle.
9. The system of claim 1, wherein the capacitor is fully charged by the DC voltage source to a stable state.
6. The system of claim 1, wherein the capacitor is fully charged by the DC voltage source to a stable state.
10. The system of claim 1, wherein the diodes are selected based on the rate of conductance to match the capacitor as a noise source.
7. The system of claim 1, wherein the diodes are selected based on the rate of conductance to match the capacitor as a noise source.
11. The system of claim 1, wherein the AC noise signal comprises conductivity due to conductive carrier defect hopping through the capacitor.
8. The system of claim 1, wherein the AC noise signal comprises conductivity due to conductive carrier defect hopping through the capacitor.
12. The system of claim 1, wherein the DC voltage source provides a voltage that corresponds to turn on voltages for the diodes.
9. The system of claim 1, wherein the DC voltage source provides a voltage that corresponds to turn on voltages for the diodes.
13. An integrated circuit on a chip, the circuit comprising: at least one capacitor connected to the circuit to generate an AC noise signal; a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; respective rectifiers receiving a positive cycle of the first AC power signal and a negative cycle of the first AC power signal; output terminals connected to the respective rectifiers and configured for connection to an off chip circuit.
10. An integrated circuit on a chip, the circuit comprising: at least one capacitor connected to the circuit to generate an AC noise signal; a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; a plurality of repeated sub-units comprising respective pairs of a forward biased diode and a reverse biased diode, wherein the repeated sub-units receive the first AC power signal; respective positive cycle metal trace connections connected to each forward biased diode; respective negative cycle metal trace connections connected to each reverse biased diode; output terminals connected to the respective sub-units and configured for connection to an off chip circuit, wherein the off chip circuit comprises a DC voltage source connected to the at least one capacitor, a positive cycle storage capacitor and negative cycle storage capacitor charged with the first AC power signal, and wherein the sub-units are repeated with the respective positive cycle metal trace connections connected to the positive cycle storage capacitor and respective negative cycle metal trace connections connected to the negative cycle storage capacitor to rectify the first AC power signal and charge the positive cycle storage capacitor and the negative cycle storage capacitor.
14. The integrated circuit of claim 13, wherein the AC noise signal results from ambient thermal energy.
11. The integrated circuit of claim 10, wherein the AC noise signal results from ambient thermal energy.
15. The integrated circuit of claim 13, configured to connect to the off chip circuit that comprises a DC voltage source connected to the plurality of capacitors, a positive cycle storage capacitor and negative cycle storage capacitor charged with the first AC power signal.
10. An integrated circuit on a chip, the circuit comprising: at least one capacitor connected to the circuit to generate an AC noise signal; a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; a plurality of repeated sub-units comprising respective pairs of a forward biased diode and a reverse biased diode, wherein the repeated sub-units receive the first AC power signal; respective positive cycle metal trace connections connected to each forward biased diode; respective negative cycle metal trace connections connected to each reverse biased diode; output terminals connected to the respective sub-units and configured for connection to an off chip circuit, wherein the off chip circuit comprises a DC voltage source connected to the at least one capacitor, a positive cycle storage capacitor and negative cycle storage capacitor charged with the first AC power signal, and wherein the sub-units are repeated with the respective positive cycle metal trace connections connected to the positive cycle storage capacitor and respective negative cycle metal trace connections connected to the negative cycle storage capacitor to rectify the first AC power signal and charge the positive cycle storage capacitor and the negative cycle storage capacitor.
16. The integrated circuit of claim 13, further comprising a first diode configured as a first respective rectifier of the first AC power signal to produce a first output power signal from a positive cycle of the first AC power signal.
12. The integrated circuit of claim 10, wherein the forward biased diode is a first diode configured as a first respective rectifier of the first AC power signal to produce a first output power signal from a positive cycle of the first AC power signal.
17. The integrated circuit of claim 16, further comprising a second diode configured as a second respective rectifier of the first AC power signal to produce a second output power signal from a negative cycle of the first AC power signal.
13. The integrated circuit of claim 12, wherein the reverse biased diode is a second diode configured as a second respective rectifier of the first AC power signal to produce a second output power signal from a negative cycle of the first AC power signal.
18. An integrated circuit, comprising: at least one capacitor generating an AC noise signal; a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; respectively forward biased and reversed biased transistors rectifying corresponding positive and negative cycles of the AC noise signal; output terminals connected to the transistors and configured for connection to an off chip circuit for energy harvesting from output signals.
14. An integrated circuit, comprising: at least one capacitor generating an AC noise signal; a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; a plurality of repeated sub-units comprising respective pairs of a forward biased transistor and a reverse biased transistor, wherein the repeated sub-units receive the first AC power signal; respective positive cycle metal trace connections connected to each forward biased transistor; respective negative cycle metal trace connections connected to each reverse biased transistor; output terminals connected to the respective sub-units and configured for connection to an off chip circuit, wherein the off chip circuit comprises a DC voltage source connected to the at least one capacitor, a positive cycle storage capacitor and negative cycle storage capacitor charged with the first AC power signal, and wherein the sub-units are repeated with respective positive cycle metal trace connections connected to the positive cycle storage capacitor and respective negative cycle metal trace connections connected to the negative cycle storage capacitor to rectify the first AC power signal and charge the positive cycle storage capacitor and the negative cycle storage capacitor.
19. A method of assembling an energy harvesting circuit, comprising: connecting at least one capacitor within the energy harvesting circuit; forming a capacitive region in the energy harvesting circuit by defining the at least one capacitor with a first capacitor plate having an initial separation distance with respect to a first surface of a free-standing membrane, wherein the first surface of the free-standing membrane defines a second capacitor plate; exposing the free standing membrane to ambient thermal energy to induce charge accumulation in the capacitive region, the ambient thermal energy also inducing a thermal AC noise signal; selecting the capacitance of the capacitor to select a bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; and rectifying the first AC power signal to charge a positive cycle storage capacitor and a negative cycle storage capacitor with the first AC power signal.
15. A method of assembling an energy harvesting circuit, comprising: connecting at least one capacitor within the energy harvesting circuit; forming a capacitive region in the energy harvesting circuit by defining the at least one capacitor with a first capacitor plate having an initial separation distance with respect to a first surface of a free-standing membrane, wherein the first surface of the free-standing membrane defines a second capacitor plate; exposing the free-standing membrane to ambient thermal energy to induce charge accumulation in the capacitive region, the ambient thermal energy also inducing a thermal AC noise signal; selecting the capacitance of the capacitor to select a bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal; and rectifying the first AC power signal to charge a positive cycle storage capacitor and a negative cycle storage capacitor with the first AC power signal, wherein the rectifying comprises transmitting the first AC power signal to a plurality of repeated sub-units comprising: respective pairs of a forward biased diode and a reverse biased diode; respective positive cycle metal trace connections connected to each forward biased diode; respective negative cycle metal trace connections connected to each reverse biased diode; a positive cycle storage capacitor connected to each forward biased diode with the respective positive cycle metal trace connections; a negative cycle storage capacitor connected to each reverse biased diode with the respective negative cycle metal trace connections; and wherein the sub-units are repeated with respective positive cycle metal trace connections connected to the positive cycle storage capacitor and respective negative cycle metal trace connections connected to the negative cycle storage capacitor to rectify the first AC power signal and charge the positive cycle storage capacitor and the negative cycle storage capacitor.
20. The method of claim 19, further comprising, positioning the membrane relative to the first capacitor plate such that the membrane is unobstructed and free to vibrate in response to ambient thermal energy, wherein vibration of the membrane defines cyclical ripple formations along the first surface, and wherein each ripple formation alternates between a peak and a trough relative to the first capacitor plate to change the initial separation distance in a variable gap capacitor.
16. The method of claim 15, further comprising, positioning the membrane relative to the first capacitor plate such that the membrane is unobstructed and free to vibrate in response to ambient thermal energy, wherein vibration of the membrane defines cyclical ripple formations along the first surface, and wherein each ripple formation alternates between a peak and a trough relative to the first capacitor plate to change the initial separation distance in a variable gap capacitor.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 8-10, and 12-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Thibado (U.S. Patent Publication Number 2019/0386584) in view of Lathom et al. (U.S. Patent Number 4,808,886).
Regarding Claim 1:
Thibado discloses an energy harvesting system, comprising: a DC voltage source connected to at least one capacitor that generates an AC noise signal (Fig. 3A, variable capacitor 120 attached to battery 105, and their related discussion; see, for example, paragraph 0119); a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal (Fig. 3A, membrane 265, capacitor 120, and their related discussion; see, for example paragraphs 0108 and 0111 which disclose the capacitor is electrically coupled to the membrane which is configured to convert vibrational energy into an alternating electrical current, thereby harvesting energy from the membrane). While Thibado discloses the utilization of diodes, see for example Fig.’s 4A-4C, Thibado fails to teach respective diodes rectifying the first power signal to charge a positive cycle storage capacitor and a negative cycle storage capacitor with the first AC power signal.
However, Lathom et al., which is similarly directed towards current and voltage control within an AC system, discloses respective diodes rectifying the first power signal to charge a positive cycle storage capacitor and a negative cycle storage capacitor with the first AC power signal (Fig. 5, circuit 200 including positive rectifying means in the form of diode D30 and a negative rectifying means in the form of diode D31, capacitor C21 and C22 as positive cycle storage capacitor(s), as well as C23 and C24 as negative cycle storage capacitor(s), and their related discussion; see, for example, Col. 13, line 18- Col. 14, line 2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Thibado to include diodes for rectifying the power signal, as taught within Lathom, so as to provide a way in which the harvesting system will be capable of utilizing both a positive and negative cycle of the alternating current for both charging and discharging (Abstract).
Regarding Claim 2:
Modified Thibado teaches the limitations of the preceding claim 1. Modified Thibado, in further view of Thibado, discloses wherein the AC noise signal is a thermal noise signal (Fig. 3A, membrane 265, capacitor 120, and their related discussion; see, for example, paragraphs 0010, 0120, 0233, etc. which disclose the membrane and capacitor derives the external force from the thermally induced motion of atoms in the freestanding graphene.). While Modified Thibado fails to explicitly teach the at least one capacitor is a plurality of capacitors connected in series, it would have been obvious to one of ordinary skill in the art to incorporate a plurality of capacitors comprising the at least one capacitor since it has been held that mere duplication of essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8.
Regarding Claim 3:
Modified Thibado teaches the limitations of the preceding claim 1. Modified Thibado, in further view of Thibado, discloses wherein the capacitor is configured with storage capacity of 1 pico-Farad (see, for example, paragraph 0229 which discloses the capacitor has a minimum capacitance of about 0.001 femto-farad to a maximum capacitance of about 1000 femto-farad).
Regarding Claim 4:
Modified Thibado teaches the limitations of the preceding claim 1. Modified Thibado, in further view of Lathom, discloses comprising the first AC power signal rectified through a forward biased diode during a positive cycle of the first AC power signal to produce an output power signal (Fig. 5, circuit 200 including positive rectifying means in the form of diode D30 and capacitor C21 and C22 as positive cycle storage capacitor(s), and their related discussion; see, for example, Col. 13, line 18- Col. 14, line 2).
Regarding Claim 5:
Modified Thibado teaches the limitations of the preceding claim 4. Modified Thibado, in further view of Lathom, discloses comprising the first AC power signal rectified through a reverse biased diode during a negative cycle of the first AC power signal to produce an output power signal (Fig. 5, circuit 200 including negative rectifying means in the form of diode D31, capacitor C23 and C24 as negative cycle storage capacitor(s), and their related discussion; see, for example, Col. 13, line 18- Col. 14, line 2).
Regarding Claim 8:
Modified Thibado teaches the limitations of the preceding claim 1. Modified Thibado, in further view of Thibado, discloses wherein the plurality of capacitors comprises variable gap capacitors generating both the first AC power signal from the AC noise signal and a second AC power signal from a variable gap capacitor discharge cycle (Fig.’s 4A-4C, 12A, charge-up diode 250A, membrane 265, and their related discussion; see, for example, paragraph 0143).
Regarding Claim 9:
Modified Thibado teaches the limitations of the preceding claim 1. Modified Thibado, in further view of Thibado, discloses wherein the capacitor is fully charged by the DC voltage source to a stable state (Fig.’s 3A-3B, capacitor 120 and its related discussion; see, for example, paragraph 0120 which discloses the capacitor was charged with a 1V power supply).
Regarding Claim 10:
Modified Thibado teaches the limitations of the preceding claim 1. While Modified Thibado fails to teach wherein the diodes are selected based on the rate of conductance to match the capacitor as a noise source, in this case, the selection of given diodes would have flown naturally to one of ordinary skill in the art as necessitated by the specific requirements of a given application. In other words, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select respective diodes based on a rate of conductance, since it has been held that the selection of a component based upon its suitability for its intended purpose is within the level of one of ordinary skill.
Regarding Claim 12:
Modified Thibado teaches the limitations of the preceding claim 1. Modified Thibado, in further view of Thibado, discloses wherein the DC voltage source provides a voltage that corresponds to turn on voltages for the diodes (see, for example, paragraph 0231 which discloses a voltage source 200 is in electrical communication with the membrane as well as a magnification of voltage potential initially applied by the voltage source because excess charge is allowed to conduct via the transducer assembly 300 and may be stored in the storage capacitor 275. See also, Lathom Fig. 5, diodes D30 and D31, and their related discussion; see, for example, Col. 4, lines 5-31).
Regarding Claim 13:
Thibado discloses an integrated circuit on a chip, the circuit comprising: at least one capacitor connected to the circuit to generate an AC noise signal (Fig.’s 3A, 17A-17B, integrated circuit 400 with silicon wafer 205, voltage source or battery 200, capacitor 120/275, etc., and their related discussion; see, for example, paragraphs 0150-0152); a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal (Fig. 3A, membrane 265, capacitor 120, and their related discussion; see, for example paragraphs 0108 and 0111 which disclose the capacitor is electrically coupled to the membrane which is configured to convert vibrational energy into an alternating electrical current, thereby harvesting energy from the membrane); output terminals connected to the respective rectifiers and configured for connection to an off chip circuit (Fig.’s 17A-17B, silicon wafer 205 including metal contacts, and its related discussion; see, for example, paragraph 0152). While Thibado discloses the utilization of diodes, see for example Fig.’s 4A-4C, Thibado fails to teach respective rectifiers receiving a positive cycle of the first AC power signal and a negative cycle of the first AC power signal.
However, Lathom et al., which is similarly directed towards current and voltage control within an AC system, discloses respective rectifiers receiving a positive cycle of the first AC power signal and a negative cycle of the first AC power signal (Fig. 5, circuit 200 including positive rectifying means in the form of diode D30 and a negative rectifying means in the form of diode D31, capacitor C21 and C22 as positive cycle storage capacitor(s), as well as C23 and C24 as negative cycle storage capacitor(s), and their related discussion; see, for example, Col. 13, line 18- Col. 14, line 2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Thibado to include rectifiers, as taught within Lathom, so as to provide a way in which the harvesting system will be capable of utilizing both a positive and negative cycle of the alternating current for both charging and discharging (Abstract).
Regarding Claim 14:
Modified Thibado teaches the limitations of the preceding claim 13. Modified Thibado, in further view of Thibado, discloses wherein the AC noise signal results from ambient thermal energy (Fig. 3A, membrane 265, capacitor 120, and their related discussion; see, for example, paragraphs 0010, 0120, 0233, etc. which disclose the membrane and capacitor derives the external force from the thermally induced motion of atoms in the freestanding graphene.).
Regarding Claim 15:
Modified Thibado teaches the limitations of the preceding claim 13. Modified Thibado, in further view of Thibado, discloses configured to connect to the off chip circuit that comprises a DC voltage source connected to the plurality of capacitors, a positive cycle storage capacitor and negative cycle storage capacitor charged with the first AC power signal (see, for example, paragraph 0152 which discloses a layered integrated circuit includes a voltage source or battery, a capacitor, and a harvesting circuit formed in a substrate such as a silicon wafer. See also Lathom, Fig. 5, circuit 200 including positive rectifying means in the form of diode D30 and a negative rectifying means in the form of diode D31, capacitor C21 and C22 as positive cycle storage capacitor(s), as well as C23 and C24 as negative cycle storage capacitor(s), and their related discussion; see, for example, Col. 13, line 18- Col. 14, line 2).
Regarding Claim 16:
Modified Thibado teaches the limitations of the preceding claim 13. Modified Thibado, in further view of Lathom, discloses comprising a first diode configured as a first respective rectifier of the first AC power signal to produce a first output power signal from a positive cycle of the first AC power signal (Fig. 5, circuit 200 including positive rectifying means in the form of diode D30 and capacitor C21 and C22 as positive cycle storage capacitor(s), and their related discussion; see, for example, Col. 13, line 18- Col. 14, line 2).
Regarding Claim 17:
Modified Thibado teaches the limitations of the preceding claim 16. Modified Thibado, in further view of Lathom, discloses comprising a second diode configured as a second respective rectifier of the first AC power signal to produce a second output power signal from a negative cycle of the first AC power signal (Fig. 5, circuit 200 including negative rectifying means in the form of diode D31, capacitor C23 and C24 as negative cycle storage capacitor(s), and their related discussion; see, for example, Col. 13, line 18- Col. 14, line 2).
Regarding Claim 18:
Thibado discloses an integrated circuit on a chip, the circuit comprising: at least one capacitor generating an AC noise signal (Fig.’s 3A, 17A-17B, integrated circuit 400 with silicon wafer 205, voltage source or battery 200, capacitor 120/275, etc., and their related discussion; see, for example, paragraphs 0150-0152); a selected bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal (Fig. 3A, membrane 265, capacitor 120, and their related discussion; see, for example paragraphs 0108 and 0111 which disclose the capacitor is electrically coupled to the membrane which is configured to convert vibrational energy into an alternating electrical current, thereby harvesting energy from the membrane); output terminals connected to the transistors and configured for connection to an off chip circuit for energy harvesting from output signals (Fig.’s 17A-17B, silicon wafer 205 including metal contacts, and its related discussion; see, for example, paragraph 0152). While Thibado discloses the utilization of diodes, see for example Fig.’s 4A-4C, Thibado fails to teach respectively forward biased and reversed biased transistors rectifying corresponding positive and negative cycles of the AC noise signal.
However, Lathom et al., which is similarly directed towards current and voltage control within an AC system, discloses respectively forward biased and reversed biased transistors rectifying corresponding positive and negative cycles of the AC noise signal (Fig. 5, circuit 200 including positive rectifying means in the form of diode D30 and a negative rectifying means in the form of diode D31, capacitor C21 and C22 as positive cycle storage capacitor(s), as well as C23 and C24 as negative cycle storage capacitor(s), and their related discussion; see, for example, Col. 13, line 18- Col. 14, line 2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Thibado to include forward and reversed biased transistors, as taught within Lathom, so as to provide a way in which the harvesting system will be capable of utilizing both a positive and negative cycle of the alternating current for both charging and discharging (Abstract).
Regarding Claim 19:
Thibado discloses a method of assembling an energy harvesting circuit, comprising: connecting at least one capacitor within the energy harvesting circuit (Fig.’s 3A, 17A-17B, integrated circuit 400 with silicon wafer 205, voltage source or battery 200, capacitor 120/275, etc., and their related discussion; see, for example, paragraphs 0150-0152); forming a capacitive region in the energy harvesting circuit by defining the at least one capacitor with a first capacitor plate having an initial separation distance with respect to a first surface of a free-standing membrane, wherein the first surface of the free-standing membrane defines a second capacitor plate (Fig. 3A, membrane 265, capacitor 120, and their related discussion; see, for example paragraphs 0108 and 0111 which disclose the capacitor is electrically coupled to the membrane which is configured to convert vibrational energy into an alternating electrical current, thereby harvesting energy from the membrane, as well as paragraph 0233 which discloses forming a capacitive region in the energy harvesting circuit by defining a first capacitor plate having an initial separation distance with respect to a first surface of a free-standing membrane, wherein the first surface of the free-standing membrane defines a second capacitor plate);exposing the free standing membrane to ambient thermal energy to induce charge accumulation in the capacitive region, the ambient thermal energy also inducing a thermal AC noise signal (Fig. 3A, membrane 265, capacitor 120, and their related discussion; see, for example, paragraphs 0010, 0120, 0233, etc. which disclose the membrane and capacitor derives the external force from the thermally induced motion of atoms in the freestanding graphene.); selecting the capacitance of the capacitor to select a bandwidth of the AC noise signal transmitting through the capacitor as a first AC power signal (see, for example, paragraph 0111 which discloses the membrane 265 will have a predetermined sensitivity operable to harness relatively low frequency vibration). While Thibado discloses the utilization of diodes, see for example Fig.’s 4A-4C, Thibado fails to teach rectifying the first AC power signal to charge a positive cycle storage capacitor and a negative cycle storage capacitor with the first AC power signal.
However, Lathom et al., which is similarly directed towards current and voltage control within an AC system, discloses rectifying the first AC power signal to charge a positive cycle storage capacitor and a negative cycle storage capacitor with the first AC power signal (Fig. 5, circuit 200 including positive rectifying means in the form of diode D30 and a negative rectifying means in the form of diode D31, capacitor C21 and C22 as positive cycle storage capacitor(s), as well as C23 and C24 as negative cycle storage capacitor(s), and their related discussion; see, for example, Col. 13, line 18- Col. 14, line 2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Thibado to include a rectification process, as taught within Lathom, so as to provide a way in which the harvesting system will be capable of utilizing both a positive and negative cycle of the alternating current for both charging and discharging (Abstract).
Regarding Claim 20:
Modified Thibado teaches the limitations of the preceding claim 19. Modified Thibado, in further view of Thibado, discloses positioning the membrane relative to the first capacitor plate such that the membrane is unobstructed and free to vibrate in response to ambient thermal energy, wherein vibration of the membrane defines cyclical ripple formations along the first surface, and wherein each ripple formation alternates between a peak and a trough relative to the first capacitor plate to change the initial separation distance in a variable gap capacitor (Fig. 3A, membrane 265, capacitor 120, and their related discussion; see, for example paragraphs 0108 and 0111 which disclose the capacitor is electrically coupled to the membrane which is configured to convert vibrational energy into an alternating electrical current, thereby harvesting energy from the membrane, as well as paragraph 0233 which discloses forming a capacitive region in the energy harvesting circuit by defining a first capacitor plate having an initial separation distance with respect to a first surface of a free-standing membrane, wherein the first surface of the free-standing membrane defines a second capacitor plate. “The method continues by positioning the membrane relative to the first capacitor plate such that the membrane is unobstructed and free to vibrate in response to ambient energy…”).
Claim 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Thibado (U.S. Patent Publication Number 2019/0386584) in view of Lathom et al. (U.S. Patent Number 4,808,886) and in further view of Tanaka (U.S. Patent Number 4,995,069).
Regarding Claim 7:
Modified Thibado teaches the limitations of the preceding claim 5. Modified Thibado fails to teach wherein the forward based diode and the reversed biased diode are connected to additional diodes in a Cockcroft-Walton full-wave rectifier and multiplier circuit.
However, Tanaka discloses wherein the forward based diode and the reversed biased diode are connected to additional diodes in a Cockcroft-Walton full-wave rectifier and multiplier circuit (Fig. 5, voltage multipliers 20a, 20b, diodes D and capacitors C, and their related discussion; see, for example, Col. 4, lines 31-36). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Modified Thibado to connect the diodes to additional diodes in a Cockcroft-Walton full-wave rectifier and multiplier circuit, as taught within Tanaka, so as to produce a high voltage via a relatively small and light circuit (Col. 4, lines 30-40 and Col. 6, lines 43-46).
Claim 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Thibado (U.S. Patent Publication Number 2019/0386584) in view of Lathom et al. (U.S. Patent Number 4,808,886) and in further view of Clevenger et al. (U.S. Patent Number 6,444,516).
Regarding Claim 11:
Modified Thibado teaches the limitations of the preceding claim 1. Modified Thibado fails to teach wherein the AC noise signal comprises conductivity due to conductive carrier defect hopping through the capacitor.
However, Clevenger et al. discloses wherein the AC noise signal comprises conductivity due to conductive carrier defect hopping through the capacitor (see, for example, Col. 7, lines 5-11 which disclose increasing current leakage through an otherwise insulating barrier 20 to introduce defects and/or dopants into the barrier 20. Both defects and dopants can either boost tunneling by reducing the tunneling barrier for the carriers, or enhance a so-called hopping conduction which is due to carrier hopping from defect to defect of from dopant to dopant.). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Modified Thibado to incorporate conductivity due to conductive carrier defect hopping, as taught within Clevenger, so as to increase current flow through the capacitor (Co. 7, lines 5-11).
Conclusion
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/JOSEPH N INGE/Examiner, Art Unit 2836
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