DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant's amendment filed on 5/12/2026 has been entered. Claims 1, 10, and 17 have been amended. Claims 7 and 9 have been cancelled. No claims have been added. Claims 1-6, 8, and 10-19 are still pending in this application, with claim 1 being independent.
The objection to Claim 7 has been withdrawn in view of the amendment cancelling this claim.
The rejections of Claims 9 and 17 under 35 U.S.C. 112(d) have been withdrawn in view of the amendment.
The Nonstatutory Double Patenting rejection of Claims 1-3, 5-8, and 10-19 as being unpatentable over Claims 1-7, 11-13, 15-16, and 18-20 of US Patent No. 12,062,644 has been withdrawn in view of the filing of a Terminal Disclaimer.
Response to Arguments
Applicant's arguments filed 5/12/2026 have been fully considered but they are not persuasive.
Regarding the Applicant’s argument that “Since no double patenting objection was raised to Claim 7 with respect to U.S. Patent No. 12,381,190 in view of Sugiara et al. (US 2015/0008835), it is respectfully submitted that this objection is overcome” (see Applicant’s Remarks, pg. 5), the Examiner respectfully disagrees.
In this case, the amendment to Claim 1 to recite the language previously recited in Claim 7 that “wherein the device is configured such that a current/voltage characteristic (I-V) of the first LED array increases substantially linearly with increasing voltage and a current/voltage characteristic (I-V) of the second LED array increases generally exponentially with increasing voltage” is completely identical in scope to the limitation “wherein a current/voltage characteristic (I-V) of the first LED array increases substantially linearly with increasing voltage and a current/voltage characteristic (I-V) of the second LED array increases generally exponentially with increasing voltage” recited in Claim 1 of the parent ‘190 patent. Therefore, the Nonstatutory Double Patenting rejection of Claims 1-6, 8-10, 12, 15, and 19 rejected on the ground of nonstatutory double patenting as being unpatentable over Claims 1-8 and 11 of U.S. Patent No. 12,381,190 in view of Sugiara (US 2015/0008835) has been maintained.
Terminal Disclaimer
The terminal disclaimer filed on 5/12/2026 disclaiming the terminal portion of any patent granted on this application which would extend beyond the expiration date of US Patent No. 12,062,644 has been reviewed and is accepted. The terminal disclaimer has been recorded.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-6, 8, 10, 12, 15, and 19 rejected on the ground of nonstatutory double patenting as being unpatentable over Claims 1-8 and 11 of U.S. Patent No. 12,381,190 in view of Sugiara et al. (US 2015/0008835, hereinafter “Sugiara”). Although the claims at issue are not identical, they are not patentably distinct from each other because independent Claim 1 of the instant application is a broader version and obvious variant of Claim 1 of the parent ‘190 patent, the subject matter of Claims 2 and 9 of the instant application are recited in Claim 1 of the parent ‘190 patent, Claim 3 of the instant application corresponds to Claim 12 of the parent ‘190 patent, Claims 4-6, 8, 10, 12, 15, and 19 of the instant application correspond to Claims 2-8 and 11, respectively, of the parent ‘190 patent, as shown in the table below with any differences underlined.
Instant application
US Patent 12,381,190
Comments
Claim 1: A light emitting device for generating light of a color temperature that decreases with decreasing power applied to the light emitting device, the light emitting device comprising:
a substrate;
a first LED array of serially connected first LED chips on the substrate,
a second LED array of serially connected second LED chips on the substrate,
a first photoluminescence layer covering the first LED array for generating light of a first color temperature,
a second photoluminescence layer covering the second LED array for generating light of a second different color temperature, and
a linear resistor connected to the first LED array;
wherein the first LED array and connected linear resistor, and second LED array are connected in parallel; and
wherein the device is configured such that a current/voltage characteristic (I-V) of the first LED array increases substantially linearly with increasing voltage and a current/voltage characteristic (I-V) of the second LED array increases generally exponentially with increasing voltage.
Claim 1: An LED lamp for generating light of a color temperature that decreases with decreasing power applied to the LED lamp, the LED lamp comprising:
a first LED string of serially connected first LED chips,
a second LED string of serially connected second LED chips,
a first photoluminescence arrangement for covering the first LED string for generating light of a first color temperature,
a second photoluminescence arrangement for covering the second LED string for generating light of a second different color temperature, and
a linear resistor serially connected with the first LED string;
wherein the first LED string and second LED string are connected in parallel; and
wherein a current/voltage characteristic (I-V) of the first LED string increases substantially linearly with increasing voltage and a current/voltage characteristic (I-V) of the second LED string increases generally exponentially with increasing voltage.
The light emitting device recited in Claim 1 of the instant application is the LED lamp recited in Claim 1 of the parent ‘190 patent. Additionally, the first and second LED arrays recited in Claim 1 of the instant application are the first and second LED strings recited in Claim 1 of the parent ‘190 patent, and the first and second photoluminescence layers recited in Claim 1 of the instant application are the first and second photoluminescence arrangements recited in Claim 1 of the parent ‘190 patent. Further, since Claim 1 of the parent ‘190 patent recites the linear resistor being serially connected with the first LED string, this means that the linear resistor must also be connected in parallel with the second LED string/array as recited in Claim 1 of the instant application, since any electronic circuit element connected in series with the first LED string is automatically connected in parallel with the second LED string.
Additionally, both the light emitting device of Claim 1 of the instant application and the light emitting device of Claim 1 of the parent ‘190 patent require that a current/voltage characteristic (I-V) of the first LED array increases substantially linearly with increasing voltage and a current/voltage characteristic (I-V) of the second LED array increases generally exponentially with increasing voltage.
Claim 2: The light emitting device of Claim 1, wherein the linear resistor is serially connected to the first LED array.
Claim 1: An LED lamp for generating light of a color temperature that decreases with decreasing power applied to the LED lamp, the LED lamp comprising:
a first LED string of serially connected first LED chips,
a second LED string of serially connected second LED chips,
a first photoluminescence arrangement for covering the first LED string for generating light of a first color temperature,
a second photoluminescence arrangement for covering the second LED string for generating light of a second different color temperature, and
a linear resistor serially connected with the first LED string;
wherein the first LED string and second LED string are connected in parallel; and
wherein a current/voltage characteristic (I-V) of the first LED string increases substantially linearly with increasing voltage and a current/voltage characteristic (I-V) of the second LED string increases generally exponentially with increasing voltage.
Claim 3: The light emitting device of claim 1, wherein the linear resistor is serially connected within the first LED array.
Claim 12: The LED lamp of claim 1, wherein the linear resistor is in the first LED string.
Claim 4: The light emitting device of Claim 1, wherein the device is configured such that a proportion of current flowing through the first LED array compared with a proportion of current flowing through the second LED array depends on the power applied to the device.
Claim 2: The LED lamp of Claim 1, wherein a proportion of current flowing through the first LED string compared with a proportion of current flowing through the second LED string depends on the power applied to the LED lamp.
Claim 5: The light emitting device of Claim 1, wherein the device is configured such that at a maximum operating power, current passes through both the first and second LED arrays and a color temperature of light generated by the device is between the first and second color temperatures; and
wherein the device is configured such that at a minimum operating power, a majority of current flows through the first LED array and a color temperature of light generated by the device is substantially the first color temperature.
Claim 3: The LED lamp of Claim 1, wherein at a maximum operating power, current passes through both the first and second LED strings and a color temperature of light generated by the LED lamp is between the first and second color temperatures; and
wherein at a minimum operating power, a majority of current flows through the first LED string and a color temperature of light generated by the LED lamp is substantially the first color temperature.
Claim 6: The light emitting device of Claim 5, wherein the device is configured such that at the maximum operating power, at least 50% of the current flows through the second LED array.
Claim 4: The LED lamp of claim 3, wherein at the maximum operating power, at least 50% of the current flows through the second LED string.
Claim 8: The light emitting device of Claim 1, wherein the first LED array comprises fewer LED chips than the second LED array.
Claim 5: The LED lamp of claim 1, wherein the first LED string comprises fewer LED chips than the second LED string.
Claim 10: The light emitting device of claim 1, wherein the second photoluminescence layer additionally covers the first photoluminescence layer.
Claim 6: The LED lamp of claim 7, wherein the second photoluminescence arrangement additionally covers the first photoluminescence arrangement.
Claim 12: The light emitting device of claim 1, wherein the first photoluminescence layer comprises at least one narrowband red phosphor selected from the group consisting of:
K2SiF6:Mn4+, K2GeF6:Mn4+, and K2TiF6:Mn4+.
Claim 7: The LED lamp of claim 1, wherein the first photoluminescence arrangement comprises a narrowband red phosphor selected from the group consisting of:
K2SiF6:Mn4+, K2GeF6:Mn4+, and K2TiF6:Mn4+.
Claim 15: The light emitting device of claim 1, wherein the first color temperature is from 1800K to 2500K, and the second color temperature is from 3000K to 4000K.
Claim 8: The LED lamp of claim 1, wherein the first color temperature is from 1800K to 2500K, and the second color temperature is from 3000K to 4000K.
Claim 19: The light emitting device of claim 1, wherein the substrate is an at least partially light transmissive substrate.
Claim 11: The LED lamp of claim 1, comprising an at least partially light transmissive substrate on which the first LED string and the second LED string are mounted.
Claim 19 of the instant application depends on Claim 1 of the instant application, which recites that the first and second LED arrays are on the substrate. Therefore, Claim 19 of the instant application requires an at least partially light transmissive substrate on which the first LED string/array and the second LED string/array are mounted, as recited in Claim 11 of the parent ‘190 patent.
As shown in the table above, all the features of Claim 1 of the instant application are recited in Claim 1 of the parent ‘190 patent except for the recitation of a substrate on which the first and second LED arrays are disposed.
Sugiara teaches a light emitting device for generating light of a color temperature that decreases with decreasing power applied to the light emitting device (LED lamp bulb 300 which comprises a light-emitting device 1 that includes electrode terminals 50 which receive power from a power source such as power circuit 70 to vary the power supplied to the device, which varies the current applied to the device and the color temperature of the light generated by the device; see Figs. 1-13, 21-22; Abstract; para. [0042]-[0047], [0084]-[0088], [0094], [0100]-[0110], [0179]-[0185]), the light emitting device comprising a substrate (board 30; see Figs. 1-3; para. [0047], [0049], [0052], [0055], [0059], [0061], [0064], [0068], [0072]-[0082], [0086]); a first LED array of serially connected first LED chips on the substrate (light-emitting element 20 comprises a plurality of LEDs 21 connected in series to each other on the substrate 30; see Figs. 1-3; para. [0043]-[0046], [0061]-[0072]); and a second array of serially connected second LED chips on the substrate (light-emitting element 10 comprises a plurality of LEDs 11 connected in series to each other on the substrate 30; see Figs. 1-3; para. [0043]-[0046], [0049]-[0059]).
Therefore, in view of Sugiara, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the LED lamp of Claim 1 of the parent ‘190 patent by disposing the first and second LED arrays on a substrate. One would have been motivated to modify the known LED lamp of Claim 1 of the parent ‘190 patent by disposing the first and second LED arrays on a substrate, as taught by Sugiara, in order to provide a support for mounting the LEDs (see Sugiara, par. [0074] for the motivation).
Additionally, as shown in the table above, the subject matter of Claims 2 and 9 of the instant application are recited in Claim 1 of the parent ‘190 patent, Claim 3 of the instant application corresponds to Claim 12 of the parent ‘190 patent, Claims 4-6, 8, 10, 12, 15, and 19 of the instant application correspond to Claims 2-8 and 11, respectively, of the parent ‘190 patent. Therefore, Claims 1-6, 8, 10, 12, 15, and 19 of the instant application are not patentably distinct from Claims 1-8 and 11 of the parent ‘190 patent.
Allowable Subject Matter
Claims 1-6, 8, 10, 12, 15, and 19 would be allowable if rewritten to overcome the Nonstatutory Double Patenting rejection set forth in this Office action or upon receipt of a timely filed Terminal Disclaimer to overcome the Nonstatutory Double Patenting rejection.
Claims 11, 13-14, and 16-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 1, the claim is considered to recite allowable subject matter because it has been amended to incorporate the subject matter of Claim 7, which was previously indicated as reciting allowable subject matter in Section 34 on pg. 50 of the Non-Final Rejection mailed 2/12/2026. Therefore, Claim 1 would be allowable for the same reasons previously discussed with regards to Claim 7 in the Non-Final Rejection mailed 2/12/2026.
Claims 2-6, 8, and 10-19 depend on Claim 1.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM N HARRIS whose telephone number is (571)272-3609. The examiner can normally be reached Monday - Thursday 8:00AM- 5:00PM EST, Alternate Fridays.
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/WILLIAM N HARRIS/Primary Examiner, Art Unit 2875
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