Prosecution Insights
Last updated: April 19, 2026
Application No. 19/290,645

METHOD AND APPARATUS DETERMINING RFID VIABILITY

Non-Final OA §102§103
Filed
Aug 05, 2025
Examiner
FRANKLIN, JAMARA ALZAIDA
Art Unit
2876
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Engineered Products Of Ohio LLC
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
90%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
690 granted / 822 resolved
+15.9% vs TC avg
Moderate +6% lift
Without
With
+6.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
11 currently pending
Career history
833
Total Applications
across all art units

Statute-Specific Performance

§101
1.8%
-38.2% vs TC avg
§103
21.9%
-18.1% vs TC avg
§102
45.1%
+5.1% vs TC avg
§112
20.2%
-19.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 822 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3, 5, 6, 9, 11, 12, and 15-19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Asthana et al. (US 10,460,224) (hereinafter referred to as ‘Asthana’). Asthana teaches Regarding claim 1, a product verification system, comprising: a reader (scanning device 100); a trigger mechanism (trigger 108) coupled with the reader; a printed circuit board (PCB) control unit coupled with the trigger mechanism and the reader and being mounted inside of a control cabinet remote from the reader and the trigger mechanism (col. 9, lines 52-67); and programming provided in the PCB control unit, said programming configured to control the trigger mechanism and the reader; wherein the reader is operable to interrogate an article that comes into a field of view of the trigger mechanism; wherein the programming is configured to determine if an RFID tag and/or a barcode is applied to the article based on an interrogation (col. 5, lines 45-64); and wherein the programming is further configured to automatically calibrate the reader by setting a transmission power level of a transmitter to a predetermined maximum power level (col. 5, line 65-col. 10, line 9); regarding claim 2, the product verification system of claim 1, further comprising: a control module coupled with the trigger mechanism and the reader; and a control and interface circuitry module embedded on the PCB control unit and operable with at least the control module, wherein the control and interface circuity module is configured to facilitate a movement of data on the PCB control unit among the control module, the reader, and the trigger mechanism (col. 3, lines 49-57); regarding claim 3, the product verification system of claim 1, further comprising: a signal protection and conditioning circuity module embedded on the PCB control unit and operable at least a control module of the PCB control unit, wherein the signal protection and conditioning circuity module is configured to directly connect to a set of input/output connections embedded on the PCB control unit. regarding claim 5, the product verification system of claim 1, further comprising: a power circuitry module embedded on the PCB control unit and operable to supply internal power to modules embedded on the PCB control unit (col. 7, lines 34-39); regarding claim 6, the product verification system of claim 1, further comprising: a sensor module embedded on the PCB control unit and operable with a control module embedded on the PCB control unit, wherein the sensor module is configured to measure one or more states of the product verification system (col. 4, lines 29-37); regarding claim 9, the product verification system of claim 1, further comprising: a RFID module embedded on the PCB control unit and operable with a control module of the PCB control unit and the reader (col. 4. lines 29-37); Regarding claim 11, the product verification system of claim 1, further comprising: an enclosure storing the PCB control unit and operable to mount to a rail of the control cabinet (see Figure 1); regarding claim 12, the product verification system of claim 11, further comprising: an anti-tampering mechanism operable with one or both of the enclosure and the PCB control unit (see Figure 1); regarding claim 15, the product verification system of claim 1, further comprising: a non-volatile storage unit embedded on the PCB control unit and operable with a control module of the PCB control unit. Regarding claim 16, a product verification system, comprising: a reader; a trigger mechanism coupled with the reader; a printed circuit board (PCB) control unit coupled with the trigger mechanism and the reader and being mounted inside of a control cabinet remote from the reader and the trigger mechanism; programming provided in the PCB control unit, said programming configured to control the trigger mechanism and the reader; and a display screen provided on a user interface, wherein the display screen is configured to display one of a plurality of different colors thereon based on a result of the interrogation by the reader; wherein the reader is operable to interrogate an article that comes into a field of view of the trigger mechanism; wherein the programming is configured to determine if an RFID tag and/or a barcode is applied to the article based on an interrogation; and wherein the programming is further configured to automatically calibrate the reader by setting a transmission power level of a transmitter to a predetermined maximum power level; regarding claim 17, the product verification system of claim 16, further comprising: a control module coupled with the trigger mechanism and the reader; and a control and interface circuitry module embedded on the PCB control unit and operable with at least the control module, wherein the control and interface circuity module is configured to facilitate movement of data on the PCB control unit among the control module, the reader, and the trigger mechanism; regarding claim 18, the product verification system of claim 16, further comprising: an enclosure storing the PCB control unit and operable to mount to a rail of the control cabinet; regarding claim 19, the product verification system of claim 18, further comprising: an anti-tampering mechanism operable with one or both of the enclosure and the PCB control unit. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Asthana in view of Hussey et al. (US 2003/0001018) (hereinafter referred to as ‘Hussey’). The teachings of Asthana have been discussed above. Asthana lacks the teaching of ethernet connection and lacks the teaching of cellular communication. Hussey teaches an ethernet connection operable with at least a control module embedded on a PCB control unit; wherein the ethernet connection is adapted to enable communication between a control module and a controller system (paragraph 0084); and a cellular communication module embedded on the PCB control unit and operable with a control module of a PCB control unit (paragraph 0084). One of ordinary skill in the art would have readily recognized that providing the Asthana invention with an ethernet connection and a cellular communication would have been beneficial considering both ethernet connection and cellular communication are commonly utilized within the art for purposes of speed and efficiency. Therefore it would have been obvious at the time the invention was made to modify the teachings of Asthana with the aforementioned teachings of Hussey for optimal system functionality. Claim(s) 7 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Asthana in view of Eggert (US 2014/0203071). The teachings of Asthana have been discussed above. Asthana lacks the teaching of a temperature and humidity sensor and lacks the teaching of a three-axis accelerometer sensor. Eggert teaches A system comprising: a temperature and humidity sensor embedded on the PCB control unit (see paragraph 0055); and a three-axis accelerometer sensor embedded on the PCB control unit (see paragraph 0055). One of ordinary skill in the art would have readily recognized that providing the Asthana invention with a temperature and humidity sensor and a three-axis accelerometer would have been beneficial for taking measures of the environment in which the reader resides in order to recalibrate the reader accordingly. Therefore it would have been obvious at the time the invention was made to modify the teachings Asthana with the aforementioned teaching of Eggert. Claim(s) 13, 14, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Asthana in view of Stokes et al. (US 9,317,730) (hereinafter referred to as ‘Stokes’). The teachings Asthana have been discussed above. Asthana lacks the teaching of a watchdog timer and the teaching of a battery backup. Stokes teaches A system comprising: a watchdog timer (timer 35) operable with at least a control module of the PCB control unit; and a battery (battery 156) backup embedded on the PCB control unit One of ordinary skill in the art would have readily recognized that providing the Asthana invention with a timer and battery would have been beneficial for including elements with a reader which help to ensure the reader is operating at an appropriate power level at a desired duration. Therefore it would have been obvious at the time the invention was made to modify the teaching of Asthana with the aforementioned teachings of Stokes. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMARA ALZAIDA FRANKLIN whose telephone number is (571)272-2389. The examiner can normally be reached Monday-Friday, 8:00am-4:30pm Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Micahel G. Lee can be reached at 571-272-2398. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. March 04, 2026 /JAMARA A FRANKLIN/ Primary Examiner, Art Unit 2876
Read full office action

Prosecution Timeline

Aug 05, 2025
Application Filed
Mar 04, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
90%
With Interview (+6.5%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 822 resolved cases by this examiner. Grant probability derived from career allow rate.

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