Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This Office Action is sent in response to Applicant’s Communication received on 05 August 2025 for application number 19/291,365. The Office hereby acknowledges receipt of the following and placed of record in file: Oath/Declaration, Abstract, Specification, Drawings, and Claims.
Claims 1 – 20 are presented for examination.
Priority
As required by M.P.E.P. 201.14(c), acknowledgement is made of applicant’s claim for priority based on the application filed on 19 August 2020 (CON of 16/947,820).
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 04 November 2025 was filed on the mailing date of the application. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The applicant’s drawings submitted are acceptable for examination purposes.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1 – 20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 – 20 of U.S. Patent No. 12,423,013. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims in the conflicting application disclose the limitations required of the claims in the instant application.
Claims 1 – 20 of the instant application are compared to claims 1 – 20 of U.S. Patent No. 12,423,013 in the following table:
Instant Application
U.S. Patent No. 12,423,013
A system comprising:
a memory device; and
a processing device, operatively coupled to the memory device, the processing device to perform operations, comprising:
determining a reference temperature value for a block family while the block family is open;
measuring a temporal voltage shift (TVS) value of a voltage level within one or more memory cells of the block family;
determining a threshold voltage offset bin based on the reference temperature value and the TVS value; and
reading data from any page of the block family via application of a threshold voltage offset, specified by the threshold voltage offset bin, to a base read level voltage. (claim 1)
The system of claim 1, wherein the operations further comprise:
identifying a temperature value based on the reference temperature value, the temperature value being representative of the memory cells of the block family; and
recording the temperature value for the block family. (claim 2)
The system of claim 1, wherein the operations further comprise:
initializing the block family associated with the memory device; and
responsive to programming a page residing in the memory device, associating the page with the block family. (claim 3)
The system of claim 3, wherein the reference temperature value associated with the block family comprises at least one of:
a temperature value measured for memory cells programmed while the block family is open; or
an average of measured temperature values for the block family while the block family is open. (claim 4)
The system of claim 3, wherein the operations further comprise:
measuring an opening temperature of the memory device at initialization of the block family;
determining a temperature metric value by integrating, over time, an absolute temperature difference between the opening temperature and an immediate temperature of the memory device; and
closing the block family in response to the temperature metric value being greater than or equal to a specified threshold temperature value that is based on a threshold temperature function of an absolute temperature value, wherein the absolute temperature function varies with a reference temperature value associated with the block family. (claim 5)
The system of claim 5, further comprising a plurality of temperature sensors, wherein each temperature sensor of the plurality of temperature sensors is coupled to a respective die of a plurality of dice of the memory device, wherein at least one of the temperature sensors is to measure the opening temperature and the immediate temperature. (claim 6)
The system of claim 6, wherein the temperature metric value is associated with a single die of the memory device, and wherein the operations further comprise:
determining an average of the temperature metric value for the plurality of dice; and
wherein closing the block family is performed in response to the average of the temperature metric value being greater than or equal to the specified threshold temperature value. (claim 7)
The system of claim 6, wherein the temperature metric value is associated with a single die of the memory device, and wherein the operations further comprise:
determining an aggregated temperature metric value over the plurality of dice;
in response to determining that a first temperature metric value for a first die of the plurality of dice is greater than or equal to a maximum threshold temperature value, excluding the first temperature metric value from the aggregated temperature metric value; and
wherein closing the block family is in response to the aggregated temperature metric value being greater than or equal to the specified threshold temperature value. (claim 8)
A method comprising:
determining, by a processing device of a memory sub-system, a reference temperature value for a block family of a memory device while the block family is open;
measuring a temporal voltage shift (TVS) value of a voltage level within one or more memory cell of the block family;
determining a threshold voltage offset based on a combination of the reference temperature value and the TVS value; and
reading, by the processing device, data from a page of the block family via application of the threshold voltage offset to a base read level voltage. (claim 9)
The method of claim 9, further comprising:
identifying a temperature value based on the reference temperature value, the temperature value being representative of the memory cells of the block family; and
recording the temperature value for the block family. (claim 10)
The method of claim 9, further comprising:
initializing the block family associated with the memory device; and
responsive to programming a page residing in the memory device, associating the page with the block family. (claim 11)
The method of claim 11, wherein the reference temperature value associated with the block family comprises at least one of:
a temperature value measured for memory cells programmed while the block family is open; or
an average of measured temperature values for the block family while the block family is open. (claim 12)
The method of claim 11, further comprising:
measuring an opening temperature of the memory device at initialization of the block family;
determining a temperature metric value by integrating, over time, an absolute temperature difference between the opening temperature and an immediate temperature of the memory device; and
closing the block family in response to the temperature metric value being greater than or equal to a specified threshold temperature value that is based on a threshold temperature function of an absolute temperature value, wherein the absolute temperature function varies with reference temperature value associated with the block family. (claim 13)
The method of claim 13, wherein measuring the opening temperature comprises measuring a temperature of one of a thermocouple or a controller that is coupled to the memory device. (claim 14)
The method of claim 13, wherein the temperature metric value is associated with a single die of the memory device, the method further comprising:
determining an average of the temperature metric value for a plurality of dice of the memory device; and
wherein closing the block family is performed in response to the average of the temperature metric value being greater than or equal to the specified threshold temperature value. (claim 15)
The method of claim 13, wherein the temperature metric value is associated with a single die of the memory device, the method further comprising:
determining an aggregated temperature metric value over a plurality of dice of the memory device;
in response to determining that a first temperature metric value for a first die of the plurality of dice is greater than or equal to a maximum threshold temperature value, excluding the first temperature metric value from the aggregated temperature metric value; and
wherein closing the block family is in response to the aggregated temperature metric value being greater than or equal to the specified threshold temperature value. (claim 16)
A method comprising:
determining, by a processing device of a memory sub-system, a reference temperature value for a block family of a memory device while the block family is open;
measuring a temporal voltage shift (TVS) value of a voltage level within one or more memory cells of the block family;
determining a threshold voltage offset bin based on the reference temperature value and the TVS value; and
reading data from any page of the block family via application of a threshold voltage offset, specified by the threshold voltage offset bin, to a base read level voltage. (claim 17)
The method of claim 17, further comprising:
initializing the block family associated with the memory device;
responsive to programming a page residing in the memory device, associating the page with the block family;
identifying a temperature value based on the reference temperature value, the temperature value being representative of the memory cells of the block family; and
recording the temperature value for the block family. (claim 18)
The method of claim 18, wherein the reference temperature value associated with the block family comprises at least one of:
a temperature value measured for memory cells programmed while the block family is open; or
an average of measured temperature values for the block family while the block family is open. (claim 19)
The method of claim 18, further comprising:
measuring an opening temperature of the memory device at initialization of the block family;
determining a temperature metric value by integrating, over time, an absolute temperature difference between the opening temperature and an immediate temperature of the memory device; and
closing the block family in response to the temperature metric value being greater than or equal to a specified threshold temperature value that is based on a threshold temperature function of an absolute temperature value, wherein the absolute temperature function varies with a reference temperature value associated with the block family. (claim 20)
A system comprising:
a memory device; and
a processing device, operatively coupled to the memory device, the processing device to perform operations, comprising:
accessing a matrix of threshold voltage offset bins, where a first dimension of the matrix is temperature and a second dimension of the matrix is a temporal voltage shift (TVS) amount;
measuring a temperature value based on a reference temperature value for a block family of the memory device;
measuring a TVS value of a voltage level within one or more memory cells of the block family;
retrieving, from the matrix, a threshold voltage offset bin based on the reference temperature value and the TVS value; and
reading data from any page of the block family via application of a threshold voltage offset, specified by the threshold voltage offset bin, to a base read level voltage. (claim 1)
The system of claim 1, wherein the operations further comprise recording a temperature value based on the reference temperature value for the block family. (claim 2)
The system of claim 1, wherein the operations further comprise:
initializing the block family associated with the memory device; and
responsive to programming a page residing on the memory device, associating the page with the block family. (claim 3)
The system of claim 3, wherein the reference temperature value associated with the block family comprises at least one of:
a temperature value measured for memory cells programmed while the block family is open; or
an average of measured temperature values for the block family while the block family is open. (claim 4)
The system of claim 3, wherein the operations further comprise:
measuring an opening temperature of the memory device at initialization of the block family;
determining a temperature metric value by integrating, over time, an absolute temperature difference between the opening temperature and an immediate temperature of the memory device; and
closing the block family in response to the temperature metric value being greater than or equal to a specified threshold temperature value that is based on a threshold temperature function of an absolute temperature value, wherein the absolute temperature function varies with a reference temperature value associated with the block family. (claim 5)
The system of claim 5, further comprising a plurality of temperature sensors, wherein each temperature sensor of the plurality of temperature sensors is coupled to a respective die of a plurality of dice of the memory device, wherein at least one of the temperature sensors is to measure the opening temperature and the immediate temperature. (claim 6)
The system of claim 6, wherein the temperature metric value is associated with a single die of the memory device, and wherein the operations further comprise:
determining an average of the temperature metric value for the plurality of dice; and
wherein closing the block family is performed in response to the average of the
temperature metric value being greater than or equal to the specified threshold temperature value. (claim 7)
The system of claim 6, wherein the temperature metric value is associated with a single die of the memory device, and wherein the operations further comprise:
determining an aggregated temperature metric value over the plurality of dice;
in response to determining that a first temperature metric value for a first die of the plurality of dice is greater than or equal to a maximum threshold temperature value, excluding the first temperature metric value from the aggregated temperature metric value; and
wherein closing the block family is in response to the aggregated temperature metric value being greater than or equal to the specified threshold temperature value. (claim 8)
A method comprising:
measuring, by a processing device, a temperature value based on a reference temperature value for a block family of a memory device;
retrieving, from a temperature bin offset vector, a first threshold voltage offset bin value based on the temperature value;
measuring a temporal voltage shift (TVS) value of a voltage level within one or more memory cells of the block family;
retrieving, from a TVS bin offset vector, a second threshold voltage offset bin value based on the TVS value;
determining a threshold voltage offset bin by summing the first threshold voltage offset bin value and the second threshold voltage offset bin value; and
reading, by the processing device, data from a page of the block family via application of a threshold voltage offset, specified by the threshold voltage offset bin, to a base read level voltage. (claim 9)
The method of claim 9, further comprising recording a temperature value based on the
reference temperature value for the block family. (claim 10)
The method of claim 9, further comprising:
initializing the block family associated with the memory device; and
responsive to programming a page residing on the memory device, associating the page with the block family. (claim 11)
The method of claim 11, wherein the reference temperature value associated with the block family comprises at least one of:
a temperature value measured for memory cells programmed while the block family is open; or
an average of measured temperature values for the block family while the block family is open. (claim 12)
The method of claim 11, further comprising:
measuring an opening temperature of the memory device at initialization of the block family;
determining a temperature metric value by integrating, over time, an absolute temperature difference between the opening temperature and an immediate temperature of the memory device; and
closing the block family in response to the temperature metric value being greater than or equal to a specified threshold temperature value that is based on a threshold temperature function of an absolute temperature value, wherein the absolute temperature function varies with reference temperature value associated with the block family. (claim 13)
The method of claim 13, wherein measuring the opening temperature comprises measuring a temperature of one of a thermocouple or a controller that is coupled to the memory device. (claim 14)
The method of claim 13, wherein the temperature metric value is associated with a single die of the memory device, the method further comprising:
determining an average of the temperature metric value for a plurality of dice of the memory device; and
wherein closing the block family is performed in response to the average of the temperature metric value being greater than or equal to the specified threshold temperature value. (claim 15)
The method of claim 13, wherein the temperature metric value is associated with a single die of the memory device, the method further comprising:
determining an aggregated temperature metric value over a plurality of dice of the memory device;
in response to determining that a first temperature metric value for a first die of the plurality of dice is greater than or equal to a maximum threshold temperature value, excluding the first temperature metric value from the aggregated temperature metric value; and
wherein closing the block family is in response to the aggregated temperature metric value being greater than or equal to the specified threshold temperature value. (claim 16)
A method comprising:
accessing a matrix of threshold voltage offset bins for a memory device, where a first dimension of the matrix is temperature and a second dimension of the matrix is a temporal voltage shift (TVS) amount;
measuring a temperature value based on a reference temperature value for a block family of the memory device;
measuring a TVS value of a voltage level within one or more memory cells of the block family;
retrieving, from the matrix, a threshold voltage offset bin based on the reference temperature value and the TVS value; and
reading, using a processing device of the memory device, data from any page of the block family via application of a threshold voltage offset, specified by the threshold voltage offset bin, to a base read level voltage. (claim 17)
The method of claim 17, further comprising:
initializing the block family associated with the memory device;
responsive to programming a page residing on the memory device, associating the page with the block family; and
recording a temperature value based on the reference temperature value for the block family. (claim 18)
The method of claim 18, wherein the reference temperature value associated with the block family comprises at least one of:
a temperature value measured for memory cells programmed while the block family is open; or
an average of measured temperature values for the block family while the block family is open. (claim 19)
The method of claim 18, further comprising:
measuring an opening temperature of the memory device at initialization of the block family;
determining a temperature metric value by integrating, over time, an absolute temperature difference between the opening temperature and an immediate temperature of the memory device; and
closing the block family in response to the temperature metric value being greater than or equal to a specified threshold temperature value that is based on a threshold temperature function of an absolute temperature value, wherein the absolute temperature function varies with a reference temperature value associated with the block family. (claim 20)
Conclusion
STATUS OF CLAIMS IN THE APPLICATION
CLAIMS REJECTED IN THE APPLICATION
Per the instant office action, claims 1 – 20 have received a first action on the merits and are subject of a first action non-final. Claims 1 – 20 are rejected under a Double Patenting rejection.
Allowable Subject Matter
Claims 1 – 20 would be allowable upon a timely filed terminal disclaimer to overcome the Double Patenting rejection set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter: for independent claims 1, 9, and 17 the prior art of record, neither anticipates, nor renders obvious measuring a temporal voltage shift (TVS) value of a voltage level within the memory cells of a block family and determining a threshold voltage offset bin that is based on the a reference temperature value for a block family while the block family is open and the TVS value, and reading data from any page of the block family via an application of a threshold voltage offset to a base read level voltage that is specified by the threshold voltage offset bin. Claims 2 – 8, 10 – 16, and 18 – 20 depend from claims 1, 9, and 17 respectively and would be allowable, subject to the Double Patenting rejection.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Connor et al., US Patent No. 9,977,075 B1 – teaches “Markov failure prediction model; the data of at least one physical condition includes one or more sensed voltages, average of the one or more sensed voltages, one or more sensed temperatures, average of the one or more sense temperatures, one or more workload measures, or average of the one or more workload measures; updating at least one of the on-die reliability physics models, the operating parameter is adjusted such that at least one of an average voltage, average temperature, or average workload metric is within a desired range; and/or calculating an estimated amount of lifetime consumed for the integrated circuit.” [col. 10, lines 60-67]
Parthasarathy, US Patent No. 9,464,999 B2 – teaches “determining a difference between an average of a maximum and a minimum of the temperature sensor readings in a moving time window and an average of all temperature sensor readings in the time window, determining if the difference is less than a first specified threshold, determining if the trend reversal variable is greater than a second threshold, and determine the temperature sensor is experiencing oscillations in response to determining at least one of: the difference is less than the first threshold and the trend reversal variable is greater than the second threshold; in response to determining that the temperature sensor is experiencing oscillations, recording in a memory communicatively coupled to the computer processor data indicating that the temperature sensor is experiencing oscillations; and alerting personnel, using at least one of a display and a speaker coupled to the computer processor, that the temperature sensor is experiencing oscillations in response to determining the temperature sensor is experiencing oscillations.” [claim 3]
Yang et al., US Pub. No. 2019/0050153 A1 – teaches “The controller when executing the data storing instructions cause the controller to periodically fetch a temperature reading from the one or more temperature sensors and limit operations to the one or more flash dies when the temperature reading is above a start throttling threshold. In certain embodiments, TLC blocks are written to in a SLC mode when the temperature reading is above the start throttling threshold. In other embodiments, one or more spare SLC blocks are written to with non-system data during throttling.” [Abstract]
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EDWARD WADDY JR whose telephone number is (571)272-5156. The examiner can normally be reached M-Th 8am-5pm.
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/EW/Examiner, Art Unit 2135
/JARED I RUTZ/Supervisory Patent Examiner, Art Unit 2135