DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
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Claims 1-3 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 3 of U.S. Patent No. 11,700,375 in view of Unno et al. (US 2014/0205198 A1, referred to herein as “Unno”).
Claim 1 of Instant Application
1. An encoder comprising:
circuitry; and
memory connected to the circuitry,
wherein the circuitry, in operation:
determines whether to apply arithmetic encoding to binary data of coefficient information of an image block, the binary data being obtained by binarizing the coefficient information;
in a first case where it is determined that the arithmetic encoding is to be applied and a number of Context-based Adaptive Binary Arithmetic Coding (CABAC) processes is within an allowable range, encodes the coefficient information according to a first syntax and outputs a first bitstream including the encoded coefficient information; and
in a second case where it is determined that the arithmetic encoding is not to be applied, subtracts 1 from a value of an initial non-zero coefficient to obtain an intermediate value, encodes the intermediate value according to a second syntax different from the first syntax and outputs a second bitstream that includes the encoded intermediate value, wherein a coding amount is smaller in the second case than the first case, wherein
the number of CABAC processes is determined to be within the allowable range when a total number of syntax elements with which an encoding process has been performed in a region including the image block in a mode according to the CABAC is greater than or equal to a threshold value, the mode being different from a bypass mode.
Claim 1 of U.S. Patent No. 11,700,375
1. An encoder, comprising:
circuitry; and
memory connected to the circuitry,
wherein the circuitry, in operation:
determines whether to apply arithmetic encoding to binary data of coefficient information of an image block;
in a first case where it is determined that the arithmetic encoding is to be applied and a number of Context-based Adaptive Binary Arithmetic Coding (CABAC) processes is within an allowable range, encodes the coefficient information according to a first syntax; and
in a second case where it is determined that the arithmetic encoding is not to be applied, subtracts 1 from a value of an initial non-zero coefficient and encodes the coefficient information according to a second syntax different from the first syntax.
Claim 3 of U.S. Patent No. 11,700,375
3. The encoder according to claim 1,
wherein the number of CABAC processes is determined to be within the allowable range when a total number of syntax elements with which an encoding process has been performed in a region including the image block in a mode according to the CABAC is greater than or equal to a threshold value, the mode being different from a bypass mode.
Table 1.
Regarding claim 1, Claim 3 of U.S. Patent No. 11,700,375 discloses many of the same or similar limitations as shown in Table 1.
Claim 3 of U.S. Patent No. 11,700,375 does not explicitly disclose:
the binary data being obtained by binarizing the coefficient information;
outputs a first bitstream including the encoded coefficient information; and
outputs a second bitstream that includes the encoded intermediate value, wherein a coding amount is smaller in the second case than the first case.
However, Unno discloses:
the binary data being obtained by binarizing the coefficient information (Unno: paragraph [0024], disclosing that coefficient information may be binarized to generate binarized data);
outputs a first bitstream including the encoded coefficient information (Unno: paragraph [0033], disclosing that binarized data may be encoded and output as a first bitstream); and
outputs a second bitstream that includes the encoded intermediate value (Unno: paragraph [0033], disclosing that binarized data may be encoded and output as a second bitstream; paragraphs [0030]-[0031], disclosing that intermediate data may be encoded and output in the bitstream), wherein a coding amount is smaller in the second case than the first case (Unno: paragraph [0025], disclosing that coding amounts may be smaller in various cases).
At the time the application was effectively filed, it would have been obvious for a person having ordinary skill in the art to use the first and second bitstreams of Unno with the encoder of Claim 3 of U.S. Patent No. 11,700,375.
One would have been motivated to modify Claim 3 of U.S. Patent No. 11,700,375 in this manner in order to more quickly perform encoding processes by utilizing parallel processing operations (Unno: paragraph [0005]).
Regarding claims 2 and 3, the claims recite analogous limitations to claim 1, above, and are therefore rejected on the same premise.
Claims 1-3 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 3 of U.S. Patent No. 11,206,402 in view of Unno.
Claim 1 of Instant Application
1. An encoder comprising:
circuitry; and
memory connected to the circuitry,
wherein the circuitry, in operation:
determines whether to apply arithmetic encoding to binary data of coefficient information of an image block, the binary data being obtained by binarizing the coefficient information;
in a first case where it is determined that the arithmetic encoding is to be applied and a number of Context-based Adaptive Binary Arithmetic Coding (CABAC) processes is within an allowable range, encodes the coefficient information according to a first syntax and outputs a first bitstream including the encoded coefficient information; and
in a second case where it is determined that the arithmetic encoding is not to be applied, subtracts 1 from a value of an initial non-zero coefficient to obtain an intermediate value, encodes the intermediate value according to a second syntax different from the first syntax and outputs a second bitstream that includes the encoded intermediate value, wherein a coding amount is smaller in the second case than the first case, wherein
the number of CABAC processes is determined to be within the allowable range when a total number of syntax elements with which an encoding process has been performed in a region including the image block in a mode according to the CABAC is greater than or equal to a threshold value, the mode being different from a bypass mode.
Claim 1 of U.S. Patent No. 11,206,402
1. An encoder, comprising:
circuitry; and
memory connected to the circuitry,
wherein the circuitry, in operation:
determines whether to apply arithmetic encoding to binary data of coefficient information of an image block;
in a first case where it is determined that the arithmetic encoding is to be applied and a number of Context-based Adaptive Binary Arithmetic Coding (CABAC) processes is within an allowable range, encodes the coefficient information according to a first syntax structure;
in a second case where it is determined that the arithmetic encoding is to be applied but the number of CABAC processes is out of the allowable range, encodes the coefficient information according to a second syntax structure different from the first syntax structure; and
in a third case where it is determined that the arithmetic encoding is not to be applied, subtracts 1 from a value of an initial non-zero coefficient and encodes the coefficient information.
Claim 3 of U.S. Patent No. 11,206,402
3. The encoder according to claim 1,
wherein the number of CABAC processes is determined to be within the allowable range when a total number of syntax elements with which an encoding process has been performed in a region including the image block in a mode according to the CABAC is greater than or equal to a threshold value, the mode being different from a bypass mode.
Table 2.
Regarding claim 1, Claim 3 of U.S. Patent No. 11,206,402 discloses many of the same or similar limitations as shown in Table 2.
Claim 3 of U.S. Patent No. 11,206,402 does not explicitly disclose:
the binary data being obtained by binarizing the coefficient information;
outputs a first bitstream including the encoded coefficient information; and
outputs a second bitstream that includes the encoded intermediate value, wherein a coding amount is smaller in the second case than the first case.
However, Unno discloses:
the binary data being obtained by binarizing the coefficient information (Unno: paragraph [0024], disclosing that coefficient information may be binarized to generate binarized data);
outputs a first bitstream including the encoded coefficient information (Unno: paragraph [0033], disclosing that binarized data may be encoded and output as a first bitstream); and
outputs a second bitstream that includes the encoded intermediate value (Unno: paragraph [0033], disclosing that binarized data may be encoded and output as a second bitstream; paragraphs [0030]-[0031], disclosing that intermediate data may be encoded and output in the bitstream), wherein a coding amount is smaller in the second case than the first case (Unno: paragraph [0025], disclosing that coding amounts may be smaller in various cases).
At the time the application was effectively filed, it would have been obvious for a person having ordinary skill in the art to use the first and second bitstreams of Unno with the encoder of Claim 3 of U.S. Patent No. 11,206,402.
One would have been motivated to modify Claim 3 of U.S. Patent No. 11,206,402 in this manner in order to more quickly perform encoding processes by utilizing parallel processing operations (Unno: paragraph [0005]).
Regarding claims 2 and 3, the claims recite analogous limitations to claim 1, above, and are therefore rejected on the same premise.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christopher Braniff whose telephone number is (571) 270-5009. The examiner can normally be reached M-F 7AM to 4PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thai Tran can be reached at (571) 272-7382. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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CHRISTOPHER T. BRANIFF
Primary Examiner
Art Unit 2484
/CHRISTOPHER BRANIFF/Primary Examiner, Art Unit 2484
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