DETAILED ACTION
Claims 1-16 are considered in this office action. Claims 1-16 are pending examination.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 7 and 8 are objected to because of the following informalities: an abnormality should be the abnormality. Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 5-8, 10 and 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over Holsea et al. (US8943335B2) in view of Gangsto et al. (US8143860B2) and herein after will be referred as Holsea and Gangsto.
Regarding Claim 1, Holsea teaches a battery management system (fig.2 #130 Col.2 Line 42-44 : “As shown in FIG. 2, battery pack 100 includes one or more battery cells 120, discrete transistors 110, 112, a sense resistor 114, and a battery management and protection system 130.”)comprising:
a micro-controller unit configured to manage a battery (#202 Col.3 Line 60-66: “As illustrated in FIGS. 3 and 4, battery management and protection system 130 includes a software-based central processing unit (CPU) 202, which can be implemented, for example, as a low-power, CMOS 8-bit microcontroller based on a RISC architecture. CPU 202 ensures correct program execution and is able to access memories, perform calculations and control other modules in the system.”);
and a protection circuit configured to monitor the battery (Col.4 Line 12-18: “System 130 includes various modules that perform battery measurement and provide battery protection. Such modules include a Voltage analog-to-digital converter (V-ADC) mod ule 204, a current analog-to-digital converter (C-ADC) mod ule 206, and a current protection module 208. These modules, which include circuits and logic, are discussed in greater detail below.”),
wherein, when the protection circuit detects an abnormality in the battery while the battery management system is in a shutdown mode or a sleep mode (#246, Col.8 Line 22-30 : “An example of an action that can be established to trigger based on events from the foregoing modules is disabling FETs 110, 112. For example, FETs 110, 112 can be disabled automatically based on one or more of the following events: V-ADC channel over/under-voltage. V-ADC channel over/ under-temperature, C-ADC high charge/discharge current, C-ADC discharge current detection at low Voltages, current protection module charge/discharge over-current, and current protection module short-circuit.” Also See Col.10 Line 16-34: “The sleepwalking feature allows modules that form part of the event system (e.g., timekeeper 240, V-ADC 204, C-ADC 206, and current protection module 208) to continue to perform critical safety or other functions even when system 130 is in a low-power (e.g., sleep) mode. Thus, as shown for example in FIG. 8, if timekeeper 240 attempts to send an event to V-ADC module 204, C-ADC 206 or current protec tion module 208 while the target module is in a low-power mode (block 302), the event automatically triggers an enable request to the target module (block 304). In response to receiving the enable request, the target module processes the event and then returns to sleep (block 306). Thus, certain modules are enabled to perform specified tasks even while system 130 is in a sleep or other low-power mode such that the particular modules would not otherwise be allowed to operate in the absence of the sleepwalking feature. Furthermore, the sleepwalking feature operates independently of CPU 202. Therefore, the specified tasks can be performed without waking CPU 202.”),
Holsea may not expressly teaches the protection circuit outputs a wake-up signal to the BMS.
In Similar endeavor of battery management and protection, Gangsto teaches the protection circuit outputs a wake-up signal to the BMS (Col.9 Line 14-38: “Each protection has an interrupt flag. Each flag can be read and cleared by the CPU 116, and each flag has an individual interrupt enable. All enabled flags are combined into a single battery protection interrupt request to the CPU 116. This interrupt can wake up the CPU 116 from any operation mode, except power-off.”)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Holsea to incorporate the teachings of Gangsto to include the protection circuit outputs a wake-up signal to the BMS. Doing so would optimize unnecessary operation of the central processor and reducing power consumption as disclosed in Holsea and Gangsto.
Regarding Claim 5, Holsea in view of Gangsto teaches the battery management system as claimed in claim 1.
Gangsto also teaches wherein the wake- up signal output from the protection circuit triggers an interrupt function of the micro- controller unit to wake up the battery management system (Col.9 Line 14-38: “Each protection has an interrupt flag. Each flag can be read and cleared by the CPU 116, and each flag has an individual interrupt enable. All enabled flags are combined into a single battery protection interrupt request to the CPU 116. This interrupt can wake up the CPU 116 from any operation mode, except power-off.”).
Regarding Claim 6, Holsea in view of Gangsto teaches the battery management system as claimed in claim 5. Gangsto also teaches the battery management system is configured to be woken up in the sleep mode (Col.9 Line 14-38: “Each protection has an interrupt flag. Each flag can be read and cleared by the CPU 116, and each flag has an individual interrupt enable. All enabled flags are combined into a single battery protection interrupt request to the CPU 116. This interrupt can wake up the CPU 116 from any operation mode, except power-off.”)
.
Regarding Claim 7, Holsea in view of Gangsto teaches the battery management system as claimed in claim 1.
Holsea also teaches an abnormality of the battery detected by the protection circuit includes an abnormality of a voltage of the battery (Col.4 Line 30-38 : “In the case of a scan for the single conversion/channel scan mode, CPU 202 selects the channels and starts the scan. In contrast, automatic protection scans are performed independently of firmware (i.e., independently of CPU 202). As explained in greater detail below, the automatic protection scan is configured with auto-loaded values during start-up of system 130.V-ADC module 204 executes a channel scan and compares measured values (e.g., of battery cell Voltage and/or temperature) to auto-loaded trigger levels. These features can allow V-ADC module 204 to provide accurate, but config urable protection levels for battery cell voltage and temperature.” Also See Col.6 Line 21-28: “Registers 215 in FET controller 216 can store, for example, information relating to an action to be taken when a signal indicative of one of the following events is received: a short circuit protection event, a discharge over-current protection event, a charge over-current protection event, a cell over Voltage protection event, a cell under-Voltage protection event, an internal temperature over-Voltage protection event, an internal temperature under-Voltage protection event.”)
Regarding Claim 8, Holsea in view of Gangsto teaches the battery management system as claimed in claim 1.
Holsea also teaches wherein an abnormality of the battery detected by the protection circuit includes an abnormality of a temperature of the battery (Col.4 Line 30-38 : “In the case of a scan for the single conversion/channel scan mode, CPU 202 selects the channels and starts the scan. In contrast, automatic protection scans are performed independently of firmware (i.e., independently of CPU 202). As explained in greater detail below, the automatic protection scan is configured with auto-loaded values during start-up of system 130.V-ADC module 204 executes a channel scan and compares measured values (e.g., of battery cell Voltage and/or temperature) to auto-loaded trigger levels. These features can allow V-ADC module 204 to provide accurate, but config urable protection levels for battery cell voltage and temperature.” Also See Col.6 Line 21-28: “Registers 215 in FET controller 216 can store, for example, information relating to an action to be taken when a signal indicative of one of the following events is received: a short circuit protection event, a discharge over-current protection event, a charge over-current protection event, a cell over Voltage protection event, a cell under-Voltage protection event, an internal temperature over-Voltage protection event, an internal temperature under-Voltage protection event.”).
Regarding Claim 10, Holsea teaches a wake-up method of a battery management system comprising a micro- controller unit and a protection circuit configured to monitor a battery (Col.1 Line 44-48), the wake-up method comprising:
determining, using the micro-controller unit, to determine that charging/discharging of the battery is completed or paused and putting the battery management system into a shutdown mode or a sleep mode (Col.3 Line 60-66);
monitoring, by the protection circuit, the battery while the battery management system is in one of the shutdown mode and the sleep mode (Col.4 Line 12-18);
Gangsto teaches waking up the battery management system by the protection circuit outputting a wake-up signal (Col.9 Line 14-38)
Holsea also teaches when the protection circuit detects an abnormality of the battery (Col8 L22-30 and also see Col.10 Line 16-34).
Regarding Claim 13, Holsea in view of Gangsto teaches the wake-up method as claimed in claim 10.
Gangsto also teaches waking up the battery management system from the sleep mode using an interrupt function of the micro-controller unit triggered by the wake-up signal output from the protection circuit (Col.9 Line 14-38).
Regarding Claim 14, Holsea in view of Gangsto teaches the wake-up method as claimed in claim 10.
Holsea also teaches wherein the abnormality of the battery detected by the protection circuit comprises an abnormality of a voltage of the battery (Col4 Line 30-38 and Col. 6 Line 21-28).
Regarding Claim 15, Holsea in view of Gangsto teaches the wake-up method as claimed in claim 10.
Holsea also teaches wherein the abnormality of the battery detected by the protection circuit comprises an abnormality of a temperature of the battery (Col4 Line 30-38 and Col. 6 Line 21-28).
Claims 2, 4, 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Holsea in view of Gangsto and in further view of Akiba et al. (US2011/0050169) and herein after will be referred as Akiba.
Regarding Claim 2, Holsea in view of Gangsto teaches the battery management system as claimed in claim 1.
Holsea does not expressly teach an OR circuit configured to OR the wake-up signal output from the protection circuit with an external signal and a power supply activated by an output of the OR circuit and configured to wake up the battery management system by supplying power to the micro-controller unit.
Akiba teaches an OR circuit configured to OR the wake-up signal output from the protection circuit with an external signal (Para [0137-0138] : “In the example shown in FIG. 7, the switching circuit 606S comprises an OR circuit C3 to which the ignition signal IGN, the external charger signal CHG, and the wake-up signal are supplied, a one-shot trigger circuit C4, to which a signal output from the OR circuit C3 is supplied, a switching circuit SWB configured to be turned on or off by the signal output from a latch circuit FF in which output is set by the signal output from the one-shot trigger circuit C4, and a switch circuit SWA configured to switch connection between the external power 70 and the DC/DC circuit C2. When at least one of the ignition signal IGN, the external charger signal CHG, and the wake-up signal is turned on, the output from the OR circuit C3 is turned on (=1). When the output from the OR circuit C3 is turned on, the one-shot trigger circuit C4 refers to the rise of the ON signal from the OR circuit C3 and outputs a pulse signal of a predetermined period once. The pulse signal output from the one-shot trigger circuit C4 sets the output of the latch circuit FF to on (=1). The latch circuit FF maintains the set output until the output is re
”);
and a power supply activated by an output of the OR circuit and configured to wake up the battery management system by supplying power to the micro-controller unit (Para [0139] : “After the output of the latch circuit FF is set, the switch circuit SWB and the switch circuit SWA are turned on, and the power source supply voltage supplied from the external power 79 is supplied to the DC/DC circuit C2. The power source supply voltage converted into 5V by the DC/DC circuit C2 is supplied to the control circuit CTR.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Holsea and Gangsto to incorporate the teachings of Akiba to include an OR circuit configured to OR the wake-up signal output from the protection circuit with an external signal and a power supply activated by an output of the OR circuit and configured to wake up the battery management system by supplying power to the micro-controller unit. Doing so would optimize unnecessary operation of the central processor and reducing power consumption.
Regarding Claim 4, Holsea in view of Gangsto and in further view of Akiba teaches the battery management system as claimed in claim 2.
Akiba also teaches wherein the external signal OR-ed in the OR circuit is one of an external wake-up enable signal or a power- on signal (Para [0137]).
Regarding Claim 11, Holsea in view of Gangsto teaches the wake-up method as claimed in claim 10.
Akiba teaches : OR-ing the wake-up signal output from the protection circuit with an external signal while the battery management system is in the shutdown mode; and activating, by the OR-ed signal, a power supply configured to supply power to the micro-controller unit and supplying, by the activated power supply, power to the micro-controller unit to wake up the battery management system (Para [0137-0138]).
Regarding Claim 12, Holsea in view of Gangsto and in further view of Akiba teaches the wake-up method as claimed in claim 11.
Akiba also teaches wherein the external signal OR-ed with the wake-up signal includes one of a wake-up enable signal or a power- on signal from an external component (Para [0137]).
Claims 3, are rejected under 35 U.S.C. 103 as being unpatentable over Holsea in view of Gangsto and in further view of Moon et al. (US10491019) and herein after will be referred as Moon.
Regarding Claim 3, Holsea in view of Gangsto and in further view of Akiba teaches the battery management system as claimed in claim 2.
Holsea does not expressly teaches wherein the battery management system is configured to be woken up in the shutdown mode.
Moon teaches wherein the battery management system is configured to be woken up in the shutdown mode (Col.1 Line 16-23: “The present invention relates to a battery management system (BMS) and a method of controlling the same and, more particularly, to a battery management system capable of preventing overdischarge and overcharge of a battery by monitoring the battery through an electric load in a state in which a vehicle is turned off and switching the BSM to a wakeup state only if necessary, and a method of controlling the same.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Holsea, Gangsto and Akiba to incorporate the teachings of Moon to include the battery management system is configured to be woken up in the shutdown mode. Doing so would optimize unnecessary operation of the central processor and reducing power consumption.
Claims 9 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Holsea in view of Gangsto and in further view of Yoshio (US20050242779A1) and herein after will be referred as Yoshio.
Regarding Claim 9, Holsea in view of Gangsto teaches the battery management system as claimed in claim 1.
Holsea may not expressly teach wherein the wake- up signal output from the protection circuit comprises a fuse blow signal.
Yoshio teaches the wake- up signal output from the protection circuit comprises a fuse blow signal (Para [0038] : “”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Holsea, and Gangsto to incorporate the teachings of Yoshio to the wake- up signal output from the protection circuit comprises a fuse blow signal. Doing so would optimize notification process.
Regarding Claim 16, Holsea in view of Gangsto teaches the wake-up method as claimed in claim 10.
Hoslea does not expressly teaches wherein the wake-up signal output from the protection circuit comprises a fuse blow signal.
Yoshio teaches wherein the wake-up signal output from the protection circuit comprises a fuse blow signal (Para [0038]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Tsai et al. (US11742686B2) discloses a battery device includes a battery unit, a temperature port, a temperature sensitive component, a switch component and a battery management unit. The temperature sensitive component senses a temperature of the battery unit, and provides a temperature indication signal at the temperature port. The switch component is electrically connected to the temperature sensitive component. When the battery device operates abnormally, the battery management unit controls the switch component to make the switch component stop provision of the temperature indication signal at the temperature port.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ABDHESH K JHA whose telephone number is (571)272-6218. The examiner can normally be reached M-F:0800-1700.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James J Lee can be reached at 571-270-5965. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ABDHESH K JHA/Primary Examiner, Art Unit 3668
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