Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending.
The IDS, filed 12/4/25, has been considered.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-6, 8-11, 13, 15-17 and 19 of U.S. Patent No. US 11,922,029.
Claim(s) 1-6, 8-11, 13, 15-17 and 19 of patent # US 11,922,029 contain(s) every element of claim(s) 1-20 of the instant application and as such anticipate(s) claim(s) 1-20 of the instant application.
“A later patent claim is not patentably distinct from an earlier patent claim if the later claim is obvious over, or anticipated by, the earlier claim. In re Longi, 759 F.2d at 896, 225 USPQ at 651 (affirming a holding of obviousness-type double patenting because the claims at issue were obvious over claims in four prior art patents); In re Berg, 140 F.3d at 1437, 46 USPQ2d at 1233 (Fed. Cir. 1998) (affirming a holding of obviousness-type double patenting where a patent application claim to a genus is anticipated by a patent claim to a species within that genus). “ ELI LILLY AND COMPANY v BARR LABORATORIES, INC., United States Court of Appeals for the Federal Circuit, ON PETITION FOR REHEARING EN BANC (DECIDED: May 30, 2001).
The following is an example claim mapping between the current application and patent:
Current Application
1.A system comprising:
a memory device comprising a plurality of memory cells; and
a processing device operatively coupled with the memory device, the processing device to: receive a first read command at a first time;
receive a second read command at a second time;
determine that the first read command and the second read command are directed to an at least partially same set of memory cells of the plurality of memory cells;
determine, based on values stored in a look up table, a scaling factor corresponding to a difference between the first time and the second time;
increment a read counter based on the scaling factor; and
responsive to determining that a value of the read counter satisfies a threshold criterion, perform a media management operation with respect to the at least partially same set of memory cells.
Patent 11,922,029
1.A system comprising: a memory device comprising a plurality of memory cells; and
a processing device operatively coupled with the memory device, the processing device to: receive a first read command at a first time, wherein the first read command is with respect to a set of memory cells of the plurality of memory cells of the memory device;
receive a second read command at a second time, wherein the second read command is with respect to the set of memory cells of the plurality of memory cells of the memory device;
increment a read counter for the memory device by a value reflecting a difference between the first time and the second time; determine that a value of the read counter satisfies a threshold criterion; and responsive to determining that the value of the read counter satisfies the threshold criterion, perform a data integrity scan with respect to the set of memory cells.
4. The system of claim 1, wherein the processing device is further to: determine, based on values stored in a look up table, a scaling factor reflecting the difference between the first time and the second time, wherein the read counter is incremented based on the scaling factor.
As can be seen above, claim 4 (incorporating claim 1) of patent 11,922,029, teaches all of the limitations of claim 1 of the instant application, and more, anticipating claim 1 of the instant application.
Independent claim 8 is similarly mapped to claim 11 (incorporating claim 8) of patent 11,922,029.
Independent claim 15 is similarly mapped to claim 17 (incorporating claim 15) of patent 11,922,029.
Dependent claims 2-7 are mapped to claims 2-6 of patent 11,922,029.
Dependent claims 9-14 are mapped to claims 9-11 or 13 of patent 11,922,029.
Dependent claims 16-20 are mapped to claims 15-17 or 19 of patent 11,922,029.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-5, 7-9, 11, 13, 14, 15, and 16 of U.S. Patent No. US 12,417,035.
Claim(s) 1-5, 7-9, 11, 13, 14,15, and 16 of patent # US 12,417,035 contain(s) every element of claim(s) 1-20 of the instant application and as such anticipate(s) claim(s) 1-20 of the instant application.
“A later patent claim is not patentably distinct from an earlier patent claim if the later claim is obvious over, or anticipated by, the earlier claim. In re Longi, 759 F.2d at 896, 225 USPQ at 651 (affirming a holding of obviousness-type double patenting because the claims at issue were obvious over claims in four prior art patents); In re Berg, 140 F.3d at 1437, 46 USPQ2d at 1233 (Fed. Cir. 1998) (affirming a holding of obviousness-type double patenting where a patent application claim to a genus is anticipated by a patent claim to a species within that genus). “ ELI LILLY AND COMPANY v BARR LABORATORIES, INC., United States Court of Appeals for the Federal Circuit, ON PETITION FOR REHEARING EN BANC (DECIDED: May 30, 2001).
Current Application
1.A system comprising: a memory device comprising a plurality of memory cells; and
a processing device operatively coupled with the memory device, the processing device to: receive a first read command at a first time; receive a second read command at a second time;
determine that the first read command and the second read command are directed to an at least partially same set of memory cells of the plurality of memory cells;
determine, based on values stored in a look up table, a scaling factor corresponding to a difference between the first time and the second time;
increment a read counter based on the scaling factor; and
responsive to determining that a value of the read counter satisfies a threshold criterion, perform a media management operation with respect to the at least partially same set of memory cells.
Patent 12,417,035
1.A system comprising: a memory device comprising a plurality of memory cells; and
a processing device operatively coupled with the memory device, the processing device to: receive a first read command at a first time; receive a second read command at a second time;
determine that the first read command and the second read command are directed to an at least partially same set of memory cells of the plurality of memory cells;
determine an average read delay based on a number of read commands received during a period of time; determine a difference between the first time associated with the first read command and the second time associated with the second read command based on the average read delay; and
perform, based on the difference between the first time associated with the first read command and the second time associated with the second read command, a media management operation with respect to the at least partially same set of memory cells.
4.The system of claim 1, wherein the processing device is further to:
increment a read counter by a value corresponding to the difference between the first time and the second time, wherein the media management operation is performed responsive to a value of the read counter satisfying a threshold criterion.
5.The system of claim 4, wherein the processing device is further to:
determine, based on values stored in a look up table, a scaling factor corresponding to the difference between the first time and the second time, wherein the read counter is incremented based on the scaling factor.
As can be seen above, claim 5 (incorporating claims 4 and 1) of patent 12,417,035, teaches all of the limitations of claim 1 of the instant application, and more, anticipating claim 1 of the instant application.
Independent claim 8 is similarly mapped to claim 11 (incorporating claims 10 and 7) of patent 12,417,035.
Independent claim 15 is similarly mapped to claim 16 (incorporating claim 15 and 13) of patent 12,417,035.
Dependent claims 2-7 are mapped to claims 2, 3, or 5 of patent 12,417,035.
Dependent claims 9-14 are mapped to claims 7, 8, 9, or 11 of patent 12,417,035.
Dependent claims 16-20 are mapped to claims 13, 14, or 16 of patent 12,417,035.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US20210034274A1 discloses a processing device in a memory system receives a first read request from a host system, wherein the first read request is directed to first data stored at a first address in a block of the memory component. The processing device determines that the first address is located within a first region of the block and increments a read counter for the block by a default amount. The processing device further receives a second read request from the host system, wherein the second read request is directed to second data stored at a second address in a block of the memory component, determines that the second address is located within a second region of the block and increments the read counter for the block by a scaled amount. This reference does not disclose the limitation of the scaling factor is selected from a lookup table according to the difference between two successive reads to the same memory cells.
US20210280264A1 discloses a memory controller configured to schedule plural types of reliability countermeasure processes to be executed for the nonvolatile semiconductor memory. The plural types of reliability countermeasure processes includes at least a first reliability countermeasure process. This reference teaches using read counter to count read operations and timestamps are maintained for the memory regions. It also determines the difference between the current time and stored timestamp and uses that difference to determine a reliability countermeasure should be performed.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THAN NGUYEN whose telephone number is (571)272-4198. The examiner can normally be reached M-F 7:00am -4:00pm.
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/THAN NGUYEN/Primary Examiner, Art Unit 2138
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