Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 13-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Okamoto (US PGPUB 20230064794).
[Claim 13]
A photoelectric conversion device comprising:
a photoelectric conversion unit (201) configured to output a pulse signal in response to incidence of a photon (Paragraph 51, The reference numeral 211 denotes a photon counter that measures the number of photons incident to the pixel and counts the pulse signals that have been output from the waveform shaping unit 210 up to a first threshold);
a first counter (211) configured to count the pulse signal (Paragraph 51);
a second counter (212) configured to count a time until the first counter reaches a predetermined threshold value (Paragraph 54, The time counter 212 is a counter that measures a time until a measured value of the photon counter reaches the first threshold after the photon counter starts the measurement and outputs the measured value as a pixel value); and
a comparison circuit (213) configured to compare a count value of the second counter in a first frame with a count value of the second counter in a second frame before the first frame and output event information according to a comparison result (Paragraphs 62 and 63, In the FRAME (t), the photon counter 211 reaches the first threshold A before it is changed in the frame, and the count value B of the time counter is output to the selection circuit 213. In the FRAME (t+1), the photon counter 211 reaches the first threshold C after it is changed in the frame and the count value B′ of the time counter is output to the selection circuit 213. If the first threshold is A>C, the relation between the values of the time counters in each of the frames is (β>) B>B′.{So, the values of the time counters in each frame is compared and if the value of B is greater than B’ which is an indication of an event}).
[Claim 14]
The photoelectric conversion device according to claim 13, wherein the comparison circuit outputs the event information indicating that an event has been detected when the count value of the second counter in the first frame is different from the count value of the second counter in the second frame (Paragraphs 62 and 63, In the FRAME (t), the photon counter 211 reaches the first threshold A before it is changed in the frame, and the count value B of the time counter is output to the selection circuit 213. In the FRAME (t+1), the photon counter 211 reaches the first threshold C after it is changed in the frame and the count value B′ of the time counter is output to the selection circuit 213. If the first threshold is A>C, the relation between the values of the time counters in each of the frames is (β>) B>B′.{So, the values of the time counters in each frame is compared and the value of B is greater than B’ and is an indication of an event. Clearly B and B’ are different since B>B’}).
[Claim 15]
The photoelectric conversion device according to claim 13, wherein the comparison circuit outputs the event information indicating that an event has been detected when a difference between the count value of the second counter in the first frame and the count value of the second counter in the second frame exceeds a predetermined value Paragraphs 62 and 63, In the FRAME (t), the photon counter 211 reaches the first threshold A before it is changed in the frame, and the count value B of the time counter is output to the selection circuit 213. In the FRAME (t+1), the photon counter 211 reaches the first threshold C after it is changed in the frame and the count value B′ of the time counter is output to the selection circuit 213. If the first threshold is A>C, the relation between the values of the time counters in each of the frames is (β>) B>B′.{So, the values of the time counters in each frame is compared and the value of B is greater than B’ and is an indication of an event.})..
[Claim 16]
The photoelectric conversion device according to claim 13, wherein the threshold value is a count upper limit value of the first counter (Paragraph 52, In the present embodiment, the control signal for changing the first threshold is, for example, a predetermined pulse code. The upper limit of the count by the photon counter 211 may be changed by supplying this predetermined pulse code or the like to serve as the control signal to the control line 122).
Allowable Subject Matter
Claims 1-12 and 17-20 are allowed. The following is a statement of reasons for the indication of allowable subject matter: The prior art fails to teach or suggest “an exposure control circuit configured to control a count period of the pulse signal by the first counter according to a result of a plurality of comparisons of a count value of the first counter with a predetermined threshold value during an exposure period of one frame; a second counter configured to count each time it is determined that the count value of the first counter is equal to or less than the threshold value; and a comparison circuit configured to compare a count value of the second counter in a first frame with a count value of the second counter in a second frame before the first frame and output event information according to a comparison result” in combination with other claimed elements.
Claims 2-12 and 17-20 are dependent from allowed claim 1.
Prior art Eldesouki (US PGPUB 20120057059) teaches The first counter 508 counts the digital pulses from the APD, with a pulse width close to the APD deadtime. The first counter 508 gets reset once the threshold is reached. The second counter 1108, counts the output of the first counter until a threshold voltage is reached and then stops, latching the SRAM, until the second counter 1108 is reset for the next frame but fails to teach multiple comparisons in the same frame and a comparison circuit configured to compare a count value of the second counter in a first frame with a count value of the second counter in a second frame before the first frame and output event information according to a comparison result.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YOGESH K AGGARWAL whose telephone number is (571)272-7360. The examiner can normally be reached Monday - Friday 9:30-6.
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/YOGESH K AGGARWAL/Primary Examiner, Art Unit 2637
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