DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
2. Acknowledgment is made of applicant's claim for foreign priority based on an application filed in Japan on 11/27/2024. It is noted, however, that applicant has not filed a certified copy of the JP2024-206270 application as required by 37 CFR 1.55.
Information Disclosure Statement
3. The information disclosure statement (IDS) submitted on 08/20/2025 is in compliance with the provisions of 37 CFR 1.97 and was considered by the examiner.
Claim Rejections - 35 USC § 102
4. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
5. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
6. Claims 1-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Berkovich et al. (US-PGPUB 2019/0285468).
Regarding claim 1, Berkovich discloses an imaging device (Imaging device 535; see figs. 5, 6, 8A and paragraphs 0086, 0090, 0061), comprising:
a pixel configured to accumulate electric charges corresponding to intensity of received light (When photodiode 602 is exposed to light and charges are transferred; see figs. 6, 8A and paragraphs 0097, 0114);
a ramp voltage generator configured to generate a ramp voltage (Threshold generator 802 can provide a voltage ramp and a static voltage as a reference voltage (VREF) 815; see figs. 8A and paragraph 0113);
a saturation determination voltage generator configured to generate a saturation determination voltage from the ramp voltage (VREF 815 can be set at a voltage corresponding to the saturation threshold; see paragraph 0114); and
an analog-to-digital conversion unit (Pixel ADC 610; see figs. 6, 8A) configured to perform analog-to-digital conversion for converting (Pixel ADC 610 can measure the analog voltage developed at measurement capacitor 608, and provide a digital output representing the incident light intensity; see paragraph 0100), using the ramp voltage (Providing VREF 815; see figs. 8A-8C and paragraphs 0113-0115), an analog signal indicating an amount of the electric charges into a digital signal (Provide VREF 815 to comparator 804 to be compared against the voltage at analog output node 614 to generate decision 816; see paragraph 0113), and to determine whether the pixel is saturated in accordance with a result of comparison between a voltage of the analog signal and the saturation determination voltage (In a time-of-saturation operation, a time duration for the total charge at measurement capacitor 608 to reach a saturation threshold can be measured. The time duration can reflect the intensity of light received at pixel cell 600. The light intensity can be inversely proportional to the time duration, with a higher light intensity lead to a shorter time-to-saturation, and vice versa for a lower light intensity. The analog voltage can reach the fixed threshold at a certain time point, which causes decision 816 by comparator 804 to flip. The flipping of decision 816 stops the counting of counter 808, and the count value at counter 808 represents the time-to-saturation; see figs. 6, 8A-8C and paragraphs 0113-0121).
Regarding claim 2, Berkovich discloses everything claimed as applied above (see claim 1). In addition, Berkovich discloses the ramp voltage includes: a slope voltage having a constant voltage-value time-variation rate (Threshold generator 802 can provide a voltage ramp and a static voltage as a reference voltage (VREF) 815; see figs. 8B-9C and paragraph 0113); and a constant voltage having a constant voltage value, the ramp voltage generator generates the constant voltage, after generating the slope voltage (see figs. 8B-9C), and the performing the analog-to-digital conversion for converting, using the ramp voltage, the analog signal into the digital signal includes performing the analog-to-digital conversion for converting the analog signal into the digital signal at a timing at which levels of the slope voltage and the voltage of the analog signal are inverted, and the generating the saturation determination voltage from the ramp voltage includes generating the saturation determination voltage from the constant voltage (To perform the time-to-saturation measurement, threshold generator 802 can provide a fixed VREF 815. Fixed VREF 815 can be set at a voltage corresponding to the saturation threshold. Counter 808 can start counting right after the exposure period starts (e.g., right after shutter switch 604 is disabled). As the analog voltage at analog output node 614 ramps down (or up depending on the implementation), clock signal 812 keeps toggling to update the count value at counter 808. The analog voltage may reach the fixed threshold at a certain time point, which causes decision 816 by comparator 804 to flip. The flipping of decision 816 may stop the counting of counter 808, and the count value at counter 808 may represent the time-to-saturation; see paragraphs 0113-0115).
Regarding claim 3, Berkovich discloses everything claimed as applied above (see claim 2). In addition, Berkovich discloses the generating the saturation determination voltage from the constant voltage includes generating the saturation determination voltage by amplifying or shifting the constant voltage (A time duration for the total charge at measurement capacitor 608 to reach a saturation threshold (between medium light intensity range 712 and high light intensity range 714 of FIG. 7B) can be measured. The time duration can reflect the intensity of light received at pixel cell 600. The light intensity can be inversely proportional to the time duration, with a higher light intensity lead to a shorter time-to-saturation, and vice versa for a lower light intensity. Fixed VREF 815 can be set at a voltage corresponding to the saturation threshold; see paragraphs 0113-0114. The programming information of programmable configuration module 640 can include a set of breakpoints, with each breakpoint being associated with a count threshold for the reference count of reference counter 1004 of clock modulation system 1000 and a voltage threshold for the reference ramp of voltage ramp modulation system 1200; see fig. 13 and paragraphs 0133-0134, 0125, 0131).
Regarding claim 4, Berkovich discloses everything claimed as applied above (see claim 1). In addition, Berkovich discloses the ramp voltage includes a slope voltage having a constant voltage-value time-variation rate (Threshold generator 802 can provide a voltage ramp and a static voltage as a reference voltage (VREF) 815; see figs. 8B-9C and paragraph 0113), the performing the analog-to-digital conversion for converting, using the ramp voltage, the analog signal into the digital signal includes performing the analog-to-digital conversion for converting the analog signal into the digital signal at a timing at which levels of the slope voltage and the voltage of the analog signal are inverted, and the generating the saturation determination voltage from the ramp voltage includes varying the saturation determination voltage in accordance with variations of the voltage-value time-variation rate of the slope voltage (To perform the time-to-saturation measurement, threshold generator 802 can provide a fixed VREF 815. Fixed VREF 815 can be set at a voltage corresponding to the saturation threshold. Counter 808 can start counting right after the exposure period starts (e.g., right after shutter switch 604 is disabled). As the analog voltage at analog output node 614 ramps down (or up depending on the implementation), clock signal 812 keeps toggling to update the count value at counter 808. The analog voltage can reach the fixed threshold at a certain time point, which causes decision 816 by comparator 804 to flip. The flipping of decision 816 stops the counting of counter 808, and the count value at counter 808 represents the time-to-saturation; see paragraphs 0113-0115, 0125, 0131).
Contact Information
7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CYNTHIA CALDERON whose telephone number is (571)270-3580. The examiner can normally be reached M-F 9:00 AM-5:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TWYLER HASKINS can be reached at (571)272-7406. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CYNTHIA CALDERON/Primary Examiner, Art Unit 2639 09/16/2026
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