DETAILED ACTION
This office action is in response to application 19/305,853 filed 8/21/2025 that claims priority to KR10-2024-0182648 filed 12/10/2024..
Claims 1-20 have been examined.
The IDS sent 8/21/2025 has been considered.
Acknowledgement is made of applicant's claim for foreign priority based on an application filed in the Republic of Korea on 12/10/2024. Examiner notes the priority documents to KR10-2024-0182648 have been received by the USPTO.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Allowable Subject Matter
Claims 11-20 are allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 11, the combination of limitations presented in the claim are not found within the prior art, particularly:
“receiving, from a host, a first universal flash storage (UFS) protocol information unit (UPIU) including: an identification number of a pre-erase operation attribute, and a first attribute value requesting block status analysis;
generating, based on the first attribute value, a block status attribute based on one or more erased memory blocks of a plurality of memory blocks of a nonvolatile memory device;
receiving, from the host, a second UPIU requesting the block status attribute; providing the block status attribute to the host in response to the second UPIU;
receiving, from the host, a third UPIU including: the identification number of the pre-erase operation attribute, and a second attribute value requesting a pre-erase operation; and performing the pre-erase operation on invalid memory blocks of the plurality of memory blocks based on the second attribute value.’
This limitation requires 3 UPIU requests. This includes a first request containing two elements (an identification number of a pre-erase operation attribute, and a first attribute value requesting block status analysis). This request transfers from the host a pre-erase operation attribute (which could simply be some sort of configuration parameter associated with the pre-erase operation) and it also includes in the same protocol information unit (packet) a first attribute value requesting block status analysis (that is to be performed). The analysis is performed (presumable at the storage device, but this is not claimed). However, following the analysis, the results of the analysis are not automatically sent to the host as a response to the first protocol information unit making the status request. Instead, the claims require the host to send a second UPIU requesting the block status attribute and (presumable the storage device) sends the block status attribute to the host. As a final step, the host sends a third UPIU request containing both (1) an identification number of a pre-erase operation attribute and (2) a first attribute value requesting block status which triggers the pre-erase operation being performed.
The closest prior art is Guangdong (CN 120199304A assigned to Guangdon Oppo Mobile Telecommunications Corp Ltd, filed 3/10/2023 and published 6/24/2025. Guangdon discloses sending a UPIU request for the storage device to perform a pre-erase command. Guangdon also discloses sending a UPIU request for status information from the storage device. However UPIU does not explicitly disclose three UPIU requests that are used to perform a pre-erase command, where the first request contains an identification number of a pre-erase operation attribute, and a first attribute value requesting block status analysis; the second request requesting the block status attribute; the third request containing the identification number of the pre-erase operation attribute, and a second attribute value requesting a pre-erase operation.
Similarly claim 16 recites three UPIU requests to the host to perform a pre-erase command, where the first request contains an identification number of a pre-erase operation attribute, and a first attribute value requesting block status analysis; the second request requesting the block status attribute; the third request containing the identification number of the pre-erase operation attribute, and a second attribute value requesting a pre-erase operation.
An updated search failed to identify a teaching alone or in combination to teach the claimed limitation.
Dependent claims 12-15 and 17-20 are allowed based on their dependence from allowed claims 11 and 16.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4 and 7-8, are rejected under 35 U.S.C. 102 (a)(1) and 35 U.S.C. 102 (a)(2) as being anticipated by Bi (Bi 2025/0377822 A1 filed 5/20/2025 that claims priority to provisional application 63/658,709 filed 6/11/2024..
Regarding claim 1, Bi teaches An electronic system comprising: a host (Bi Fig. 1 that shows system 100 containing a Host System 105 and a Memory System 110 were system 100 comprises an electronic system.)
configured to output a block status analysis command; (Bi Fig. 3 and [0061]-[0062] that shows a Request block status information request form the host to the Memory System at step 330.) and a storage device configured to, in response to the block status analysis command, generate block status information of at least one memory block of a plurality of memory blocks of a nonvolatile memory device, and provide the block status information to the host, (Bi Fig. 3 and [0062]-[0064] that discloses a Block status information 335 is sent by the memory system to the host, that returns block status information. Bi [0017] discloses the memory may be non-volatile.)
wherein the host is configured to, based on the block status information, provide the storage device with a pre-erase command instructing a pre-erase operation for invalid memory blocks of the plurality of memory blocks, (Examiner notes that the instant application does not contain an explicit definition of a pre-erase command for invalid memory blocks and may be any command that affects invalid memory blocks. Furthermore, an invalid memory block may be a block with invalid data. Bi Fig. 3 and [0065] discloses a threshold indication command 350 that directs the system on when garbage collection is to be performed where (per Bi [0035]) garbage collection is a process that copies any valid data from the block to a new block, tags all of the valid data pages as invalid, after which it will erase the block. Thus the threshold indication is a pre-erase command that instructs the system to identify invalid memory pages within a block and to erase any identified memory pages, thus creating an erased block.) the invalid memory blocks storing invalid data. (Bi [0034] discloses the blocks may be composed of pages, and each page may be valid (i.e. containing data), invalid (previously contained data but no longer contains valid data to be returned to the host.), and no data (i.e. is erased and available or has never been written and thus is available).
Regarding claim 2, Bi teaches all of the limitations of claim 1 above. Bi further teaches wherein the block status information comprises information about a size of one or more erased memory blocks of the plurality of memory blocks. (Bi [0034] that the system may track the number of pages that are valid, invalid, or contain no data (are erased) at a block level. Bi [0046] discloses the system may be configured based on block status information that is based on the quantity of free (i.e. erased blocks at the memory system). Bi [0041] discloses the system may be configured based on a percentage value, thus the status may return the percentage of erased memory blocks as a percentage of total blocks, thus is information about a size of one or more erased memory blocks.)
Regarding claim 3, Bi teaches all of the limitations of claim 2 above. Bi further teaches wherein the host is configured to provide the pre-erase command to the storage device based on the size of the one or more erased memory blocks being less than a threshold size. (Bi [0034] and [0041] discloses the system provides the validity threshold based on the percentage of erased/free blocks being within a threshold. Bi Fig. 3 and steps 340 and 345 discloses the system may look at the current available blocks and determine if the system should be more aggressive in performing garbage collection if the current available blocks does not meet a performance threshold. Thus will issue the Threshold indication 350 if the available blocks is less than a threshold size.)
Regarding claim 4, Bi teaches all of the limitations of claim 3 above. Bi further teaches
wherein the host includes a host memory, (Bi [0018] discloses the host system may include memory local to the host system 105.) and wherein the threshold size is based on a size of data being provided to the storage device, from among data stored in the host memory. (Bi [0043] discloses the memory system 210 stores data received from the host system, thus the data stored in the memory is data from among data stored in the host memory that was sent to the memory using a write command. Thus the validity threshold sent to the memory is based on a target performance threshold will be based on available blocks that is dependent upon (based on) the amount/size of data being provided to the storage device.)
Regarding claim 7, Bi teaches all of the limitations of claim 1 above. Bi further teaches wherein the block status information comprises an indication for the host to instruct the pre-erase operation, (Bi [0046]-[0048] discloses that the original request may include a plurality of threshold values and the memory may indicate the quantity of blocks that would satisfy each individual threshold which directs the host to determine if the amount of blocks that satisfy the threshold enables the memory to achieve the performance target, and thus drives the host to set the threshold indication. Thus the status information is an indication to the host to update the threshold indication (to instruct the pre-erase operation.)
and wherein the storage device is configured to generate the indication based on a size of one or more erased memory blocks of the plurality of memory blocks. (Bi [0062] discloses the status response may indicate the quality of blocks that are free which is an indication of the total size of a plurality of erased memory blocks.)
Regarding claim 10, Bi teaches all of the limitations of claim 1 above. Bi further teaches
wherein: the host is configured to: determine a size of memory blocks to be pre-erased in the pre-erase operation based on the block status information, (Bi [0012] and [0041] and [0048] discloses the status information may include the quantity of available data that includes erased data and the quantity of free blocks (which includes blocks that are unused or erased) as well as providing the number of blocks that would meet first and second tentative thresholds (the number of blocks that would be erased) for the first and second tentative thresholds, and will use this information to determine the threshold indication 350 which will meet a performance metric (such as storage capacity) that is expected to be produced as a result of the new threshold indication. ) and provide an indication of the size of the memory blocks to be pre-erased to the storage device; (Bi [0040]-[0041], [0048] and [0062] discloses the threshold indication sent at step 350 is a source validity threshold that will result in the system achieving a performance metrics such as storage capacity (which is an indication of how much data will be erased to free up blocks to achieve the performance capacity).)
and wherein the storage device is configured to perform the pre-erase operation on the invalid memory blocks based on the indication of the size of the memory blocks to be pre-erased. (Bi [0041] teaches the system will perform background garbage collection which creates erased blocks that achieve the performance target based on the source validity threshold that specifies on a block basis the data to garbage collect based on a % of invalid data (i.e. data to be erased).)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
A patent claim is unpatentable under 35 USC § 103 if the differences between the claimed subject matter and the prior art are such that the subject matter, as a whole, would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 406 (2007). “[H]owever, the analysis need not seek out precise teachings directed to the specific subject matter of the challenged claim, for a court can take account of the inferences and creative steps that a person of ordinary skill in the art would employ.” Id. at 418; see also In re Preda, 401 F.2d 825, 826 (CCPA 1968).
Per MPEP 2141: Examination Guidelines for Determining Obviousness Under 35 U.S.C. 103 [R-01.2024] and more specifically MPEP 2141:03 Level of Ordinary Skill in the Art [R-01.2024]: ‘Office personnel may also take into account "the inferences and creative steps that a person of ordinary skill in the art would employ."Id. at 418, 82 USPQ2d at 1396. ‘
Claims 5-6 and 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Bi (Bi 2025/0377822 A1 filed 5/20/2025 that claims priority to provisional application 63/658,709 filed 6/11/2024).
Regarding claim 5, Bi teaches all of the limitations of claim 1 above. Bi further teaches wherein one or more open blocks each comprise erased pages and programmed pages, (Consistent with para [0035] of the instant application, an open block may be a memory block in which some data is stored. Bi [0034] discloses a block may contain erased pages and valid (i.e. programmed data). Thus a blocks may contain erased pages and programmed pages and are an example of an open block.)
Bi further suggests and wherein the block status information comprises a size of the erased pages of the one or more open blocks. (Bi [0034] that the system may track the number of pages that are valid, invalid, or contain no data (are erased) at a block level. Bi [0046] discloses the system may be configured based on block status information that is based on the quantity of free valid to invalid data (where invalid data is not valid.. thus would include erase or previously written data that is not yet erased) Bi [0041] discloses the system may be configured based on a percentage value. Thus Bi suggests the status may return the percentage of erased memory blocks as a percentage of total blocks, thus is information about a total size of a plurality of (more than one) erased memory blocks.)
It would have been obvious to a person of ordinary skill in the art before the effectively filed date of the claimed invention to incorporate into the status returned to the host information about valid, invalid, and erased pages on a percentage basis. One would be motivated to do so to provide to the host the status information it is tracking in the formats (i.e. as a percentage basis) that the tool generally provides as the status percentage stated was merely an example of percentages the system may provide.
Regarding claim 6, The combination of Bi teaches all of the limitations of claim 5 above. Bi further teaches wherein the host includes a host memory; (Bi [0018] discloses the host system may include memory local to those system 105.)
and wherein the host is configured to provide the pre-erase command to the storage device based on a size of first data among data stored in the host memory being larger than the size of the erased pages, the first data being provided to the storage device. (Bi Fig 3 step 325 discloses the host may determine a target metric, such as percentage of erased blocks and may periodically determine if the target memory meets the metric. Bi [0060] discloses the system may set/update the threshold indication (the pre-erase command) based on the total size of data that the host system has queued for writing. Thus the host will update the threshold indication to be a more aggressive value that will garbage collect more blocks when it sees that the target memory does not have sufficient space to hold the target data (i.e. the first data that is queued on the host memory for transfer) is greater than the total size of the erased pages available to hold the data.)
Regarding claim 8, Bi teaches all of the limitations of claim 1 above.
Bi further suggests wherein the block status information comprises information about a proportion of erased memory blocks among a plurality of free blocks of the plurality of memory blocks, wherein the plurality of free blocks includes the invalid memory blocks. (Bi [0062] discloses the status may comprise an indication of the quality of free blocks (e.g., erase blocks) and/or may include the number of blocks that meet a threshold. Bi [0041] discloses a threshold may be expressed as a percentage of valid data. Thus indicates a proportion of valid data compared to data that is erased or may be erased. Therefore this indicates a portion of the erased and/or invalid blocks as it is equal to 1 – the proportion of valid data (e.g.. if 75% of the data is valid, then 25% of the data is a free block.)
It would have been obvious to a person of ordinary skill in the art before the effectively filed date of the claimed invention to incorporate into the status returned to the host information about valid, invalid, and erased pages which would enable the host to compute the proportion of erased memory blocks to free blocks. One would be motivated to do so to provide to the host the status information it is tracking, to enable the host to determine what percentage of the storage space is erased and completely available for writing without further action on the storage device part to enable the host to estimate if more/less aggressive garbage collection policies should be implemented and enable the host controlled block maintenance design of Bi to optimize the times spent with garbage collection while ensuring sufficient blocks are immediately available for write operations.
Regarding claim 9, Bi teaches all of the limitations of claim 8 above. Bi further teaches wherein the host is configured to provide the pre-erase command to the storage device based on the proportion being higher than a threshold level. (Bi [0062] discloses the status may comprise an indication of the quality of free blocks (e.g., erase blocks) and/or may include the number of blocks that meet a threshold. Bi [0041] discloses a threshold may be expressed as a percentage of valid data. Thus indicates a proportion of valid data compared to data that is erased or may be erased. Therefore this indicates a portion of the erased and/or invalid blocks as it is equal to 1 – the proportion of valid data (e.g.. if 75% of the data is valid, then 25% of the data is a free block and if the % of free blocks are above a threshold, the system may perform less aggressive garbage collection by sending an updated threshold indication at step 350.)
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JANICE M. GIROUARD whose telephone number is (469)295-9131. The examiner can normally be reached M-F 9:30 - 7:30.
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/JANICE M. GIROUARD/Primary Examiner, Art Unit 2138
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