DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed on 07/07/2026 has been considered by Examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5, and 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al (US 2016/0351122 A1) in view of Kang et al (US 2022/0189403 A1), Zhou et al (CN 114842802 A; See US 2023/0419907 A1 for official translations and rejection citations), and Ka et al (US 2023/0197010 A1).
Claim 1, Jung (Fig. 1-13) discloses a pixel driving circuit (Fig. 3; Paragraph [0054]), comprising a data input circuit (T1; Fig. 3), a reset circuit (T2; Fig. 3), an energy storage circuit (Cst; Fig. 3), a light-emitting control circuit (DT; Fig. 3), a compensation circuit (T6; Fig. 3), a first switch-circuit (T4; Fig. 3), a second switch-circuit (T3; Fig. 3), and a third switch-circuit (T5; Fig. 3);
wherein an output end of the reset circuit (T2; Fig. 3) is electrically connected to a second control end (Node A; Fig. 3) of the light-emitting control circuit (DT; Fig. 3), and the reset circuit (T2; Fig. 3) is configured to output a reference voltage (ELVDD; Fig. 3; wherein applies a voltage of ELVDD; claim is broadly written to read on a voltage level being applied to gate of driving transistor therefore claim needs to be more specific to the voltage level being applied) to the second control end (Node A; Fig. 3) of the light-emitting control circuit (DT; Fig. 3) according to a second scanning signal (Scan(j-1); Fig. 3) in a reset phase (Tj; Fig. 4; Fig. 5A; wherein discloses an initial period);
a second end (Node C; Fig. 3) of the light-emitting control circuit (DT; Fig. 3) is electrically connected to the first switch-circuit (T4; Fig. 3), the first end (Node B; Fig. 3) of the light-emitting control circuit (DT; Fig. 3) is configured to be electrically connected to an anode (Node D; fig. 3) of a light-emitting device (OLED; Fig. 3) through the second switch-circuit (T3; Fig. 3; Fig. 5C), and the light-emitting control circuit (DT; Fig. 5C) is configured to output a driving current (Ioled; Fig. 5C) to the light-emitting device (OLED; Fig. 5C) in a light-emitting phase (Te; Fig. 4);
an output end (Node D; Fig. 3) of the compensation circuit (T6; Fig. 3) is configured to be electrically connected to the anode (Node D; Fig. 3) of the light-emitting device (OLED; Fig. 3);
one end (Node A; Fig. 3) of the energy storage circuit (Cst; Fig. 3) is electrically connected to the output end (Node A; Fig. 3) of the reset circuit (T2; Fig. 3), and the other end (Node D; Fig. 3) of the energy storage circuit (Cst; Fig. 3) is electrically connected to the output end (Node D; Fig. 3) of the compensation circuit (T6; Fig. 3);
one end (Node A; Fig. 3) of the third switch-circuit (T5; Fig. 3) is electrically connected to the output end (Node A; Fig. 3) of the reset circuit (T2; Fig. 3), and the other end (Node C; Fig. 3) of the third switch-circuit (T5; Fig. 3) is electrically connected to the second end (Node C; Fig. 3) of the light-emitting control circuit (DT; Fig. 3); and
wherein the compensation circuit (T6; Fig. 3) and the third switch-circuit (T5; Fig. 3) are configured to be turned on (Fig. 5B; wherein figure shows both transistors T6 and T5 being turned on) according to the first scanning signal (SCAN(j); Fig. 3 and 5B) in the data-writing phase (Ts; Fig. 4); and
the first switch-circuit (T4; Fig. 3) and the second switch-circuit (T3; Fig. 3) are configured to be turned on (Fig. 3; Paragraph [0063-0064]; wherein discloses both T3 and T4 are turned on by jth emission signal EM(j) and therefore enabled at the same time during Te of figure 4) according to an enable signal (EM(j); Fig. 3 and 4) in the light-emitting phase (Te; Fig. 4);
in the reset phase (Tj; Fig. 4), the first scanning signal (SCAN(j); Fig. 4) is at a low potential (Paragraph [0073]; wherein discloses “During the initial period Tj, the (j−1)th scan signal SCAN(j−1) is input at the high-voltage level, and the jth scan signal SCAN(j) and the emission signal EM(j) are input at the low-voltage level”), the second scanning signal (SCAN(j-1); Fig. 4) is at a high potential (Paragraph [0073]; wherein discloses “During the initial period Tj, the (j−1)th scan signal SCAN(j−1) is input at the high-voltage level, and the jth scan signal SCAN(j) and the emission signal EM(j) are input at the low-voltage level”), and the enable signal (EM(j); Fig. 4) is at a low potential (Paragraph [0073]; wherein discloses “During the initial period Tj, the (j−1)th scan signal SCAN(j−1) is input at the high-voltage level, and the jth scan signal SCAN(j) and the emission signal EM(j) are input at the low-voltage level”);
in the light-emitting phase (Te; Fig. 4), the first scanning signal (SCAN(j); Fig. 4) is at a low potential (Paragraph [0079]; wherein discloses “During the light emission period Te, the (j−1)th scan signal SCAN(j−1) and jth scan signal SCAN(j) are input at the low-voltage level (turn-off voltage), and the emission signal EM(j) is inverted to the high-voltage level (turn-on voltage)”), the second scanning signal (SCAN(j-1; Fig. 4) is at a low potential (Paragraph [0079]; wherein discloses “During the light emission period Te, the (j−1)th scan signal SCAN(j−1) and jth scan signal SCAN(j) are input at the low-voltage level (turn-off voltage), and the emission signal EM(j) is inverted to the high-voltage level (turn-on voltage)”), and the enable signal (EM(j); Fig. 4) is at a high potential (Paragraph [0079]; wherein discloses “During the light emission period Te, the (j−1)th scan signal SCAN(j−1) and jth scan signal SCAN(j) are input at the low-voltage level (turn-off voltage), and the emission signal EM(j) is inverted to the high-voltage level (turn-on voltage)”).
Jung does not expressly disclose wherein the data input circuit is electrically connected to a first end of the light-emitting control circuit and a first control end of the light-emitting control circuit, and is configured to output a data signal to the first control end of the light-emitting control circuit according to a first scanning signal in a data-writing phase.
Kang (Fig. 8 and 9) discloses wherein the data input circuit (T1; Fig. 8) is electrically connected to a first end (N3; Fig. 2; wherein figure shows electrode of T2 connected to node N3) of the light-emitting control circuit (T2; Fig. 8) and a first control end (N3; Fig. 8; wherein figure shows a second gate node connected to node N3) of the light-emitting control circuit (T2; Fig. 8), and is configured to output a data signal (Vdata; Fig. 8) to the first control end (N3; Fig. 8; wherein figure shows a second gate node connected to node N3) of the light-emitting control circuit (T2; Fig. 8) according to a first scanning signal (SC2; Fig. 8) in a data-writing phase (S220; Fig. 9).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung’s pixel driving circuit by applying a driving transistor, as taught by Kang, so to use a pixel driving circuit with a driving transistor for providing e a display device and a driving method thereof to eliminate a deviation of the reset voltage and prevent an afterimage or residual image occurring during driving (Paragraph [0008).
Jung in view of Kang does not expressly disclose in the reset phase, the first scanning signal is at a low potential, the second scanning signal is at a high potential, the enable signal is at a low potential, and the data signal is at a low potential; and
in the light-emitting phase, the first scanning signal is at a low potential, the second scanning signal is at a low potential, the enable signal is at a high potential, and the data signal is at a low potential.
Zhou (Fig. 1-6) discloses in the reset phase (reset; Fig. 4), the first scanning signal (S2; Fig. 4) is at a low potential (Fig. 4; wherein figure shows S2 at a low potential), the second scanning signal (S1; Fig. 4) is at a high potential (Fig. 4; wherein figure shows S1 at a high potential), the enable signal (EM; Fig. 4) is at a low potential (Fig. 4; wherein figure shows EM at a low potential), and the data signal (Data; Fig. 4) is at a low potential (Fig. 4; wherein figure shows Data at a low potential); and
in the light-emitting phase (luminescence; Fig. 4), the first scanning signal (S2; Fig. 4) is at a low potential (Fig. 4; wherein figure shows S2 at a low potential), the second scanning signal (S1; Fig. 4) is at a low potential (Fig. 4; wherein figure shows S1 at a low potential), the enable signal (EM; Fig. 4) is at a high potential (Fig. 4; wherein figure shows ME at a high potential), and the data signal (Data; Fig. 4) is at a low potential (Fig. 4; wherein figure shows Data at a low potential).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung in view of Kang’s pixel driving circuit by applying a driving method, as taught by Zhou, so to use a pixel driving circuit with a driving method for providing the characteristics of the switching element of the driving transistor are ensured, a homogeneous luminance effect of the display panel is realized, and the display effect and the stability of displaying of the display panel are improved (Paragraph [0028]).
Jung in view of Kang and Zhou does not expressly disclose the first scanning signal is output by a first scanning line, the second scanning signal is output by a second scanning line, and the first scanning line and the second scanning line are shared.
Ka (Fig. 1-14) discloses the first scanning signal (Si; Fig. 2) is output by a first scanning line (S1; Fig. 1; wherein scan line S1 provides the scanning signal Si for the current row of pixels), the second scanning signal (Si-1; Fig. 2) is output by a second scanning line (S1; Fig. 1; wherein scan line S1 provides the scanning signal Si-1 for the next row of pixels), and the first scanning line (Si; Fig. 2; S1 Fig. 1; wherein current row of pixels receives the scanning signal S1 as the Si signal in figure 2) and the second scanning line (Si-1; Fig. 2; S1 Fig. 1; wherein next row of pixels receives the scanning signal S1 as the Si-1 signal in figure 2) are shared (Fig. 1; wherein figure clearly shows the scanning signal S1 connected to adjacent rows of pixels to apply both Si and Si-1 signals).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung in view of Kang and Zhou’s pixel driving circuit by applying shared scanning lines, as taught by Ka, so to use a pixel driving circuit with shared scanning lines for providing a display device capable of removing or reducing a color dragging phenomenon by controlling an initialization voltage according to a luminance condition and a driving method of the display device (Paragraph [0010]).
Claim 2, Jung (Fig. 1-13) discloses wherein the reset circuit (T2; Fig. 3) comprises a reset transistor (T2; Fig. 3), a first electrode (Node A; Fig. 3) of the reset transistor (T2; Fig. 3) is electrically connected to the second control end (Node A; Fig. 3) of the light-emitting control circuit (DT; Fig. 3), the reset transistor (T2; Fig. 3) is configured to receive the reference voltage (ELVDD; Fig. 3; wherein applies a voltage of ELVDD; claim is broadly written to read on a voltage level being applied to gate of driving transistor therefore claim needs to be more specific to the voltage level being applied) through a second electrode of the reset transistor (T2; Fig. 3), and the reset transistor (T2; Fig. 3) is configured to receive the second scanning signal (SCAN(j-1); Fig. 3) through a gate of the reset transistor (T2; Fig. 3).
Claim 3, Ka (Fig. 1-14) discloses wherein the first scanning signal (Si; Fig. 2; S2; Fig. 1; wherein current row of pixels (PX21-PX2m) receives the scanning signal S2 as the Si signal in figure 2) is a scanning signal (S2; Fig. 1) at a present phase (S2; Fig. 1; wherein scan line S2 provides the scanning signal Si for the current row of pixels), and the second scanning signal (Si-1; Fig. 2; S1; Fig. 1; wherein the current row of pixels (PX21-PX2m) receives the scanning signal S1 as the Si-1 signal in figure 2) is a scanning signal (S1; Fig. 1) at a previous phase (S1; Fig. 1; wherein previous row of pixels (PX11-PX1m) receives the scanning signal S1 as the Si signal in figure 2).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung in view of Kang and Zhou’s pixel driving circuit by applying shared scanning lines, as taught by Ka, so to use a pixel driving circuit with shared scanning lines for providing a display device capable of removing or reducing a color dragging phenomenon by controlling an initialization voltage according to a luminance condition and a driving method of the display device (Paragraph [0010]).
Claim 5, Zhou (Fig. 1-6) discloses wherein in the data-writing phase (compensation and writing; Fig. 4), the first scanning signal (S2; Fig. 4) is at a high potential (Fig. 4; wherein figure shows S2 at a high potential), the second scanning signal (S1; Fig. 4) is at a low potential (Fig. 4; wherein figure shows S1 at a low potential), the enable signal (EM; Fig. 4) is at a low potential (Fig. 4; wherein figure shows EM at a low potential), and the data signal (Data; Fig. 4) is at a high potential (Fig. 4; wherein figure shows Data at a high potential).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung in view of Kang’s pixel driving circuit by applying a driving method, as taught by Zhou, so to use a pixel driving circuit with a driving method for providing the characteristics of the switching element of the driving transistor are ensured, a homogeneous luminance effect of the display panel is realized, and the display effect and the stability of displaying of the display panel are improved (Paragraph [0028]).
Claim 7, Kang (Fig. 8 and 9) discloses wherein the data input circuit (T1; Fig. 8) comprises a writing transistor (T1; Fig. 8), the writing transistor (T1; Fig. 8) is configured to receive the data signal (Vdata; Fig. 8) through a first electrode of the writing transistor (T1; Fig. 8), a second electrode (N3; Fig. 8) of the writing transistor (T1; Fig. 8) is electrically connected to an output end (N3; Fig. 8) of the light-emitting control circuit (T2; Fig. 8) and the first control end (N3; Fig. 8; wherein figure shows second gate node of T2 connected to N3) of the light-emitting control circuit (T2; Fig. 8), and the writing transistor (T1; Fig. 8) is configured to receive the first scanning signal (SC2; Fig. 8 and 9) through a gate of the writing transistor (T1; Fig. 8).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung’s pixel driving circuit by applying a driving transistor, as taught by Kang, so to use a pixel driving circuit with a driving transistor for providing e a display device and a driving method thereof to eliminate a deviation of the reset voltage and prevent an afterimage or residual image occurring during driving (Paragraph [0008).
Claim 8, Jung (Fig. 1-13) discloses wherein the first switch-circuit (T4; Fig. 3) comprises a first transistor (T4; Fig. 3), the second switch-circuit (T3; Fig. 3) comprises a second transistor (T3; Fig. 3), the first transistor (T4; Fig. 3) is configured to receive the enable signal (EM(j); Fig. 3) through a gate of the first transistor (T4; Fig. 3), and the second transistor (T3; Fig. 4) is configured to receive the enable signal (EM(j); Fig. 3) through a gate of the second transistor (T3; Fig. 3).
Claim 9, Jung (Fig. 1-13) discloses wherein the third switch-circuit (T5; Fig. 3) comprises a third transistor (T5; Fig. 3), a first electrode (Node C; Fig. 3) of the third transistor (T5; Fig. 3) is electrically connected to an input end (Node C; Fig. 3) of the light-emitting control circuit (DT; Fig. 3), a second electrode (Node A; Fig. 3) of the third transistor (T5; Fig. 3) is electrically connected to the output end (Node A; Fig. 3) of the reset circuit (T2; Fig. 3), and the third transistor (T5; Fig. 3) is configured to receive the first scanning signal (SCAN(j); Fig. 3) through a gate of the third transistor (T5; Fig. 3); and
the third transistor (T5; Fig. 3) is an Indium Gallium Zinc Oxide (IGZO) transistor (Paragraph [0049]; wherein discloses the semiconductor layer of the transistors within each pixel maybe comprised of “IGZO (indium gallium zinc oxide)”).
Claim 10, Jung (Fig. 1-13) discloses wherein the compensation circuit (T6; Fig. 3) comprises a fourth transistor (T6; Fig. 3), the fourth transistor (T6; Fig. 3) is configured to receive the first scanning signal (SCAN(j); Fig. 3) through a gate of the fourth transistor (T6; Fig. 3), the fourth transistor (T6; Fig. 3) is configured to receive the reference voltage (Vini; Fig. 3) through a first electrode of the fourth transistor (T6; Fig. 3), and a second electrode (Node D; Fig. 3) of the fourth transistor (T6; Fig. 3) is configured to be electrically connected to the anode (Node D; Fig. 3) of the light-emitting device (OLED; Fig. 3).
Claims 11-13, 15, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al (US 2016/0351122 A1) in view of Kang et al (US 2022/0189403 A1), Zhou et al (CN 114842802 A; See US 2023/0419907 A1 for official translations and rejection citations), Ka et al (US 2023/0197010 A1), and Fang et al (US 2025/0185435 A1).
Claim 11, Jung (Fig. 1-13) discloses a display device (Fig. 2), comprising a plurality of light-emitting devices (PXL(1)-PXL(N); Fig. 3) distributed in an array (Paragraph [0130]) and a pixel driving circuit (Fig. 3), and the pixel driving circuit (Fig. 3; Paragraph [0054]) comprises a data input circuit (T1; Fig. 3), a reset circuit (T2; Fig. 3), an energy storage circuit (Cst; Fig. 3), a light-emitting control circuit (DT; Fig. 3), a compensation circuit (T6; Fig. 3), a first switch-circuit (T4; Fig. 3), a second switch-circuit (T3; Fig. 3), and a third switch-circuit (T5; Fig. 3);
wherein an output end of the reset circuit (T2; Fig. 3) is electrically connected to a second control end (Node A; Fig. 3) of the light-emitting control circuit (DT; Fig. 3), and the reset circuit (T2; Fig. 3) is configured to output a reference voltage (ELVDD; Fig. 3; wherein applies a voltage of ELVDD; claim is broadly written to read on a voltage level being applied to gate of driving transistor therefore claim needs to be more specific to the voltage level being applied) to the second control end (Node A; Fig. 3) of the light-emitting control circuit (DT; Fig. 3) according to a second scanning signal (Scan(j-1); Fig. 3) in a reset phase (Tj; Fig. 4; Fig. 5A; wherein discloses an initial period);
a second end (Node C; Fig. 3) of the light-emitting control circuit (DT; Fig. 3) is electrically connected to the first switch-circuit (T4; Fig. 3), the first end (Node B; Fig. 3) of the light-emitting control circuit (DT; Fig. 3) is configured to be electrically connected to an anode (Node D; fig. 3) of a light-emitting device (OLED; Fig. 3) through the second switch-circuit (T3; Fig. 3; Fig. 5C), and the light-emitting control circuit (DT; Fig. 5C) is configured to output a driving current (Ioled; Fig. 5C) to the light-emitting device (OLED; Fig. 5C) in a light-emitting phase (Te; Fig. 4);
an output end (Node D; Fig. 3) of the compensation circuit (T6; Fig. 3) is configured to be electrically connected to the anode (Node D; Fig. 3) of the light-emitting device (OLED; Fig. 3);
one end (Node A; Fig. 3) of the energy storage circuit (Cst; Fig. 3) is electrically connected to the output end (Node A; Fig. 3) of the reset circuit (T2; Fig. 3), and the other end (Node D; Fig. 3) of the energy storage circuit (Cst; Fig. 3) is electrically connected to the output end (Node D; Fig. 3) of the compensation circuit (T6; Fig. 3);
one end (Node A; Fig. 3) of the third switch-circuit (T5; Fig. 3) is electrically connected to the output end (Node A; Fig. 3) of the reset circuit (T2; Fig. 3), and the other end (Node C; Fig. 3) of the third switch-circuit (T5; Fig. 3) is electrically connected to the second end (Node C; Fig. 3) of the light-emitting control circuit (DT; Fig. 3); and
wherein the compensation circuit (T6; Fig. 3) and the third switch-circuit (T5; Fig. 3) are configured to be turned on (Fig. 5B; wherein figure shows both transistors T6 and T5 being turned on) according to the first scanning signal (SCAN(j); Fig. 3 and 5B) in the data-writing phase (Ts; Fig. 4); and
the first switch-circuit (T4; Fig. 3) and the second switch-circuit (T3; Fig. 3) are configured to be turned on (Fig. 3; Paragraph [0063-0064]; wherein discloses both T3 and T4 are turned on by jth emission signal EM(j) and therefore enabled at the same time during Te of figure 4) according to an enable signal (EM(j); Fig. 3 and 4) in the light-emitting phase (Te; Fig. 4);
in the reset phase (Tj; Fig. 4), the first scanning signal (SCAN(j); Fig. 4) is at a low potential (Paragraph [0073]; wherein discloses “During the initial period Tj, the (j−1)th scan signal SCAN(j−1) is input at the high-voltage level, and the jth scan signal SCAN(j) and the emission signal EM(j) are input at the low-voltage level”), the second scanning signal (SCAN(j-1); Fig. 4) is at a high potential (Paragraph [0073]; wherein discloses “During the initial period Tj, the (j−1)th scan signal SCAN(j−1) is input at the high-voltage level, and the jth scan signal SCAN(j) and the emission signal EM(j) are input at the low-voltage level”), and the enable signal (EM(j); Fig. 4) is at a low potential (Paragraph [0073]; wherein discloses “During the initial period Tj, the (j−1)th scan signal SCAN(j−1) is input at the high-voltage level, and the jth scan signal SCAN(j) and the emission signal EM(j) are input at the low-voltage level”);
in the light-emitting phase (Te; Fig. 4), the first scanning signal (SCAN(j); Fig. 4) is at a low potential (Paragraph [0079]; wherein discloses “During the light emission period Te, the (j−1)th scan signal SCAN(j−1) and jth scan signal SCAN(j) are input at the low-voltage level (turn-off voltage), and the emission signal EM(j) is inverted to the high-voltage level (turn-on voltage)”), the second scanning signal (SCAN(j-1; Fig. 4) is at a low potential (Paragraph [0079]; wherein discloses “During the light emission period Te, the (j−1)th scan signal SCAN(j−1) and jth scan signal SCAN(j) are input at the low-voltage level (turn-off voltage), and the emission signal EM(j) is inverted to the high-voltage level (turn-on voltage)”), and the enable signal (EM(j); Fig. 4) is at a high potential (Paragraph [0079]; wherein discloses “During the light emission period Te, the (j−1)th scan signal SCAN(j−1) and jth scan signal SCAN(j) are input at the low-voltage level (turn-off voltage), and the emission signal EM(j) is inverted to the high-voltage level (turn-on voltage)”).
Jung does not expressly disclose wherein the data input circuit is electrically connected to a first end of the light-emitting control circuit and a first control end of the light-emitting control circuit, and is configured to output a data signal to the first control end of the light-emitting control circuit according to a first scanning signal in a data-writing phase.
Kang (Fig. 8 and 9) discloses wherein the data input circuit (T1; Fig. 8) is electrically connected to a first end (N3; Fig. 2; wherein figure shows electrode of T2 connected to node N3) of the light-emitting control circuit (T2; Fig. 8) and a first control end (N3; Fig. 8; wherein figure shows a second gate node connected to node N3) of the light-emitting control circuit (T2; Fig. 8), and is configured to output a data signal (Vdata; Fig. 8) to the first control end (N3; Fig. 8; wherein figure shows a second gate node connected to node N3) of the light-emitting control circuit (T2; Fig. 8) according to a first scanning signal (SC2; Fig. 8) in a data-writing phase (S220; Fig. 9).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung’s pixel driving circuit by applying a driving transistor, as taught by Kang, so to use a pixel driving circuit with a driving transistor for providing e a display device and a driving method thereof to eliminate a deviation of the reset voltage and prevent an afterimage or residual image occurring during driving (Paragraph [0008).
Jung in view of Kang does not expressly disclose in the reset phase, the first scanning signal is at a low potential, the second scanning signal is at a high potential, the enable signal is at a low potential, and the data signal is at a low potential; and
in the light-emitting phase, the first scanning signal is at a low potential, the second scanning signal is at a low potential, the enable signal is at a high potential, and the data signal is at a low potential.
Zhou (Fig. 1-6) discloses in the reset phase (reset; Fig. 4), the first scanning signal (S2; Fig. 4) is at a low potential (Fig. 4; wherein figure shows S2 at a low potential), the second scanning signal (S1; Fig. 4) is at a high potential (Fig. 4; wherein figure shows S1 at a high potential), the enable signal (EM; Fig. 4) is at a low potential (Fig. 4; wherein figure shows EM at a low potential), and the data signal (Data; Fig. 4) is at a low potential (Fig. 4; wherein figure shows Data at a low potential); and
in the light-emitting phase (luminescence; Fig. 4), the first scanning signal (S2; Fig. 4) is at a low potential (Fig. 4; wherein figure shows S2 at a low potential), the second scanning signal (S1; Fig. 4) is at a low potential (Fig. 4; wherein figure shows S1 at a low potential), the enable signal (EM; Fig. 4) is at a high potential (Fig. 4; wherein figure shows ME at a high potential), and the data signal (Data; Fig. 4) is at a low potential (Fig. 4; wherein figure shows Data at a low potential).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung in view of Kang’s pixel driving circuit by applying a driving method, as taught by Zhou, so to use a pixel driving circuit with a driving method for providing the characteristics of the switching element of the driving transistor are ensured, a homogeneous luminance effect of the display panel is realized, and the display effect and the stability of displaying of the display panel are improved (Paragraph [0028]).
Jung in view of Kang and Zhou does not expressly disclose the first scanning signal is output by a first scanning line, the second scanning signal is output by a second scanning line, and the first scanning line and the second scanning line are shared.
Ka (Fig. 1-14) discloses the first scanning signal (Si; Fig. 2) is output by a first scanning line (S1; Fig. 1; wherein scan line S1 provides the scanning signal Si for the current row of pixels), the second scanning signal (Si-1; Fig. 2) is output by a second scanning line (S1; Fig. 1; wherein scan line S1 provides the scanning signal Si-1 for the next row of pixels), and the first scanning line (Si; Fig. 2; S1 Fig. 1; wherein current row of pixels receives the scanning signal S1 as the Si signal in figure 2) and the second scanning line (Si-1; Fig. 2; S1 Fig. 1; wherein next row of pixels receives the scanning signal S1 as the Si-1 signal in figure 2) are shared (Fig. 1; wherein figure clearly shows the scanning signal S1 connected to adjacent rows of pixels to apply both Si and Si-1 signals).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung in view of Kang and Zhou’s pixel driving circuit by applying shared scanning lines, as taught by Ka, so to use a pixel driving circuit with shared scanning lines for providing a display device capable of removing or reducing a color dragging phenomenon by controlling an initialization voltage according to a luminance condition and a driving method of the display device (Paragraph [0010]).
Jung in view of Kang, Zhou, and Ka does not expressly disclose wherein the pixel driving circuit is configured to drive the plurality of light-emitting devices to operate;
the light-emitting control circuit (T3; Fig. 11) is configured to output a driving current to each of the plurality of light-emitting devices in a light-emitting phase; and
an output end of the compensation circuit is electrically connected to the anode of each of the plurality of light-emitting devices.
Feng (Fig. 10-11) discloses wherein the pixel driving circuit (Fig. 10) is configured to drive (Fig. 11) the plurality of light-emitting devices (EL1 and EL2; Fig. 10) to operate (Fig. 11);
the light-emitting control circuit (T3; Fig. 10) is configured to output a driving current (Paragraph [0174]) to each of the plurality of light-emitting devices (EL1 and EL2; Fig. 10) in a light-emitting phase (Paragraph [0173]); and
an output end (N4; Fig. 10) of the compensation circuit (T7; Fig. 10) is electrically connected to the anode (N4; Fig. 10) of each of the plurality of light-emitting devices EL1 and EL2; Fig. 11).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung in view of Kang, Zhou, and Ka’s pixel driving circuit by applying multiple light emitting devices, as taught by Feng, so to use a pixel driving circuit with multiple light emitting devices for providing by the embodiment of the present disclosure, by reducing a quantity of first type pixel circuits in the light-transmitting display region (Paragraph [0123]).
Claim 12, Jung (Fig. 1-13) discloses wherein the reset circuit (T2; Fig. 3) comprises a reset transistor (T2; Fig. 3), a first electrode (Node A; Fig. 3) of the reset transistor (T2; Fig. 3) is electrically connected to the second control end (Node A; Fig. 3) of the light-emitting control circuit (DT; Fig. 3), the reset transistor (T2; Fig. 3) is configured to receive the reference voltage (ELVDD; Fig. 3; wherein applies a voltage of ELVDD; claim is broadly written to read on a voltage level being applied to gate of driving transistor therefore claim needs to be more specific to the voltage level being applied) through a second electrode of the reset transistor (T2; Fig. 3), and the reset transistor (T2; Fig. 3) is configured to receive the second scanning signal (SCAN(j-1); Fig. 3) through a gate of the reset transistor (T2; Fig. 3).
Claim 13, Ka (Fig. 1-14) discloses wherein the first scanning signal (Si; Fig. 2; S2; Fig. 1; wherein current row of pixels (PX21-PX2m) receives the scanning signal S2 as the Si signal in figure 2) is a scanning signal (S2; Fig. 1) at a present phase (S2; Fig. 1; wherein scan line S2 provides the scanning signal Si for the current row of pixels), and the second scanning signal (Si-1; Fig. 2; S1; Fig. 1; wherein the current row of pixels (PX21-PX2m) receives the scanning signal S1 as the Si-1 signal in figure 2) is a scanning signal (S1; Fig. 1) at a previous phase (S1; Fig. 1; wherein previous row of pixels (PX11-PX1m) receives the scanning signal S1 as the Si signal in figure 2).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung in view of Kang and Zhou’s pixel driving circuit by applying shared scanning lines, as taught by Ka, so to use a pixel driving circuit with shared scanning lines for providing a display device capable of removing or reducing a color dragging phenomenon by controlling an initialization voltage according to a luminance condition and a driving method of the display device (Paragraph [0010]).
Claim 15, Zhou (Fig. 1-6) discloses wherein in the data-writing phase (compensation and writing; Fig. 4), the first scanning signal (S2; Fig. 4) is at a high potential (Fig. 4; wherein figure shows S2 at a high potential), the second scanning signal (S1; Fig. 4) is at a low potential (Fig. 4; wherein figure shows S1 at a low potential), the enable signal (EM; Fig. 4) is at a low potential (Fig. 4; wherein figure shows EM at a low potential), and the data signal (Data; Fig. 4) is at a high potential (Fig. 4; wherein figure shows Data at a high potential).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung in view of Kang’s pixel driving circuit by applying a driving method, as taught by Zhou, so to use a pixel driving circuit with a driving method for providing the characteristics of the switching element of the driving transistor are ensured, a homogeneous luminance effect of the display panel is realized, and the display effect and the stability of displaying of the display panel are improved (Paragraph [0028]).
Claim 17, Kang (Fig. 8 and 9) discloses wherein the data input circuit (T1; Fig. 8) comprises a writing transistor (T1; Fig. 8), the writing transistor (T1; Fig. 8) is configured to receive the data signal (Vdata; Fig. 8) through a first electrode of the writing transistor (T1; Fig. 8), a second electrode (N3; Fig. 8) of the writing transistor (T1; Fig. 8) is electrically connected to an output end (N3; Fig. 8) of the light-emitting control circuit (T2; Fig. 8) and the first control end (N3; Fig. 8; wherein figure shows second gate node of T2 connected to N3) of the light-emitting control circuit (T2; Fig. 8), and the writing transistor (T1; Fig. 8) is configured to receive the first scanning signal (SC2; Fig. 8 and 9) through a gate of the writing transistor (T1; Fig. 8).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung’s pixel driving circuit by applying a driving transistor, as taught by Kang, so to use a pixel driving circuit with a driving transistor for providing e a display device and a driving method thereof to eliminate a deviation of the reset voltage and prevent an afterimage or residual image occurring during driving (Paragraph [0008).
Claim 18, Jung (Fig. 1-13) discloses wherein the first switch-circuit (T4; Fig. 3) comprises a first transistor (T4; Fig. 3), the second switch-circuit (T3; Fig. 3) comprises a second transistor (T3; Fig. 3), the first transistor (T4; Fig. 3) is configured to receive the enable signal (EM(j); Fig. 3) through a gate of the first transistor (T4; Fig. 3), and the second transistor (T3; Fig. 4) is configured to receive the enable signal (EM(j); Fig. 3) through a gate of the second transistor (T3; Fig. 3).
Claim 19, Jung (Fig. 1-13) discloses wherein the third switch-circuit (T5; Fig. 3) comprises a third transistor (T5; Fig. 3), a first electrode (Node C; Fig. 3) of the third transistor (T5; Fig. 3) is electrically connected to an input end (Node C; Fig. 3) of the light-emitting control circuit (DT; Fig. 3), a second electrode (Node A; Fig. 3) of the third transistor (T5; Fig. 3) is electrically connected to the output end (Node A; Fig. 3) of the reset circuit (T2; Fig. 3), and the third transistor (T5; Fig. 3) is configured to receive the first scanning signal (SCAN(j); Fig. 3) through a gate of the third transistor (T5; Fig. 3); and
the third transistor (T5; Fig. 3) is an Indium Gallium Zinc Oxide (IGZO) transistor (Paragraph [0049]; wherein discloses the semiconductor layer of the transistors within each pixel maybe comprised of “IGZO (indium gallium zinc oxide)”).
Claim 20, Feng (Fig. 10-11) discloses wherein the compensation circuit (T7; Fig. 10) comprises a fourth transistor (T7; Fig. 10), the fourth transistor (T7; Fig. 10) is configured to receive the first scanning signal (Gate; Fig. 10) through a gate of the fourth transistor (T7; Fig. 10), the fourth transistor (T7; Fig. 10) is configured to receive the reference voltage (INIT; Fig. 10) through a first electrode of the fourth transistor (T7; Fig. 10), and a second electrode (N4; Fig. 10) of the fourth transistor (T7; Fig. 10) is configured to be electrically connected to the anode (T7; Fig. 10) of each of the plurality of the light-emitting device (EL1 and EL2; Fig. 10).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Jung in view of Kang, Zhou, and Ka’s pixel driving circuit by applying multiple light emitting devices, as taught by Feng, so to use a pixel driving circuit with multiple light emitting devices for providing by the embodiment of the present disclosure, by reducing a quantity of first type pixel circuits in the light-transmitting display region (Paragraph [0123]).
Response to Arguments
Applicant's arguments with respect to claims 1-3, 5, 7-13, 15, and 17-20 have been considered but are moot in view of the new ground(s) of rejection.
In view of arguments, the references of Jung et al (US 2016/0351122 A1), Kang et al (US 2022/0189403 A1), Zhou et al (CN 11484280c A; See US 2023/0419907 A1 for official translations and rejection citations), Ka et al (US 2023/0197010 A1), and Fang et al (US 2025/0185435 A1) have been used for new ground rejection.
Claim 1 is rejected in view of newly discovered reference(s) to Jung et al (US 2016/0351122 A1), Kang et al (US 2022/0189403 A1), Zhou et al (CN 114842802 A; See US 2023/0419907 A1 for official translations and rejection citations), Ka et al (US 2023/0197010 A1).
Claim 11 is rejected in view of newly discovered reference(s) to Jung et al (US 2016/0351122 A1), Kang et al (US 2022/0189403 A1), Zhou et al (CN 114842802 A; See US 2023/0419907 A1 for official translations and rejection citations), Ka et al (US 2023/0197010 A1), and Fang et al (US 2025/0185435 A1).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/Adam J Snyder/Primary Examiner, Art Unit 2623 09/01/2026
