Prosecution Insights
Last updated: October 26, 2026
Application No. 19/319,018

COORDINATED ERROR PROTECTION

Non-Final OA §DP
Filed
Sep 04, 2025
Priority
Dec 28, 2021 — provisional 63/294,289 +2 more
Examiner
DUNCAN, MARC M
Art Unit
2113
Tech Center
2100 — Computer Architecture & Software
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
1y 2m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
760 granted / 871 resolved
+32.3% vs TC avg
Moderate +8% lift
Without
With
+7.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
8 currently pending
Career history
891
Total Applications
across all art units

Statute-Specific Performance

§101
15.9%
-24.1% vs TC avg
§103
29.7%
-10.3% vs TC avg
§102
24.6%
-15.4% vs TC avg
§112
15.6%
-24.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 871 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 2, 3, 7-9, 12, 13, and 17-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 2, 5, 6, 10, 13, 22, 25, 26, and 29 of U.S. Patent No. 11928018. Although the claims at issue are not identical, they are not patentably distinct from each other because the ‘018 claims contain all teachings of the instant claims and thus anticipate the instant claims. Claim 12 is exemplary: Instant claim 12 ‘018 claim 1 recitations Explanation as needed: A method, comprising: A method, comprising: Identical receiving, from a memory device, a set of data and an indication of whether the memory device detected one or more errors in the set of data; receiving, from a memory device, a set of data and an indication of whether a first error management procedure performed by the memory device on the set of data detected one or more errors in the set of data Broadened claim limitation performing, at a host device, an error management procedure on the set of data received from the memory device to generate a plurality of bits indicating whether one or more errors associated with the set of data were detected at the host device; performing, at a host device, a second error management procedure on the set of data received from the memory device; generating, based at least in part on the indication and the second error management procedure, a plurality of bits indicating whether one or more errors associated with the set of data were detected at the memory device, the host device, or both Broadened and processing the set of data based at least in part on the plurality of bits and the indication. validating or discarding the set of data based at least in part on the plurality of bits Validating or discarding the data is processing of the data Claim 2 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 19 of U.S. Patent No. 12423175. Although the claims at issue are not identical, they are not patentably distinct from each other because the ‘175 claim contain all teachings of the instant claim and thus anticipate the instant claim. Regarding claim 2: Instant claim ‘175 claim recitations Explanation as needed An apparatus, comprising: A host system, comprising: A host system is an apparatus a receiver configured to receive, from a memory device, a set of data and an indication of whether the memory device detected one or more errors in the set of data; a receiver configured to receive a received version of a set of data and an indication of whether one or more errors were detected for the set of data at a memory system Receiver receives the data and indication, which come from a memory system, which is a memory device an error management component configured to perform, at a host device, an error management procedure on the set of data received from the memory device to generate a plurality of bits indicating whether one or more errors associated with the set of data were detected at the host device; an error management component configured to determine whether the received version of the set of data includes one or more errors; generate, based at least in part on the indication and whether the received version of the set of data includes one or more errors, a plurality of bits indicating whether one or more errors associated with the set of data were detected at the memory system, the error management component, or both; The components are part of the host system and receive the data and indication and perform a procedure to generate the plurality of bits and logic configured to: receive the indication and a result of the error management component; logic configured to generate, based at least in part on the indication; configured to process the set of data based at least in part on the plurality of bits The bits are generated based on the data and indication and given to the controller and process the set of data based at least in part on the plurality of bits and the indication. a controller configured to process the set of data based at least in part on the plurality of bit The data is processed based on the bits, which are in turn generated based on the indication Claims 12 and 21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 19 of U.S. Patent No. 12423175 in view of official notice. The ‘175 claim contains all teachings of the instant claims except for the teachings of a method and a non-transitory computer-readable medium (CRM) storing code comprising instructions executable by a processor to perform actions. The examiner takes official notice that it was well-known and widely used by those of ordinary skill in the art prior to the effective filing to date to provide a method of using a system and a CRM containing instructions that, when executed, invoke a method of using a system. It would have been obvious to one of ordinary skill in the art prior to the effective filing date to combine a method and CRM with the system of the ‘175 patent because providing a method of using a system and a CRM that invoke that method allows the benefits of the system to be realized. Allowable Subject Matter Claims 4-6, 10, 11, and 14-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Other Pertinent Prior Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. ‘103 to Schaefer et al. discloses a memory detecting and repairing a corrupted bit and providing, to a host device that issued a read command, an indication of error status. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARC M DUNCAN whose telephone number is (571)272-3646. The examiner can normally be reached M-F: 730am-9am, 10am-4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bryce Bonzo can be reached at 571-272-3655. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MARC DUNCAN/Primary Examiner, Art Unit 2113
Read full office action

Prosecution Timeline

Sep 04, 2025
Application Filed
Oct 01, 2026
Non-Final Rejection mailed — §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
95%
With Interview (+7.7%)
2y 4m (~1y 2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 871 resolved cases by this examiner. Grant probability derived from career allowance rate.

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