Prosecution Insights
Last updated: August 17, 2026
Application No. 19/319,384

CAPACITOR

Non-Final OA §102
Filed
Sep 04, 2025
Priority
May 24, 2019 — JP 2019-097692 +1 more
Examiner
ESCALANTE, OVIDIO
Art Unit
3992
Tech Center
3900
Assignee
Panasonic Holdings Corporation
OA Round
1 (Non-Final)
75%
Grant Probability
Favorable
1-2
OA Rounds
1y 4m
Est. Remaining
82%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
167 granted / 222 resolved
+15.2% vs TC avg
Moderate +7% lift
Without
With
+7.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
43 currently pending
Career history
261
Total Applications
across all art units

Statute-Specific Performance

§101
3.4%
-36.6% vs TC avg
§103
27.8%
-12.2% vs TC avg
§102
9.5%
-30.5% vs TC avg
§112
22.5%
-17.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 222 resolved cases

Office Action

§102
DETAILED ACTION This action is in response to the Applicant’s preliminary amendment filed on September 4, 2025. As set forth therein, claims 1-18 are pending, of which claims 1-3, 5 and 7-12 are amended and claims 14-18 are newly added. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Reissue Applications For reissue applications filed before September 16, 2012, all references to 35 U.S.C. 251 and 37 CFR 1.172, 1.175, and 3.73 are to the law and rules in effect on September 15, 2012. Where specifically designated, these are “pre-AIA ” provisions. For reissue applications filed on or after September 16, 2012, all references to 35 U.S.C. 251 and 37 CFR 1.172, 1.175, and 3.73 are to the current provisions. Applicant is reminded of the continuing obligation under 37 CFR 1.178(b), to timely apprise the Office of any prior or concurrent proceeding in which Patent No. 11,776,758 is or was involved. These proceedings would include any trial before the Patent Trial and Appeal Board, interferences, reissues, reexaminations, supplemental examinations, and litigation. Applicant is further reminded of the continuing obligation under 37 CFR 1.56, to timely apprise the Office of any information which is material to patentability of the claims under consideration in this reissue application. These obligations rest with each individual associated with the filing and prosecution of this application for reissue. See also MPEP §§ 1404, 1442.01 and 1442.04. Claim Objections Claim 9 is objected to because of the following informalities: In line 2, the “at” in “at at” is duplicated. Appropriate correction is required. Reissue Declaration The reissue oath/declaration filed with this application is defective (see 37 CFR 1.175 and MPEP § 1414) because of the following: The Examiner notes that the error statement states that independent claims 1 and 7 are amended and new independent claim 15 is added to broaden the scope of the original claims, by removing some of the limitations of the original claims. In accordance with MPEP 1414(II), “[f]or an application filed on or after September 16, 2012 that seeks to enlarge the scope of the claims of the patent, the reissue oath or declaration must also identify a claim that the application seeks to broaden in the identification of the error that is relied upon to support the reissue application. A general statement, e.g., that all claims are broadened, is not sufficient to satisfy this requirement. In specifically identifying the error as required by 37 CFR 1.175(a), it is sufficient that the reissue oath/declaration identify the claim being broadened and a single word, phrase, or expression in the specification or in an original claim, and how it renders the original patent wholly or partly inoperative or invalid.” (emphasis added) Thus, any error in the claims must be identified by reference to the specific claim(s) and the specific claim language wherein lies the error. Claims 1-18 are rejected as being based upon a defective reissue declaration under 35 U.S.C. 251 as set forth above. See 37 CFR 1.175. The nature of the defect(s) in the declaration is set forth in the discussion above in this Office action. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 6, 7, and 10-14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sato et al. US Patent Pub. 2018/0040425. Regarding claim 1: A capacitor comprising: Sato discloses “[a] case-mold-type capacitor includes a capacitor element, first and second bus bars connected to the first and second electrodes of the capacitor element, a case accommodating the capacitor element and the first and second bus bars, and a mold resin filling the case therein.” See the abstract and Fig. 1. See also paragraph [0014]. a capacitor element; Sato discloses a capacitor element 1. See paragraph [0038] and Figure 1. a first bus bar [connected to a first electrode of the capacitor element]; Sato discloses bus bars 2 and 3 (and thus discloses a ‘first’ bus bar). See paragraph [0038] and Figure 1. a case housing the capacitor element; and Sato discloses a case 5 which housing the capacitor element 1. See paragraph [0038] and Figure 1. a filling resin filled in the case, wherein: Sato discloses a mold resin 7 filled into case 5 as to cover capacitor element 1. See paragraph [0038] and Figure. 1. the first bus bar includes [a first section and a second section] a connection terminal that is exposed from the filling resin and connected to an external terminal, PNG media_image1.png 500 516 media_image1.png Greyscale As shown in the above figure the first bus bar includes a connection terminal (e.g. 2c) that is exposed from the filling resin (7) and connected to an external terminal. As set forth in paragraph [0038], the terminal portion 2c is described as a “terminal portion”. See also paragraph [0042] which discloses that the terminal portion 2b and 2c is configured to connect to an external device (terminal). See also paragraph [0045]. a first buried section that is buried in the filling resin, and Sato discloses that bus bar includes a section that is sealed within the resin. See Figure 4A and paragraph [0051]. See also Figure 3A, 6 and 7 which shows that the bus bar includes a section that is sealed in the resin ( and thus is ‘buried’). an exposed section that is exposed from the filling resin and located away from the connection terminal,[the first section is exposed from the filling resin and includes a connection terminal configured to be connected to an external terminal, the second section has a buried section buried in the filling resin and an exposed section exposed from the filling resin and includes a connection part connected to the first electrode, the exposed section being located away from the first section,] As shown in Figure 1, Sato discloses that the bus bar includes an exposed section that is exposed from the filling resin. See Figure 1 where the exposed section is bus bar 2 (above the resin). See also paragraph [0063] which states that the bus bars 2 is exposed upward and led out of mold resin 7. the case has a bottom surface, four side surfaces each rising from the bottom surface, and an opening at an upper surface facing the bottom surface, and As shown in below Figure 6, the case has a bottom surface, four sides each rising form the bottom and an opening at the upper surface. See paragraph [0059] which discloses that the case is a “box shape” having an upper surface opening. PNG media_image2.png 504 503 media_image2.png Greyscale the exposed section as a whole overlaps the capacitor element viewed from a direction perpendicular to the bottom surface of the case. The Examiner notes that as shown in Figure 1, the bus bars 2 and 3 are placed over at least one of the capacitor elements 1. See also Figure 5. Thus, when looking at a direction perpendicular to the bottom surface of the case (from the top/bottom direction), the exposed section (at least 2) completely overlaps the capacitor element. Regarding claim 2: The capacitor according to claim 1, further comprising a second bus bar, wherein: Sato discloses bus bars 2 and 3 (and thus discloses a ‘second’ bus bar). See paragraph [0038] and Figure 1. the capacitor element is housed in the case so that a first end surface of the capacitor element faces toward the opening of the case and a second end surface of the capacitor element faces toward the bottom surface of the case, the first end surface, See Figure 6 which discloses a capacitor element 1 house in a case and that a first end faces towards the opening (top end) and a second end surface faces the bottom (bottom of capacitor element). the second bus bar is connected to a second electrode of the capacitor element disposed on the second end surface, and With reference to Figure 6, Sato discloses a second bus bar (e.g. 3) is connected to a second electrode of the capacitor element. See paragraph [0039] which discloses that the capacitor element includes electrodes 1a and 1b. See paragraph [0040] which discloses the bus bars 2 and 3 (first and second bus bars) are connected to electrodes 1a and 1b of capacitor element 1 shown in Figure 2. at least a part of the exposed section [is configured so that a part of the second section] faces the first end surface and protrudes to be away from the first end surface. As shown in Figure 5, the exposed section (2/2b or 3/3b) faces the first end surface and protrudes to be away from the first end surface. Regarding claim 3: The capacitor according to claim 1, wherein: a plurality of capacitor elements each being the capacitor element are arranged in a first direction in the case, the plurality of capacitor elements includes a first capacitor element and a second capacitor element, See Figure 5 which shows two capacitor elements 1 which are arranged in a first direction (across) in the case. See paragraph [0047]. the first capacitor element being disposed close to the [first section] connection terminal, the second capacitor element being disposed farther from the [first section] connection terminal than the first capacitor element in the first direction, and [the exposed section is located in the second section so that] at least a part of the exposed section overlaps the second capacitor element. As shown in Figure 1, the connection terminals 2c/3c are close to the one of the capacitor elements and farther from another capacitor element. In addition, the exposed section overlaps one of the capacitor elements. Regarding claim 4: The capacitor according to claim 1, wherein the exposed section has a flat surface. As shown in Figure 1, the exposed section has a flat surface. The Examiner notes that the sides of the exposed section is shown to be flat. Regarding claim 6: The capacitor according to claim 1, wherein the exposed section is disposed on top of the upper surface of the case viewed from a direction parallel to the bottom surface of the case. See Figure 1 and 7 which shows that the exposed section (2/3) is disposed on top of the upper surface of the case when view in a direction parallel to the bottom surface of the case. Regarding claim 7: A capacitor comprising: Sato discloses “[a] case-mold-type capacitor includes a capacitor element, first and second bus bars connected to the first and second electrodes of the capacitor element, a case accommodating the capacitor element and the first and second bus bars, and a mold resin filling the case therein.” See the abstract and Fig. 1. See also paragraph [0014]. a capacitor element; Sato discloses a capacitor element 1. See paragraph [0038] and Figure 1. a first bus bar [connected to a first electrode of the capacitor element]; Sato discloses bus bars 2 and 3 (and thus discloses a ‘first’ bus bar). See paragraph [0038] and Figure 1. a case housing the capacitor element; and Sato discloses a case 5 which housing the capacitor element 1. See paragraph [0038] and Figure 1. a filling resin filled in the case, wherein: Sato discloses a mold resin 7 filled into case 5 as to cover capacitor element 1. See paragraph [0038] and Figure. 1. the first bus bar includes [a first section and a second section] a connection terminal that is exposed from the filling resin and connected to an external terminal, PNG media_image1.png 500 516 media_image1.png Greyscale As shown in the above figure the first bus bar includes a connection terminal (e.g. 2c) that is exposed from the filling resin (7) and connected to an external terminal. As set forth in paragraph [0038], the terminal portion 2c is described as a “terminal portion”. See also paragraph [0042] which discloses that the terminal portion 2b and 2c is configured to connect to an external device (terminal). See also paragraph [0045]. a first buried section that is buried in the filling resin, and Sato discloses that bus bar includes a section that I sealed within the resin. See Figure 4A and paragraph [0051]. See also Figure 3A, 6 and 7 which shows that the bus bar includes a section that is sealed in the resin ( and thus is ‘buried’). an exposed section that is exposed from the filling resin and located away from the connection terminal, and[the first section is exposed from the filling resin and includes a connection terminal configured to be connected to an external terminal, the second section has a first buried section buried in the filling resin and an exposed section exposed from the filling resin, the exposed section being located away from the first section,] As shown in Figure 1, Sato discloses that the bus bar includes an exposed section that is exposed from the filling resin. See Figure 1 where the exposed section is bus bar 2 (above the resin). See also paragraph [0063] which states that the bus bars 2 is exposed upward and led out of mold resin 7. the first buried section as a whole is located farther from the [first section]connection terminal than the exposed section. See Figure 6 which shows that the first buried section is located farther from the connection terminal (2c) than the exposed section 2). The Examiner notes that the buried side of the bus bar closest two the exposed section (2) is farther from the connection terminal 2c. Regarding claim 10: The capacitor according to claim 7, further comprising a second bus bar, wherein: Sato discloses bus bars 2 and 3 (and thus discloses a ‘second’ bus bar). See paragraph [0038] and Figure 1. the capacitor element is housed in the case so that a first end surface of the capacitor element faces toward an opening of the case and a second end surface of the capacitor element faces toward a bottom surface of the case, the first end surface, See Figure 6 which discloses a capacitor element 1 house in a case and that a first end faces towards the opening (top end) and a second end surface faces the bottom (bottom of capacitor element). the second bus bar is connected to a second electrode of the capacitor element disposed on the second end surface, and With reference to Figure 6, Sato discloses a second bus bar (e.g. 3) is connected to a second electrode of the capacitor element. See paragraph [0039] which discloses that the capacitor element includes electrodes 1a and 1b. See paragraph [0040] which discloses the bus bars 2 and 3 (first and second bus bars) are connected to electrodes 1a and 1b of capacitor element 1 shown in Figure 2. at least a part of the exposed section [is configured so that a part of the second section] faces the first end surface and protrudes to be away from the first end surface. As shown in Figure 5, the exposed section (2/2b or 3/3b) faces the first end surface and protrudes to be away from the first end surface. Regarding claim 11: The capacitor according to claim 7, wherein: a plurality of capacitor elements each being the capacitor element are arranged in a first direction in the case, the plurality of capacitor elements includes a first capacitor element and a second capacitor element, See Figure 5 which shows two capacitor elements 1 which are arranged in a first direction (across) in the case. See paragraph [0047]. the first capacitor element being disposed close to the [first section] connection terminal, the second capacitor element being disposed farther from the [first section] connection terminal than the first capacitor element in the first direction, and [the exposed section is located in the second section so that] at least a part of the exposed section overlaps the second capacitor element. As shown in Figure 1, the connection terminals 2c/3c are close to the one of the capacitor elements and farther from another capacitor element. In addition, the exposed section overlaps one of the capacitor elements. Regarding claim 12: The capacitor according to claim 7, wherein: the first bus bar is electrically connected to the capacitor element.[the case has a bottom surface, four side surfaces each rising from the bottom surface, and an opening at an upper face facing bottom surface, and in viewing in a direction perpendicular to the bottom surface, the first section and the exposed section are exposed from a region of the filling resin, the region being in the opening.] With reference to Figure 6, Sato discloses a first bus bar (e.g. 3) is connected to a first electrode of the capacitor element. See paragraph [0039] which discloses that the capacitor element includes electrodes 1a and 1b. See paragraph [0040] which discloses the bus bars 2 and 3 (first and second bus bars) are connected to electrodes 1a and 1b of capacitor element 1 shown in Figure 2. Regarding claim 13: The capacitor according to claim 7, wherein the case has a bottom surface, four side surfaces each rising from the bottom surface, and an opening at an upper surface facing the bottom surface, and As shown in below Figure 6, the case has a bottom surface, four sides each rising form the bottom and an opening at the upper surface. See paragraph [0059] which discloses that the case is a “box shape” having an upper surface opening. PNG media_image2.png 504 503 media_image2.png Greyscale the exposed section as a whole overlaps the capacitor element viewed from a direction perpendicular to the bottom surface of the case. The Examiner notes that as shown in Figure 1, the bus bars 2 and 3 are placed over at least one of the capacitor elements 1. See also Figure 5. Thus, when looking at a direction perpendicular to the bottom surface of the case (from the top/bottom direction), the exposed section (at least 2) completely overlaps the capacitor element. Regarding claim 14: The capacitor according to claim 1, wherein the first bus bar is electrically connected to the capacitor element. With reference to Figure 6, Sato discloses a first bus bar (e.g. 3) is connected to a first electrode of the capacitor element. See paragraph [0039] which discloses that the capacitor element includes electrodes 1a and 1b. See paragraph [0040] which discloses the bus bars 2 and 3 (first and second bus bars) are connected to electrodes 1a and 1b of capacitor element 1 shown in Figure 2. Allowable Subject Matter Claims 5, 8 and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Upon correction of the reissue declaration as set forth above, claims 15-18 will be indicated as being allowable. The following is a statement of reasons for the indication of allowable subject matter: the prior art of record does not specifically disclose the first bus bar includes: a first buried section and a second buried section that are buried in the filling resin, an exposed section that is exposed from the filling resin and located between the first buried section and the second buried section, and a connection part that is connected to the capacitor element, the connection part is provided in each of the first buried section and the second buried section in combination with the rest of the limitations of the claim. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Ovidio Escalante whose telephone number is (571)272-7537. The examiner can normally be reached on Monday to Friday - 6:00 AM to 2:30 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Fuelling, can be reached at telephone number (571)272-7537. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from Patent Center. Status information for published applications may be obtained from Patent Center. Status information for unpublished applications is available through Patent Center to authorized users only. Should you have questions about access to the USPTO patent electronic filing system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via a variety of formats. See MPEP § 713.01. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) Form at https://www.uspto.gov/InterviewPractice. /Ovidio Escalante/ Primary Examiner Art Unit 3992 Conferee: /MATTHEW E HENEGHAN/Primary Examiner, Art Unit 3992 /M.F/Supervisory Patent Examiner, Art Unit 3992
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Prosecution Timeline

Sep 04, 2025
Application Filed
Aug 04, 2026
Non-Final Rejection mailed — §102 (current)

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Prosecution Projections

1-2
Expected OA Rounds
75%
Grant Probability
82%
With Interview (+7.2%)
2y 4m (~1y 4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 222 resolved cases by this examiner. Grant probability derived from career allowance rate.

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