DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 9/12/2025 and 2/10/2026 was filed on and after the mailing date of the claims on 9/12/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
1. Claim(s) 1, 3, 4, 5, 7, 8, 11, 12, 13, 14, 15 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application 2022/0208145 Glen in view of U.S. Patent 9589540 Wu et al. (hereinafter Wu).
2. Regarding Claim 1, Glen discloses An electronic apparatus ([0012], “an electronic device”) comprising:
an input/output interface ([0013], “and at least one display interface (IF) 130-1, 130-2. The interfaces 130-1, 130-2 include wired or wireless interconnect interfaces, such as HDMI interfaces, DisplayPort interfaces, embedded DisplayPort (eDP) interfaces, and the like”);
memory configured to store at least one instruction ([0013], “To support execution of the sets of instructions, the VPUs 105-1, 105-2 each includes at least one memory (not shown)”); and
at least one processor configured to execute the at least one instruction ([0014], “each processor includes one or more instruction pipelines to fetch instructions, decode the instructions into corresponding operations, dispatch the operations to one or more execution units, execute the operations, and retire the operations.” (Fig .1; [0015], “The GPUs 115-1, 115-2 are generally configured to receive the commands and data associated with graphics and other display operations from the CPUs 110-1, 110-2. Based on the received commands, the GPUs 115-1, 115-2 execute operations to generate frames for display.”) to:
obtain a first image having a variable refresh rate through the input/output interface [0018], “The display wall 140 includes an array of variable refresh rate (VRR) display modules 141-1, 141-2…Each VRR display module 141 receives portions of rendered frames from one of the VPUs 105-1, 105-2.” Obtaining image data through the display interface: [0018], “in some embodiments, VPU 105-1 generates portions of rendered frames and outputs one portion to each of VRR display modules 141-1, 141-2, 141-3, 141-4.” The refresh rate of this received image data is variable and dynamically adjusted: Abstract, “Each VPU adjusts the frequency and phase of the VRR display modules for which it renders portions of the frame based on the master timing signal.”), and
generate a multi-view screen displaying both the first image and the second image by changing the fixed refresh rate of the second image to a current refresh rate of the first image ([0008], “The processing system selects a master timing signal…Each VPU adjusts the frequency and phase of the VRR display modules for which it renders portions of the frame by adjusting the refresh rate and timing of the VRR display modules for each frame based on the master timing signal.” The underlying refresh-rate changing/ synchronization mechanism used to align display of multiple image sources to a common current rate: [0010], “By adjusting the timing of the exit of each vertical blanking period of each of the VRR display modules of the display wall based on a selected master timing signal, the processing system synchronizes the refresh rates of the VRR display modules via software and network messages”).
However, Glen does not disclose obtain a second image having a fixed refresh rate.
Glen’s display wall array is homogenously composed of VRR display modules (“an array of variable refresh rate (VRR) display modules” [0008]).
Wu teaches obtain a second image having a fixed refresh rate (Claim 1, “the compositor accessing, from a second application executed on the computer, graphic data at a second frame rate.” second stream need not itself be variable, treating it as a distinct source with its own frame rate to be reconciled against the first: Claim 11, “a second video frame rate for graphic data received from a second application executed on the computer.” Further discloses obtaining such image data through an interface to the compositor: Claim 16, “a compositor… having inputs for receiving graphic data, from multiple windows provided by applications executed on the computing machine.”).
A person of ordinary skill extending Glen’s synchronization mechanism to common case of pairing a VRR source with a fixed-rate source would have looked to Wu’s teaching of exactly this composition. Wu explicitly addresses “multiple video sources…processed and combined together into a single display.” Glen and Wu both address synchronizing displays fed by sources with different refresh rates to avoid tearing and stutter. Hence, arriving at the claimed invention as the predictable result of combining known elements by known methods.
3. Regarding Claim 3, Glen in view of Wu discloses The electronic apparatus as claimed in claim 1,
Wu discloses wherein the at least one processor is further configured to execute the at least one instruction to (Col. 6 line 66-Col. 7 line 10, “The system can be implemented with numerous general purpose or special purpose computing hardware configurations. Examples of well known computing devices that may be suitable include… multiprocessor systems, microprocessor-based systems”):
generate the multi-view screen such that a refresh rate of the multi-view screen changes to the current refresh rate of the first image (the refresh rate selected for the composited output display data is adapted, on an ongoing basis, to the current refresh rate of the first (variable rate) image source: Claim 6, “wherein the first video frame rate is variable, and determining the first video frame rate and selecting the refresh rate are repeated during playback of the sequence of images to adapt the refresh rate to the first video frame rate.” Because the “output display data” generated by Wu’s compositor: Claim 1, “combining an image from the sequence of images from the first application and the graphic data from the second application.” Is produced at this selected, continuously-adapted refresh rate, the composite multi-view output itself changes to track the first image’s current rate. The claimed VRR-plus-fixed source pairing, the first (variable) image’s rate directly determines the selected composite refresh rate: Claim 7, “wherein when the sequence of images from the first application includes one of graphics animation, display related to touch input, and a video game, the first video frame rate is used to select the refresh rate.”).
A person of ordinary skill extending Glen’s synchronization mechanism to common case of pairing a VRR source with a fixed-rate source would have looked to Wu’s teaching of exactly this composition. Wu explicitly addresses “multiple video sources…processed and combined together into a single display.” Glen and Wu both address synchronizing displays fed by sources with different refresh rates to avoid tearing and stutter. Hence, arriving at the claimed invention as the predictable result of combining known elements by known methods.
4. Regarding Claim 4, Glen in view of Wu discloses The electronic apparatus as claimed in claim 1,
Wu discloses wherein the at least one processor is further configured to execute the at least one instruction to (Col. 6 line 66-Col. 7 line 10, “The system can be implemented with numerous general purpose or special purpose computing hardware configurations. Examples of well known computing devices that may be suitable include… multiprocessor systems, microprocessor-based systems”):
synchronize the fixed refresh rate of the second image such that the fixed refresh rate of the second image changes to the current refresh rate of the first image by disposing a frame of the second image repeatedly (Claim 5, “wherein when the selected refresh rate is not an integer multiple of the first video frame rate, one or more images of the sequence of images is repeated of the sequence of images by the compositor in the output display data during playback.” Teaches the “disposing a frame…repeatedly” limitation., combined with Wu’s Claim 6 for the “changes to the current refresh rate of the first image” portion.).
5. Regarding Claim 5, Glen in view of Wu discloses The electronic apparatus as claimed in claim 1,
Glen discloses wherein the at least one processor is further configured to execute the at least one instruction to ([0013], “at least one processor, such as a central processing unit (CPU) 110-1, 110-2”):
synchronize a Vsync start time point of the first image with a Vsync start time point of the second image by adjusting a vertical front porch Vfront of the second image ([0025], “The vertical blanking period includes three phases: a vertical front porch (vfront), vertical sync (vsync), and vertical back porch (vback). A vertical refresh rate changes the duration of vfront, but vsync and vback typically remain unchanged. Vsync is the synchronization event across VPUs that terminates the variable length of vfront.” Vfront is the variable-length component, and its termination is what triggers/aligns vysnc across sources. [0010], “By adjusting the timing of the exit of each vertical blanking period of each of the VRR display modules of the display wall based on a selected master timing signal, the processing system synchronizes the refresh rates of the VRR display modules via software and network messages.” [0025], “At a fixed time after vfront terminates, the vertical active period begins on all VPUs”).
6. Regarding Claim 7, Glen in view of Wu discloses The electronic apparatus as claimed in claim 1 further comprising:
Glen discloses a display configured to display an image by using a timing controller (a display comprising a timing controller [0013], “at least one timing generator 120-1, 120-2, at least one timing control module 125-1, 125-2”), wherein the at least one processor is configured to execute the at least one instruction to:
control the timing controller to display the multi-view screen ([0022], “Each VPU 105-1, 105-2 adjusts the frequency and phase of the VRR display modules 141 for which it renders portions of the frame by adjusting the refresh rate and timing of the VRR display modules 141 based on the master timing signal, for example, by adjusting the vertical blanking intervals of the VRR display modules 141 to synchronize display of the portions of the frame based on the master timing signal.” [0010], “By adjusting the timing of the exit of each vertical blanking period of each of the VRR display modules of the display wall based on a selected master timing signal, the processing system synchronizes the refresh rates of the VRR display modules via software and network messages.” This processor-driven control of the timing control module to synchronize and display combined frame content across the display reads on controlling a timing controller to display a multi-view screen).
7. Regarding Claim 8, Glen in view of Wu discloses The electronic apparatus as claimed in claim 1 further comprising:
Glen discloses a display configured to display an image by using a plurality of timing controllers ([0018], “a display wall 140 includes…an array of variable refresh rate (VRR) display modules 141-1, 141-2… Each VRR display module 141 receives portions of rendered frames from one of the VPUs 105-1, 105-2.” Each VPU includes [0013], “at least one timing generator 120-1, 120-2.” Reading on a display using a plurality of timing controllers),
Wu discloses wherein the at least one processor is configured to execute the at least on instruction to (Col. 7 lines 1-10, “well known computing devices that may be suitable include… multiprocessor systems, microprocessor-based systems.”):
change the fixed refresh rate of the second image based on at least one timing controller among the plurality of timing controllers processing the first image and the second image together (Wu’s compositor combines in Claim 1, “an image from the sequence of images from the first application and the graphic data from the second application” and adapts the selected/output refresh rate to the first video frame rate on an ongoing basis Claim 6, “wherein the first video frame rate is variable, and determining the first video frame rate and selecting the refresh rate are repeated during playback of the sequence of images to adapt the refresh rate to the first video frame rate.”).
A person of ordinary skill in the art combining Glen’s multi-timing controller display architecture with Wu’s compositor-driven refresh rate adaptation would have been motivated to do so because both references address synchronizing display output across multiple image sources processed through shared or coordinated timing control hardware, and applying Wu’s known refresh-rate-adaptation technique through Glen’s known plurality-of-timing controllers structure would have yielded the predictable result of a timing controller changing the second image’s fixed rate to track the first image’s current rate using known techniques for their known purposes.
8. Claim 11 is a method claim, rejected with respect to the same limitation rejected in apparatus claim 1.
11. A method of controlling an electronic apparatus, the method comprising:
obtaining a first image having a variable refresh rate;
obtaining a second image having a fixed refresh rate; and
generating a multi-view screen displaying both the first image and the second image, by changing the fixed refresh rate of the second image to a current refresh rate of the first image.
9. Claim 12 is a method claim, rejected with respect to the same limitation rejected in apparatus claim 3.
12. The method as claimed in claim 11, wherein the generating generates the multi-view screen such that a refresh rate of the multi-view screen is changed to the current refresh rate of the first image.
10. Claim 13 is a method claim, rejected with respect to the same limitation rejected in apparatus claim 4.
13. The method as claimed in claim 11, wherein the generating includes:
synchronizing the fixed refresh rate of the second image such that the fixed refresh rate of the second image changes to the current refresh rate of the first image by disposing a frame of the second image repeatedly.
11. Claim 14 is a method claim, rejected with respect to the same limitation rejected in apparatus claim 5.
14. The method as claimed in claim 11, wherein the generating includes:
synchronizing a Vsync start time point of the first image with a Vsync start time point
of the second image by adjusting a vertical front porch Vfront of the second image.
12. Claim 15 is a non-transitory CRM claim, rejected with respect to the same limitation rejected in apparatus claim 1.
15. A non-transitory computer-readable recording medium in which a program for
executing a method of controlling an electronic apparatus is stored, the method comprising:
by the electronic apparatus:
obtaining a first image having a variable refresh rate;
obtaining a second image having a fixed refresh rate; and
generating a multi-view screen displaying both the first image and the second image,
by changing the fixed refresh rate of the second image to a current refresh rate of the first
image.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
13. Claim(s) 2 is rejected under 35 U.S.C. 103 as being unpatentable over Glen in view of Wu as applied to claim 1 above, and further in view of U.S. Patent 11798508, Jeong.
14. Regarding Claim 2, Glen in view of Wu discloses The electronic apparatus as claimed in claim 1,
Glen in view of Wu does not explicitly discloses wherein based on the fixed refresh rate of the second image being greater than a minimum refresh rate of the variable refresh rate of the first image, the at least one processor is configured to execute the at least on instruction to:
change the minimum refresh rate of the variable refresh rate of the first image.
Jeong discloses wherein based on the fixed refresh rate of the second image being greater than a minimum refresh rate of the variable refresh rate of the first image (Claim 1, “extract, from each image of the sequence of images, an image specific frequency of a vertical synchronizing signal of a corresponding image, determine whether or not one of the extracted image specific frequencies is below a threshold frequency”), the at least one processor (Fig. 3; Col. 7 line 50, “a processor 330”) is configured to execute the at least on instruction to:
change the minimum refresh rate of the variable refresh rate of the first image (Claim 1, “upon determining that one of the extracted image specific frequencies is below the threshold frequency while the another one of the extracted image specific frequencies is not below the threshold frequency: increase an image specific screen refresh rate of all images of the sequence of images by a common factor, and control the display to display the sequence of images with the image specific screen refresh rate that has been increased by the common factor.”).
A person of ordinary skill in the art implementing Glen and Wu’s synchronized multi-view display-pairing a VRR (first) image source with a fix-rate (second) image source- would have recognized the same flicker problem Jeong addresses: when a variable refresh rate drops too low relative to a reference frequency, a user perceives flicker, as Jeong’s background confirms (Col. 1 lines 35-38, “when the screen refresh rate is adjusted to be excessively lowered, even an operating frequency of a backlight unit is lowered, thereby causing a flicker phenomenon”). A skilled artisan would have been motivated to apply Jeong’s known technique of comparing one image’s frequency against another’s and increasing the lower one accordingly, in order to prevent the same flicker artifact from arising when Glen and Wu’s fixed-rate second image’s frequency exceeds the VRR first image’s floor. Applying Jeong’s known threshold-comparison and increase technique to Glen and Wu’s known multi-view VRR plus-fixed source structure would have yielded the predictable result of a more stable, flicker-free composite display, using a known technique for its known purpose with no unexpected results.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
15. Claim(s) 6 is rejected under 35 U.S.C. 103 as being unpatentable over Glen in view of Wu as applied to claim 1 above, and further in view of U.S. Patent Application 2014/0028808, Rui.
16. Regarding Claim 6, Glen in view of Wu discloses The electronic apparatus as claimed in claim 1,
However, Glen in view of Wu does not explicitly disclose wherein the at least one processor is further configured to execute the at least one instruction to:
determine resolution of the multi-view screen, and
scale at least one of resolution of the first image and resolution of the second image, in response to the determined resolution of the multi-view screen.
Further Rui teaches wherein the at least one processor is further configured to execute the at least one instruction to ([0026], “The first storage module 4 stores the program code executed by the video processing module 2 and information set by users”):
determine resolution of the multi-view screen ([0049], “the two second images A1 and B1 are combined to obtain a third image (its resolution is 3840.times.1080 pixels).” The third image is the composite multi-view screen, “the third image is encoded into the LVDS signal to output to the dual-view processing module 5 to perform the dual-view image display process.” The third image is the unified multi-view output ultimately provided to the display module 8, which [0007], “displays the two processed second images outputted from the dual-view processing module.”), and
scale at least one of resolution of the first image and resolution of the second image, in response to the determined resolution of the multi-view screen ([0025], “the video processing module 2 uses the nonlinear processing module 9 to horizontally or vertically split each of the two first images into areas, to nonlinearly enlarge each of the areas, and to interpolate pixels to each of the enlarged areas to obtain two fullscreen second images.” Scaling (nonlinearly enlarging) both the first and second source images to resolutions that enable the determined multi-view screen composite. [0048], “the first image A is nonlinearly enlarged to obtain the second image A1 (its resolution is 1920.times.1080 pixels) by vertically splitting the first image A into 16 areas, nonlinearly enlarging each of the 16 areas, and interpolating pixels to each of the 16 enlarged areas.”).
A person of ordinary skill in the art implementing Glen and Wu’s synchronized multi-view display, and seeking to accommodate source images of differing native resolutions (a problem Riu itself addresses in combining two video images for simultaneously display), would have looked to Riu’s scaling technique as a known, predictable solution. Combining Riu’s resolution-determination and scaling technique with Glen and Wu’s refresh-rate synchronization would have yielded the predictable result of a multi-view display reconciling both temporal (refresh rate) and spatial (resolution) mismatches between sources, using known techniques for their known, respective purposes.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
17. Claim(s) 9 is rejected under 35 U.S.C. 103 as being unpatentable over Glen in view of Wu as applied to claim 8 above, and further in view of U.S. Patent 6166777, Ock.
18. Regarding Claim 9, Glen in view of Wu discloses The electronic apparatus as claimed in claim 8,
Glen in view of Wu does not explicitly disclose wherein the at least one processor is further configured to execute the at least one instruction to:
generate the first image and the second image as a multi view in a picture in picture (PIP) form.
Ock teaches wherein the at least one processor (Col. 2 line 20, “PIP type video signal processing circuit”) is further configured to execute the at least one instruction to:
generate the first image and the second image as a multi view in a picture in picture (PIP) form (Claim 1, “a mode discriminator/timing generator for discriminating a mode in accordance with a synchronizing signal of a sub-picture video signal selected from input TV video signal or input PC video signal to produce a corresponding mode selection signal, producing a control signal for synchronizing horizontal and vertical frequencies of sub-picture video signal with a main-picture video signal, and separating horizontal and vertical synchronizing signals from the synchronizing signal of the sub-picture video signal.” Claim 1, “a video signal output section for mixing the sub-picture video signal provided from the memory with the outline signal provided from the outline signal generator to output the mixed video signal.” Title: “The PIP type video signal processing circuit for a multi-picture display circuit.” Col 1. Lines 16-23, “a sub-channel picture, converted to a predetermined size by the PIP type video processing circuit, is superimposed on, or displayed within a main-channel picture in a display screen region of the TV. Accordingly, a user can display two pictures simultaneously, the main-channel picture and the sub-channel picture, on a display screen.”).
A person of ordinary skill in the art implementing Glen and Wu’s multi-view VRR-plus-fixed source display would have been motivated to arrange that combination specifically in picture -in-picture form by looking to Ock, since Ock addresses the well-known, foundational problem of displaying two video sources simultaneously on one screen with proper synchronization between them. Applying Ock’s known PIP mixing technique to Glen and Wu’s known dual-source refresh rate matching system would have yielded the predictable result of a stable picture-in-picture display combining a variable-rate first image and a fixed rate second image, using a known technique for its known purpose with no unexpected results.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
19. Claim(s) 10 is rejected under 35 U.S.C. 103 as being unpatentable over Glen in view of Wu as applied to claim 1 above, and further in view of U.S. Patent 12322358 Song.
20. Regarding Claim 10, Glen in view of Wu discloses The electronic apparatus as claimed in claim 1,
Glen in view of Wu does not explicitly disclose wherein the at least one processor is further configured to execute the at least one instruction to:
obtain the current refresh rate of the first image based on refresh rate information in a
video timing extended metadata (VTEM) packet obtained through the input/output interface.
Further Song teaches wherein the at least one processor is further configured to execute the at least one instruction to (Fig. 3: 370 processor):
obtain the current refresh rate of the first image (Col. 7 lines 62-64, “The processor 370 may determine whether the QMS-VRR operation condition is satisfied based on the received HDMI signal”) based on refresh rate information in a video timing extended metadata (VTEM) packet (Col. 10 lines 27-29, “The blank area 513 may be an area including additional information about the video frame. The blank area 513 may include video timing extended metadata (VTEM).” Col. 30-32, “The VTEM may include an M_CONST field indicating whether a change in frame rate is allowed and a NEXT TFR field including the target frame rate of a next frame.” Col. 9 lines 11-12, “The NEXT TFR field may include the value of the target frame rate of the next frame.” Col. 9 lines 16-21, “The processor 370 may determine that the frame rate of the HDMI input signal is scheduled to change when the value of the M_CONST field included in the VTEM of the blank area 513 is 0 and the value of the NEXT TFR field is 60 Hz”) obtained through the input/output interface (Col. 7 lines 49-50, “The external device interface 310 may have one or more HDMI ports.” Col. 7 lines 51-53, “The external device interface 310 may receive an HDMI signal or an HDMI input signal from the connected source device 300-1.” Col. 8 lines 52-53, “an HDMI input signal of 24 Hz is input through the external device interface 310.”).
A POSITA modifying’ Wu’s multi-stream refresh-rate-matching compositor would look to Song for a concrete, standardized way to detect an HDMI source’s incoming rate change, since Wu expressly leaves the rate-detection mechanism open (“metadata output from a video processor,” bitstream headers, timestamps) without specifying an HDMI-native method. Song discloses a VTEM packet in the HDMI blank area with M_CONST/Next TFR fields read through the same external device interface Wu’s system would use for an HDMI source. Substituting Song’s VTEM-based detection into Wu’s rate-selection input is a simple substitution of one known frame-rate-detection technique for another, yielding the predictable result of enabling Wu’s compositor to obtain the current/next refresh rate from an HDMI-connected source.
Conclusion
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/OMER KHALID/Examiner, Art Unit 2422
/JOHN W MILLER/Supervisory Patent Examiner, Art Unit 2422
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