DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-14 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-11 of U.S. Patent No. 12,153,300 in view of Yoshida (US 2020/0272012). Explanation will be provided after the following comparison chart:
Instant Application
U.S Patent Number: 12.153,300
1. A display device comprising:a gate line extended in a first direction;a data line extended in a second direction that is perpendicular to the first direction;a touch sensing line extended in the second direction;a pixel electrode disposed in an opening area that is surrounded by the gate line and the data line; anda common electrode having at least one region that overlaps the pixel electrode in the opening area,wherein the touch sensing line is on a same layer as the data line,wherein the touch sensing line is connected with the common electrode via a contact hole,wherein the contact hole overlaps the gate line.
1. A display device comprising: a pixel electrode in an opening area; a common electrode having at least one region that overlaps the pixel electrode in the opening area; a gate line extending along a row direction in a non-opening area, the non-opening area surrounding the opening area; a data line extending along the non-opening area in a column direction that is perpendicular to the row direction, the data line applying a data signal of an image; a thin film transistor including a source electrode that is connected to the data line and a drain electrode that is connected to the pixel electrode; and a touch sensing line extending in the column direction across the opening area, the touch sensing line is on a same layer as the data line, the source electrode, and the drain electrode with the data line located between the source electrode and the drain electrode on the same layer in at least one region, and the touch sensing line is non-overlapping with the data line, wherein the opening area has a shape in which a length of the opening area in the row direction is longer than a length of the opening area in the column direction.
2. The display device of claim 1, further comprises:a thin film transistor including a source electrode that is connected to the data line and a drain electrode that is connected to one of the pixel electrode and the common electrode,wherein the source electrode and the drain electrode are disposed on the same layer as the data line and the touch sensing line.
2. The display device of claim 1, wherein the pixel electrode has a rectangular shape in which a length of the pixel electrode in the row direction is longer than a length of the pixel electrode in the column direction.
3. The display device of The display device of wherein the data line is located between the source electrode and the drain electrode on a same layer.
3. The display device of claim 1, wherein the common electrode includes: a plurality of branch portions that extend in the row direction in the opening area, the plurality of branch portions disposed in the column direction at equal intervals such that a distance between each pair of adjacent branch portions from the plurality of branch portions is the same; and a stem portion connecting together the plurality of branch portions, the stem portion extending in the column direction.
4. The display device of claim 1, wherein the common electrode comprises:a plurality of branch portions that extend in the first direction and a stem portion extending in the second direction to connect the plurality of branch portions.
4. The display device of claim 1, further including: a color filter in the opening area; and a black matrix around the color filter and overlapping the touch sensing line.
5. The display device of The display device of wherein the data line and the touch sensing line are alternately disposed along the first direction.
5. The display device of claim 1, further comprising: a substrate including the opening area and the non-opening area; a first conductive layer on the substrate, the first conductive layer including the gate line; a second conductive layer on the first conductive layer, the second conductive layer including the data line and the touch sensing line; and a passivation layer on the second conductive layer, wherein the pixel electrode is on the passivation layer, and the common electrode is on the pixel electrode.
6. The display device of claim 2, further comprising:an island pattern disposed on a same layer as the common electrode,wherein the island pattern connects the drain electrode to the pixel electrode.
6. The display device of claim 1, further including: a color filter in the opening area; and a black matrix around the color filter and overlapping the touch sensing line.
7. The display device of claim 1, further comprising:an interlayer-insulating layer covering the gate line; andat least one passivation layer directly covering the data line and the touch sensing line and disposed under the pixel electrode,wherein the interlayer-insulating layer and the at least one passivation layer consist of an inorganic material, andwherein the data line and the touch sensing line are disposed in direct contact with the interlayer-insulating layer.
7. A display device comprising: a plurality of pixels including a pixel having an opening area in which an image is displayed and a non-opening area where the image is not displayed, the opening area having a length in a first direction that is longer than a length of the opening area in a second direction that is different from the first direction; a plurality of gate lines connected to the plurality of pixels, the plurality of gate lines including a gate line that extends in the first direction in the non-opening area of the pixel; a plurality of data lines connected to the plurality of pixels, the plurality of data lines including a data line that extends in the second direction in the non-opening area of the pixel and the data line applying a data signal of an image; a plurality thin film transistors each including a source electrode that is connected to one of the plurality of data lines and a drain electrode that is connected to one of a plurality of pixel electrodes that are included in the plurality of pixels; and a plurality of touch sensing lines including a touch sensing line that extends in the second direction across the opening area of the pixel, the touch sensing line is on a same layer as the data line, the source electrode, and the drain electrode of one of the plurality of thin film transistors with the data line located between the source electrode and the drain electrode on the same layer in at least one region, and the touch sensing line is non-overlapping with the data line; wherein the pixel includes a pixel electrode in the opening area of the pixel and a common electrode having a portion that overlaps the pixel electrode in the opening area, the portion of the common electrode having a length in the first direction that is longer than a length of the portion of the common electrode in the second direction.
8. A display device comprising:a gate line extended in a first direction;a data line extended in a second direction that is perpendicular to the first direction; a touch sensing line extended in the second direction; a pixel electrode disposed in an opening area that is surrounded by the gate line and the data line; and a common electrode having at least one region that overlaps the pixel electrode in the opening area, wherein the touch sensing line is on a same layer as the data line, wherein the opening area has a shape in which a length of the opening area in the first direction is longer than a length of the opening area in the second direction.
8. The display device of claim 7, wherein the portion of the common electrode in the opening area comprises a plurality of protrusions that extend in the first direction in the opening area, the plurality of protrusions disposed in the second direction at equal intervals such that a distance between each pair of adjacent protrusions from the plurality of protrusions is the same.
9. The display device of claim 8, further comprises:a thin film transistor including a source electrode that is connected to the data line and a drain electrode that is connected to one of the pixel electrode and the common electrode,wherein the source electrode and the drain electrode are disposed on the same layer as the data line and the touch sensing line.
9. The display device of claim 8, wherein the common electrode further comprises a connecting portion that extends in the second direction in the non-opening area, the connecting portion connecting together the plurality of protrusions.
10. The display device of The display device of wherein the data line is located between the source electrode and the drain electrode on a same layer.
10. The display device of claim 7, wherein the pixel electrode has a rectangular shape in which a length of the pixel electrode in the first direction is longer than a length of the pixel electrode in the second direction.
11. The display device of claim 8, wherein the common electrode comprises:a plurality of branch portions that extend in the first direction and a stem portion extending in the second direction to connect the plurality of branch portions.
11. The display device of claim 7, further comprising: a substrate; a first conductive layer on the substrate, the first conductive layer including the gate line; a second conductive layer on the first conductive layer, the second conductive layer including the data line and the touch sensing line; and a passivation layer on the second conductive layer, wherein the pixel electrode is on the passivation layer, and the common electrode is on the pixel electrode.
12. The display device of The display device of wherein the data line and the touch sensing line are alternately disposed along the first direction.
13. The display device of claim 9, further comprising:an island pattern disposed on a same layer as the common electrode,wherein the island pattern connects the drain electrode to the pixel electrode.
14. The display device of claim 8, further comprising:an interlayer-insulating layer covering the gate line; andat least one passivation layer directly covering the data line and the touch sensing line and disposed under the pixel electrode,wherein the interlayer-insulating layer and the at least one passivation layer consist of an inorganic material, andwherein the data line and the touch sensing line are disposed in direct contact with the interlayer-insulating layer.
Claims 1-14 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-11 of U.S. Patent No. 12,153,300 in view of Yoshida (US 2020/0272011).
As to independent claim 1 of the instant application, claim 1 of U.S. Patent No. 12,153,300 includes all the limitations of claim 1 of the instant application except for the touch sensing line is connected with the common electrode via a contact hole, wherein the contact hole overlaps the gate line. Yoshida discloses the touch sensing line (Fig. 13, (31B(beta)) is connected with the common electrode (Fig. 13, (25) via a contact hole Fig. 13, (CH5), wherein the contact hole (CH5)overlaps the gate line (Fig. 6, (131beta))[0060]. It would have been obvious to one of ordinary skill in the art at the time of filing to have the contact hole arrangement, as taught by Yoshida, in claim 1 of U.S. Patent No. 12,153,300, so that parasitic capacitances between the gate lines 126 and the second touch lines 131β are reduced [0060].
As to claim 7 of the instant application, claim 8 of U.S. Patent No. 12,153,300 includes all the limitations of claim 7 of the instant application. In other words, claim 7 of the instant application is broader than claim 8 of U.S. Patent No. 12,153,300.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 4-6, 8, and 11-13, is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoshida (US 2020/0272011) in view of Hu (CN 111367431).
As to claims 1 and 8, Yoshida discloses a display device (see abstract) comprising: gate line extended in a first direction (Fig. 12, (126) [0060] a data line extended in a second direction that is perpendicular to the first direction (Fig. 12, (27); a touch sensing line extended in the second direction (Fig. 12, (131b);a pixel electrode disposed in an opening area that is surrounded by the gate line and the data line Fig. 12, (124) ; and a common electrode (Fig. 12, (125), and Fig. 7, (25) having at least one region that overlaps the pixel electrode in the opening area (24), wherein the touch sensing line (Fig. 13, (31b(beta)) is connected with the common electrode (Fig. 13, (25) via a contact hole Fig. 13, (CH5), wherein the contact hole (CH5) overlaps the gate line (Fig. 6, (131beta))[0060]. Further, wherein the opening area has a rectangular shape which is longer in the row direction than the column direction (see figure 7).
However, Yoshida does not specifically disclose the touch sensing line is on a same layer as the data line and is non-overlapping with the data line.
Analogous art Hu, discloses the touch sensing line (Figs. 3-8, (102) is on a same layer as the data line (Figs. 3-8, (104) and is non-overlapping with the data line (See specification in reference to Figs. 3: “the touch electrode wiring 102 arranged in the display region of the array substrate, with the same layer of the data wiring 104 is provided on the level where the source drain electrode of the thin film transistor, which are set on the adjacent two side of the data line 104, as shown in Figure 3. In the invention, the touch electrode wiring level where the source-drain of the same layer of the data wiring is provided on the thin film transistor, a touch electrode wiring are arranged at two sides of each data line, it claims a In Cell touch structure with array substrate does not affect the quality of displaying. In addition, the touch electrode wiring and data wiring are arranged in the same layer”. It would have been obvious to one of ordinary skill in the art at the time of filing to have the touch electrode and the data line on a same layer, as taught by Hu, in the device of Yoshida, because it “increases the thickness of the touch electrode wiring,
As to claims 4 and 11, Yoshida discloses, further, the common electrode Fig. 15, (325) comprises: a plurality of branch portions (protrusions) that extend in the first direction (Figs. 13, 15, (325)[0071, 0072] and a stem portion (connecting portions) extending in the second direction to connect the plurality of branch portions (Figs. 13, 15, (325)[0071, 0072].
As to claims 5 and 12, Yoshida discloses, further, the data line (Fig. 2, 27) and the touch sensing line (Fig. 2, 31) are alternately disposed along the first direction (see Fig. 2, and [0029, 0030]).
As to claims 6 and 13, Yoshida discloses, further, an island pattern (TFT location in Fig. 15) disposed on a same layer as the common electrode (Fig. 15, (125B), wherein the island pattern connects the drain electrode Fig. 15, gate electrode 23A)to the pixel electrode Fig. 15, (124).
Allowable Subject Matter
Claim 2, 3, 7, 9, 10, and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: Claims 2, 3, 7, 9, 10, and 14 are indicated as allowable since certain key features of the claimed invention are not taught or fairly suggested by the prior art. In claims 2 and 9, “the source electrode and the drain electrode are disposed on the same layer as the data line and the touch sensing line”. In claims 7 and 14, “an interlayer-insulating layer covering the gate line; and at least one passivation layer directly covering the data line and the touch sensing line and disposed under the pixel electrode, the interlayer-insulating layer and the at least one passivation layer consist of an inorganic material, and wherein the data line and the touch sensing line are disposed in direct contact with the interlayer-insulating layer”. The closest prior art of record, Yoshida (US 2020/0272011) (see above rejection under 103), singularly or in combination, fails to anticipate the above underlined limitations obvious, together with all the other limitations of the claims.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RICARDO OSORIO whose telephone number is (571)272-7676. The examiner can normally be reached M-F 9 AM-5:30 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Boddie can be reached at 571-272-0666. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/RICARDO OSORIO/Primary Examiner, Art Unit 2625
Prosecution Insights