DETAILED ACTION
This action is responsive to 09/23/2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Objections
Claims 12-14 are objected to because of the following informalities: There is no antecedent basis for “said another first lens” recited in line 4 of claim 12. Claims 13-14 depend from claim 12. For this Office action, “said another first lens” will be interpreted as “another first lens”. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda et al. (US Pub. 2023/0014363), hereinafter Ikeda, in view of Heber et al. (US Pub. 2021/0223583), hereinafter Heber.
Regarding claim 1, Ikeda discloses a display apparatus (see fig. 1), comprising: a display area (display region AA-see fig. 1); a first lens having different viewing angle with a second lens disposed over a pixel in the display area (see, for example, fig. 6, which illustrates a first lens 71 disposed over a first light-emitting element 3-1, and a second lens 72 disposed over a second light-emitting element 3-2, and the display secures a wider viewing angle by the second light-emitting element 3-2 and the second lens 72-see [0107]); and a cover glass over the first display area, and the second display area (the display device 1 may include an overcoat layer or a cover substrate stacked on the counter electrode 22, first lenses 71, and second lenses 72 as necessary-see [0066]). Substrate is an insulating substrate and is a glass substrate (see [0045])).
Ikeda does not appear to expressly disclose the display apparatus being a vehicle apparatus comprising: a first seat and a second seat arranged at a front side of the vehicle apparatus; and a display area including a first display area and a second display area, the first display area disposed in front of the first seat and the second display area disposed in front of the second seat.
Heber is relied upon to teach a vehicle apparatus (see, for example, abstract, which teaches a method for presenting image content in two operating modes, B1 for viewing mode with a restricted viewing angle, and B2 for a viewing mode with an unrestricted viewing angle, and, for example, [0044] and [0092], wherein, the invented method and the invented display screen described can be used, e.g., in a motor vehicle) comprising: a first seat and a second seat arranged at a front side of the vehicle apparatus (see, for example, fig. 7 with description in [0092], wherein viewer 3 would correspond to a front-seat passenger, and viewer 4 would correspond to a driver seat); and a display area including a first display area and a second display area, the first display area disposed in front of the first seat and the second display area disposed in front of the second seat (see, for example, fig. 7, with description in, for example [0084], wherein two different image contents are radiated into different angular ranges W1and W2 corresponding respectively to viewers 3 and 4).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Heber with the invention of Ikeda such that the display device is a vehicle display device having a driver and a front passenger display portion, as taught by Heber, in order to provide a display device for which a switchable privacy effect for a display screen of plain design can be attained (see [0010]).
Regarding claim 20, Ikeda discloses further comprising: a polarization layer disposed beneath the cover glass and extending across the first display area and the second display area (see [0066]-the display device 1 may further include a polarizing plate).
Claims 2-3, 5-8, and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda in view of Heber, and further in view of AN et al. (US Pub. 2017/0365217), hereinafter AN.
Regarding claim 2, Ikeda teaches a low potential line (cathode power supply potential PVSS-see fig. 3), however, Ikeda in view of Heber does not appear to expressly teach further comprising: a low potential line at least partially surrounding outer peripheries of the first display area and the second display area and between the first display area and the second display area in a plan view of the vehicle apparatus.
An is relied upon to teach further comprising: a low potential line at least partially surrounding outer peripheries of the first display area and the second display area (second voltage wiring VW2 may include a first to fourth portions (VW2a, VW2b, VW2c, and VW2d) surrounding first and second display regions (DAa and Dab)-see fig. 1 with description in [0070]-[0071]) and between the first display area and the second display area in a plan view of the vehicle apparatus (auxiliary wiring AW disposed between the first and the second display regions (intermediate non-display region NDAb), and directly connected between first portion VW2a and second portion VW2b of the second wiring VW2-see fig. 1 and [0074]).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of AN with the inventions of Ikeda and Heber by routing a low potential line in a non-display area around and between the two display areas, as taught by AN, which constitutes combining prior art elements according to known methods to yield predictable results (i.e., routing and distributing power to the first and the second display areas).
Regarding 3, AN is further relied upon to teach wherein the low potential line supplying a low potential power voltage to a pixel circuit included in each of the first display area and the second display area that is less than a high potential power voltage supplied to the pixel circuit (second driving voltage (ELVSS) is lower than first driving voltage (ELVDD)-see [0064], [0071], and fig. 2).
Regarding claim 5, AN is further relied upon to teach further comprising: a high potential line that is above and below the first display area and the second display area, the high potential line supplying the high potential power voltage to the pixel circuit (first voltage wiring VW1 (for transmitting the first driving voltage ELVDD-see [0061]) has first and second portions (VW1a and VW1b) disposed on an upper side of first and second display regions (DAa, Dab) respectively, and third and fourth portions (VW1c and VW1d) respectively disposed on a lower side of the first and second display regions-see fig. 1 and [0067]).
Regarding claim 6, AN is further relied upon to teach wherein the high potential line includes a first high potential line above the first display area (VW1a-see fig. 1) and a second high potential line above the second display area (VW1b-see fig. 1), and the vehicle apparatus further comprises: a bridge that connects together the first high potential line and the second high potential line (see fig. 5, wherein VW1a is coupled (i.e., integrally formed with VW1b)).
Regarding claim 7, Ikeda in view Heber and AN does not appear to expressly teach wherein the first display area further includes a first contact hole through which the bridge and the first high potential line are connected, and the second display area further includes a second contact hole through which the bridge and the second high potential line are connected.
However, it would have been “obvious to try” connecting the first high potential line and the second high potential line via a bridge given that there are only a finite number of identified, predictable solutions for connecting the first high potential line to the second high potential line, with a reasonable expectation of success, i.e., the lines can be directly formed as an integrated structure if formed on the same layer, or bridged through contact holes if formed on different layers.
Regarding claim 8, AN is further relied upon to teach wherein a part of the low potential line between the first display area and the second display area extends along one end of the second display area (see fig. 1-auxiliary wiring AW).
Regarding claim 21, An is further relied upon to teach wherein the cover glass is disposed over and extends across the first display area and the second display area (see figs. 3-4D, wherein the entire display region (first and second display regions) is covered by an encapsulation layer 210, the topmost layer 213 being an inorganic layer that includes a material such as … silicon oxide-see [0105]).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of AN with the inventions of Ikeda and Heber, such that the cover glass extends across the first and the second display areas, as taught by AN, which constitutes combining prior art elements according to known methods to yield predictable results (i.e., providing a protective cover substrate on the display areas).
Claims 4, 9-10, and 15-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda in view of Heber and AN, and further in view of Park et al. (US Pub. 2021/0327362), hereinafter Park.
Regarding claim 4, Ikeda in view of Heber and AN teaches a gate driving circuit between the second display area and the low potential line in the plan view (a gate driving circuit (GDa, GDb) between the second display region and the auxiliary wiring on the intermediate non-display region to drive the second gate lines-see AN, [0012] and fig. 8).
However, Ikeda in view of Heber and AN does not appear to expressly teach further comprising: a dummy pixel between the first display area and the low potential line in the plan view.
Park is relied upon to teach further comprising: a dummy pixel between the first display area and the low potential line in the plan view (see figs. 3 and 5 and, with description in [0153]-dummy pixels DPX each has a load similar to that of a subpixel PX without emitting light to display an image, and are disposed in a non-display area, and may be used as a pixel for compensating for a load applied to scan lines GWL of a second display area DA2, which is smaller than a first display area DA1-see fig. 1).
Park, in for example, figs. 3 and 5 and, with description in [0153], teaches that dummy pixels DPX, disposed in a non-display area, each has a load similar to that of a subpixel PX without emitting light to display an image, and may be used as a pixel for compensating for a load applied to scan lines GWL of a second display area DA2, which is smaller than a first display area DA1-see fig. 1.
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Park with the inventions of Ikeda, Heber, and AN by using dummy pixels to compensate for loading difference between display areas, as taught by Park, in order to compensate for a load applied to scan lines GWL of a second display area DA2.
Regarding claim 9, AN is further relied upon to teach wherein each of the first display area and the second display area includes: a substrate (substrate 110-see fig. 3); an insulating layer over the substrate (buffer layer 111-see fig. 3); an electrode layer over the insulating layer (see fig. 3-first and second conductive layers (140, 160)); a planarization layer over the electrode layer(third insulating layer 170-see fig. 3); a bank layer over the planarization layer (pixel defining layer 190-see fig. 3); a first encapsulation layer over the bank layer (inorganic layer 211-see fig. 3); a second encapsulation layer over the first encapsulation layer (organic layer 212-see fig. 3); and a third encapsulation layer over the second encapsulation layer (second inorganic layer 213), wherein a first end of the low potential line extending along one end of the second display area is covered by the first encapsulation layer and a second end is covered by the planarization layer (see figs. 1-4D).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the display layer structure of AN with the inventions of Ikeda and Heber, which constitutes combining prior art elements according to known methods to yield predictable results (i.e., providing different insulating and planarization layers on which conductive layers of the display are formed).
Regarding claim 10, An is further relied upon to teach wherein each of the first display area and the second display area further includes: a pad in which a data driving circuit is disposed (pad units PDa, PDb, PDPa, and PDPb-see fig. 1 and [0063]-[0064]); and a data line (data lines DL-see fig. 2) and a high potential line extending from the pad (pads PDa and PDb may be connected to data lines-see [0066], and high potential lines (VW1c and VW1d extend from the pads P-see fig. 1 and [0064]), and wherein a first part of the low potential line between the first display area and the second display area extends along a first end of the second display area and a second part of the low potential line extends between the pad of the first display area and the high potential line of the first display area, and wherein the first part and the second part of the low potential line are perpendicular to each other (see fig. 1-auxiliary wiring AW is coupled to and perpendicular to VW2b).
Regarding claim 15, AN is further relied upon to teach wherein the first display area and the second display area are implemented on a single display panel (see fig. 1), and wherein a portion of the low potential line is disposed in a boundary region between the first display area and the second display area (auxiliary wiring AW-see fig. 1).
Regarding claim 16, AN is further relied upon to teach wherein a side surface and a portion of an upper surface of the portion of the low potential line are covered by the planarization layer, and wherein another portion of the upper surface of the low potential line is covered by the first encapsulation layer (see figs. 4C-4D).
Regarding claim 17, AN is further relied upon to teach wherein the second encapsulation layer and the third encapsulation layer extend into the boundary region between the first display area and the second display area (see figs. 3-4D).
Claims 11, 18-19, and 22-23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda in view of Heber, AN, and Park, and further in view of Kim et al. (US Pub. 2020/0411629), hereinafter Kim.
Regarding claim 11, Ikeda in view of Heber, AN, and Park does not appear to expressly teach further comprising: at least one dam on the low potential line extending along one end of the second display area, and the first encapsulation layer is on the at least one dam.
Kim is relied upon to teach further comprising: at least one dam on the low potential line extending along one end of the second area, and the first encapsulation layer is on the at least one dam (see, for example, fig. 2, which illustrates a dam (DAM) on a low potential line (VSS), and a first encapsulating layer (261) disposed on the dam).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Kim with the inventions of Ikeda, Heber, An, and Park by forming a dam on the low potential line, wherein the first encapsulation layer is disposed on the dam, as taught by Kim, which constitutes combining prior art elements according to known methods to yield predictable results.
Regarding claim 18, Ikeda in view of Heber, AN, and Park does not appear to expressly teach further comprising: a dam disposed between the portion of the low potential line and the dummy pixel.
Kim, in for example, fig. 2, illustrates a dam (DAM) on a low potential line (VVSS) and a first encapsulating layer (261) disposed on the dam. Having multiple dams in different locations along any edge of the display area simply constitutes mere duplication of parts, and mere duplication of parts has no patentable significance unless a new and unexpected result is produced (see MPEP 2144.04(VI)(B)).
Regarding claim 19, Kim is further relied upon to teach wherein the first encapsulation layer covers the dam and extends into the boundary region between the first display area and the second display area (see, for example, fig. 2, wherein, first encapsulation 261 extends and covers the dam).
Regarding claim 22, Ikeda in view of Heber, AN, and Park does not appear to expressly teach further comprising: a first dam disposed within the first encapsulation layer.
Kim, in for example, fig. 2, illustrates a dam (DAM) on a low potential line (VVSS) and a first encapsulating layer (261) disposed on the dam. Having multiple dams in different locations along any edge of the display area simply constitutes mere duplication of parts, and mere duplication of parts has no patentable significance unless a new and unexpected result is produced (see MPEP 2144.04(VI)(B)).
Regarding claim 23 Ikeda in view of Heber, AN, and Park does not appear to expressly teach wherein the first dam is disposed on each of the gate driving circuits in the first display area and the second display area, each first dam being adjacent to the low potential line, and wherein the first encapsulation layer is on the first dam, and the first dam is formed of a same material as a spacer disposed in at least one of the first display area or the second display area.
Kim, in for example, fig. 2, illustrates a dam (DAM) on a low potential line (VVSS) and a first encapsulating layer (261) disposed on the dam. Having multiple dams in different locations along any edge of the display area simply constitutes mere duplication of parts, and mere duplication of parts has no patentable significance unless a new and unexpected result is produced (see MPEP 2144.04(VI)(B)).
Claims 12-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda in view of Heber, and further in view of Xia (US Pub. 2023/0180585).
Regarding claim 12, Ikeda discloses a plurality of first lenses 71 each disposed on a first light-emitting element 3-1 (first lenses 71 a provided overlapping the respective first light emitting elements 3-1 in first region AAs1-see fig. 6 and [0074]), and a plurality of second lenses 72 each disposed on second light-emitting element 3-2 (second lenses 72 are provided overlapping second light-emitting elements 3-2 in second region AAs2-see [0049] and figs. 5-6).
However, Ikeda in view of Heber does not appear to expressly teach wherein the first lens is disposed on each of a plurality of organic light emitting diodes disposed in the first display area, and the second lens having a different shape from said another first lens.
Xia, in for example fig. 1, illustrates a first micro lens 1061 positioned in each pixel opening having a light emitting diode, and a second micro lens 1064 disposed to cover a plurality of pixel openings, and as shown in fig. 1, first micro lens 1061 has a different shape from second micro lens 1064.
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Xia with the inventions of Ikeda and Heber, such that a single lens may be disposed to cover a plurality of pixels, which, as taught by Xia, to improve viewing angle (see [0004]).
Regarding claim 13, Ikeda in view of Heber and Xia does not appear to expressly teach wherein the first lens and said another first lens have a rectangular shape and the second lens has a circular shape.
However, change of shape of any one of the lenses is a matter of design choice, which a person of ordinary skill in the art would have found obvious absent any persuasive evidence that the particular configuration patentably significant (see MPEP 2144.04 (V)(B).
Regarding claim 14, Xia is further relied upon to teach wherein the first lens is larger than said another first lens (see fig. 1).
Claim 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda in view of Heber, An, and Park, and further in view of Lee (US Pub. 2019/0096336).
Regarding claim 24, Ikeda in view of Heber, An, and Park does not appear to expressly teach further comprising: a reference voltage line supplying a reference voltage, wherein a second electrode of a third transistor is connected to the reference voltage line.
Lee is relied upon to teach further comprising: a reference voltage line supplying a reference voltage, wherein a second electrode of a third transistor is connected to the reference voltage line (see, for example, fig. 2, which illustrates a reference voltage line supplying a reference voltage VREF, wherein, an electrode of a third transistor T3 is coupled to the reference voltage line).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Lee with the inventions of Ikeda in view of Heber, An, and Park, by including a reference voltage line for supplying a reference voltage to a gate of a driving transistor via a third transistor, as taught by Lee, in order to initialize a potential of the first node N1 to VREF (see [0073]-[0074]).
Claim 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda in view of Heber, and further in view of Yamazaki.
Regarding claim 25, Ikeda in view of Heber does not appear to expressly teach wherein the first display area and the second display area have different sizes.
Yamazaki, in for example, fig. 1A with description in, for example, [0041] teaches a display apparatus that includes a plurality of display panels 11A-11D of different sizes.
Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Yamazaki with the inventions of Ikeda and Heber such that the first and second display areas are different in size, as taught by Yamazaki, in order to form a complex-shaped instrument panel using a curved display (see [0006]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SARDIS F AZONGHA whose telephone number is (571)270-7706. The examiner can normally be reached 10AM-7:00PM.
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/SARDIS F AZONGHA/Primary Examiner, Art Unit 2627
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