DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
2. The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore,
A. “a serially connected downstream content-addressable memory control cell” (Claim 14. Please note that there are “arrows”, each from one to another, 150-1 to 150-N-1, has an “arrow”. However, the “arrow(s)” do NOT recite that memory control cell being “serially connected downstream” in FIG. 9) and
B. “another control signal from a serially connected upstream control cell” (Claim 21. Please note that there are “arrows”, each from one to another, 150-1 to 150-N-1, has an “arrow”, “downstream” flow from top to bottom. However, there is NO “another control signal” illustrate “upstream” flow from bottom to top)
must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
3. Claims 14-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
A1. Regarding Claim 14’s limitation
“providing, from the column driver circuit, the control signal or an inverse of the control signal to a serially connected downstream column driver circuit of a serially connected downstream content-addressable memory control cell” is NOT clear because:
A1a. There are disclosure in the original specification and FIG. 9 and 12 supporting that the “column driver circuit” being “a serially connected”.
A1b. However, the “arrow” from each of column driver 150-1 to 150-N-1 does not recite that the “content-addressable memory control cell” (each pixel data memory 100 in FIG. 9) being “a serially connected”.
To advance prosecution, the Examiner interprets the above either as “serially connected downstream content-addressable memory control cell” or “connected downstream content-addressable memory control cell”.
A2. Also, regarding Claim 14’s limitation
“propagating the control signal or the inverse of the control signal to a pixel active array of the electronic display using the column driver circuit, the serially connected downstream column driver circuit, or both” is NOT clear because:
A2a. What is the differences between “the column driver circuit” and “the serially connected downstream column driver circuit”?
A2b. Does “the serially connected downstream column driver circuit” refer to “the column driver circuit”?
A2c. What does “or both” mean? Which is one and which is the other of both?
A2d. Does “or both” means “the serially connected downstream column driver circuit” is connected to both “pixel active array” and “the column driver circuit”?
To advance prosecution, the Examiner interprets the above either as “the column driver circuit” is connected to “pixel active array”.
B. Regarding Claim 21’s limitation
“wherein the column driver of each control cell is configured to propagate the control signal of its control cell or another control signal from a serially connected upstream control cell” is NOT clear because:
Ba. Since “or another control signal from a serially connected upstream control cell” is an alternative limitation, it can be omitted and rejected by the same analyses and rationales as shown below under 35 U.S.C. 102(a)(1) in item 4.
Bb. Is “upstream” the same as “downstream”?
Bc. Which direction is “upstream” and which direction is “downstream”?
Bd. Is “control cell” the same as “serially connected upstream control cell”?
To advance prosecution, the Examiner interprets the above “the column driver of each serially connected control cell is configured to propagate the control signal of its control cell or another control signal from a serially connected upstream control cell” wherein “or another control signal from a serially connected upstream control cell” is omitted.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
4. Claim(s) 21 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cok et al. (US Patent/PGPub. No. 20170330509).
Regarding Claim 21, (Currently Amended)
Cok et al. teach
an electronic device ([0072], FIG. 1-2, i.e. distributed pulse-width modulation system 10 can be a display system) comprising:
data processing circuitry ([0069], FIG. 1, i.e. system controller 40) configured to generate pixel data ([0099], FIG. 11, i.e. data signals) for a plurality of display pixels ([0072], FIG. 1-2, i.e. light emitters 50 … a pixel includes a single output device 27); and
an electronic display ([0072], FIG. 1-2, i.e. distributed pulse-width modulation system 10 can be a display system) comprising:
a pixel active array ([0072], FIG. 1-2, i.e. light emitters 50 … used herein, a pixel includes a single output device 27) comprising the plurality of display pixels ([0072], FIG. 1-2, i.e. light emitters 50 … output device 27); and
a plurality of control cells ([0069], FIG. 2, 6, & 9-13, i.e. pulse-width modulation elements 20 (please note that the Examiner interprets “control cells” as ALL components in “pulse-width modulation elements 20” EXCEPT “output device 27” or “light emitter 50”. Especially as shown in FIG. 13 that “pulse-width modulation elements 20” with “iLED Drivers 26” as “control cells” and “light emitters 50 … output device 27” as “pixel arrays”) each corresponding to one respective display pixel of the pixel active array (i.e. please see above citation(s)), wherein each control cell comprises:
a column driver ([0069], FIG. 2, 6, & 9-13, i.e. digital memory 28) configured to propagate a control signal ([0096], FIG. 11, i.e. output of the comparator circuit 90) based on the pixel data corresponding to the one respective display pixel to the pixel active array ([0072], FIG. 1-2, i.e. light emitters 50 … used herein, a pixel includes a single output device 27),
wherein the column driver of each control cell is configured to propagate ([0087], FIG. 2, 6, & 9-13, i.e. “the next set of multi-bit digital values and corresponding clock rates are calculated or provided in step 155” (output signal from comparator circuit 90, which is a part of digital memory 28, propagated from digital memory 28 to drive circuit 26 driving output device 27)) the control signal of its control cell (i.e. please see above citation(s)) or another control signal from a serially connected upstream control cell (i.e. alternative limitation(s) omitted).
5. Claim(s) 1, 14-15, and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cok et al. (US Patent/PGPub. No. 20170330509) in view of Yang et al. (US Patent/PGPub. No. 20240249768).
Regarding Claim 1, (Currently Amended)
Cok et al. teach
an electronic display ([0072], FIG. 1-2, i.e. distributed pulse-width modulation system 10 can be a display system) comprising:
a pixel active array ([0072], FIG. 1-2, i.e. light emitters 50 … used herein, a pixel includes a single output device 27); and
a plurality of content-addressable memory ([0099], FIG. 11, i.e. content addressable memory (CAM) as the digital memory 28) control cells ([0069], FIG. 2, 6, & 9-13, i.e. pulse-width modulation elements 20 (please note that the Examiner interprets “control cells” as ALL components in “pulse-width modulation elements 20” EXCEPT “output device 27” or “light emitter 50”. Especially as shown in FIG. 13 that “pulse-width modulation elements 20” with “iLED Drivers 26” as “control cells” and “light emitters 50 … output device 27” as “pixel arrays”) configured to control display pixels ([0071], FIG. 1-2, i.e. digital memory 28 and the drive circuit 26 … with output drivers (such as transistors) controlling the output device 27) of the pixel active array using control signals ([0099], FIG. 11, i.e. the output state flip-flop 92 is toggled from an off state to an on state) propagated to the pixel active array on column lines (FIG. 1 & 10-13, i.e. as shown by the figure(s) column lines in FIGs. 1 and 13, and as Vdd in FIGs. 10-12) by column driver circuits ([0069], FIG. 2, 6, & 9-13, i.e. digital memory 28) of the content-addressable memory control cells (i.e. please see above citation(s)).
However, Cok et al. do not explicitly teach
wherein each column driver circuit other than a last column driver circuit is serially connected to, and configured to provide a respective control signal of the control signals to, a serially connected downstream column driver circuit.
In the same field of endeavor, Yang et al. teach
wherein each column driver circuit other than ([0047], FIG. 5, i.e. MSB ML (left most match line ML) and Middle/Center Bit ML (as shown in the figure (middle match line ML)) a last column driver circuit ([0047], FIG. 5, i.e. LSB ML (right most match line ML)) is serially connected to ([0048], FIG. 5, i.e. the CAM serially performs matching from MSB to LSB), and configured to provide a respective control signal of the control signals ([0047], FIG. 5, i.e. matching result) to, a serially connected downstream column driver circuit ([0047], FIG. 5, i.e. MSB ML (left most match line ML)).
It would have been obvious to a person having ordinary skill in the art at the time the invention’s effective date was filed to combine Cok et al. teaching of display comprising content-addressable memory driving display pixels with Yang et al. teaching of a CAM comprising match line circuitries connected in series to effectively perform matching content data not only finds an exact match, it also finds an interval that the input belongs to utilizing CAM comprising match line circuitries connected in series (Yang et al.’s [0045]).
Regarding Claim 14, (Currently Amended)
Cok et al. teach
a method for controlling ([0024], FIG. 11, i.e. method of controlling a distributed pulse-width modulation system) an electronic display ([0072], FIG. 1-2, i.e. distributed pulse-width modulation system 10 can be a display system) comprising:
receiving a control signal ([0096], FIG. 11, i.e. output of the comparator circuit 90 … to drive the output device 27) from a comparator ([0096], FIG. 11, i.e. comparator circuit 90) of a content-addressable memory ([0099], FIG. 11, i.e. content addressable memory (CAM) as the digital memory 28) control cell ([0069], FIG. 2, 6, & 9-13, i.e. pulse-width modulation elements 20 (please note that the Examiner interprets “control cells” as ALL components in “pulse-width modulation elements 20” EXCEPT “output device 27” or “light emitter 50”. Especially as shown in FIG. 13 that “pulse-width modulation elements 20” with “iLED Drivers 26” as “control cells” and “light emitters 50 … output device 27” as “pixel arrays”) into a column driver circuit ([0069], FIG. 2, 6, & 9-13, i.e. digital memory 28) of the content-addressable memory control cell (i.e. please see above citation(s));
[providing, from the column driver circuit, the control signal or an inverse of the control signal to a serially connected downstream column driver circuit of a serially connected downstream content-addressable memory control cell; (taught by Yang et al. please see below)]
propagating the control signal ([0087], FIG. 8, i.e. the next set of multi-bit digital values and corresponding clock rates are calculated or provided in step 155) or the inverse of the control signal to a pixel active array of the electronic display ([0072], FIG. 1-2, i.e. light emitters 50 … used herein, a pixel includes a single output device 27) using the column driver circuit ([0069], FIG. 2, 6, & 9-13, i.e. digital memory 28)
[, the serially connected downstream column driver circuit, or both; (taught by Yang et al. please see below)] and
switching a display pixel to turn off ([0099], FIG. 11, i.e. “from an off state to an on state” (please note that Cok et al. disclose that the counter output turns “on” the pixel instead of “off”. However, it’s well-known in digital designs including Boolean operations can easily negate/invert signal “on” to “off” or vice versa)) in response to the control signal (i.e. please see above citation(s)).
However, Cok et al. do not explicitly teach
providing, from the column driver circuit, the control signal or an inverse of the control signal to a serially connected downstream column driver circuit of a serially connected downstream content-addressable memory control cell;
the serially connected downstream column driver circuit, or both.
In the same field of endeavor, Yang et al. teach
providing, from the column driver circuit ([0047], FIG. 5, i.e. ML (match line ML)), the control signal ([0047], FIG. 5, i.e. matching result) or an inverse of the control signal to a serially connected downstream column driver circuit ([0048], FIG. 5, i.e. the CAM serially performs matching from MSB to LSB) of a serially connected downstream content-addressable memory control cell ([0047], FIG. 5, i.e. MSB ML (left most match line ML));
the serially connected downstream column driver circuit ([0047], FIG. 5, i.e. MSB ML (left most match line ML)), or both.
It would have been obvious to a person having ordinary skill in the art at the time the invention’s effective date was filed to combine Cok et al. teaching of display comprising content-addressable memory driving display pixels with Yang et al. teaching of a CAM comprising match line circuitries connected in series to effectively perform matching content data not only finds an exact match, it also finds an interval that the input belongs to utilizing CAM comprising match line circuitries connected in series (Yang et al.’s [0045]).
Regarding Claim 15, (Currently Amended)
the method of claim 14, wherein
Cok et al. teach
the control signal or the inverse of the control signal is propagated to the pixel active array (i.e. please see above citation(s)) by way of the downstream column driver circuit ([0069], FIG. 2, 6, & 9-13, i.e. digital memory 28).
Regarding Claim 21, (Currently Amended)
Cok et al. teach
an electronic device ([0072], FIG. 1-2, i.e. distributed pulse-width modulation system 10 can be a display system) comprising:
data processing circuitry ([0069], FIG. 1, i.e. system controller 40) configured to generate pixel data ([0099], FIG. 11, i.e. data signals) for a plurality of display pixels ([0072], FIG. 1-2, i.e. light emitters 50 … a pixel includes a single output device 27); and
an electronic display ([0072], FIG. 1-2, i.e. distributed pulse-width modulation system 10 can be a display system) comprising:
a pixel active array ([0072], FIG. 1-2, i.e. light emitters 50 … used herein, a pixel includes a single output device 27) comprising the plurality of display pixels ([0072], FIG. 1-2, i.e. light emitters 50 … output device 27); and
a plurality of control cells ([0069], FIG. 2, 6, & 9-13, i.e. pulse-width modulation elements 20 (please note that the Examiner interprets “control cells” as ALL components in “pulse-width modulation elements 20” EXCEPT “output device 27” or “light emitter 50”. Especially as shown in FIG. 13 that “pulse-width modulation elements 20” with “iLED Drivers 26” as “control cells” and “light emitters 50 … output device 27” as “pixel arrays”) each corresponding to one respective display pixel of the pixel active array (i.e. please see above citation(s)), wherein each control cell comprises:
a column driver ([0069], FIG. 2, 6, & 9-13, i.e. digital memory 28) configured to propagate a control signal ([0096], FIG. 11, i.e. output of the comparator circuit 90 … to drive the output device 27) based on the pixel data corresponding to the one respective display pixel to the pixel active array ([0072], FIG. 1-2, i.e. light emitters 50 … used herein, a pixel includes a single output device 27).
However, Cok et al. do not explicitly teach
wherein the column driver of each control cell is configured to propagate the control signal of its control cell or another control signal from a serially connected upstream control cell.
In the same field of endeavor, Yang et al. teach
wherein the column driver ([0047], FIG. 5, i.e. ML (match line)) of each control cell is configured to propagate ([0048], FIG. 5, i.e. the CAM serially performs matching from MSB to LSB) the control signal of its control cell ([0047], FIG. 5, i.e. matching result) or another control signal from a serially connected upstream control cell ([0047], FIG. 5, i.e. LSB ML (right most match line ML)).
It would have been obvious to a person having ordinary skill in the art at the time the invention’s effective date was filed to combine Cok et al. teaching of display comprising content-addressable memory driving display pixels with Yang et al. teaching of a CAM comprising match line circuitries connected in series to effectively perform matching content data not only finds an exact match, it also finds an interval that the input belongs to utilizing CAM comprising match line circuitries connected in series (Yang et al.’s [0045]).
6. Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cok et al. (US Patent/PGPub. No. 20170330509) and Yang et al. (US Patent/PGPub. No. 20240249768) in view of Wang et al. (US Patent/PGPub. No. 20210304682).
Regarding Claim 2, (Original)
Cok et al. and Yang et al. teach
the electronic display of claim 1.
However, Cok et al. and Yang et al. do not explicitly teach
wherein the column driver circuits comprise:
a dynamic column driver;
a static column driver;
an analog complementary metal-oxide-semiconductor multiplexer (CMOS- mux) column driver; or
a digital multiplexer-based column driver.
In the same field of endeavor, Wang et al. teach
wherein the column driver circuits ([0077], FIG. 6-7, i.e. column driver 62) comprise:
a dynamic column driver;
a static column driver;
an analog complementary metal-oxide-semiconductor multiplexer (CMOS- mux) column driver; or
a digital multiplexer-based column driver ([0077], FIG. 6-7, i.e. multiplexing circuit 96 that receives image data 98 of size N bits from the column driver 62).
It would have been obvious to a person having ordinary skill in the art at the time the invention’s effective date was filed to combine Cok et al. and Yang et al. teaching of display comprising content-addressable memory driving display pixels with Wang et al. teaching of display comprising column driver having digital multiplexer to effectively transmit image data to respective pixels utilizing column driver having digital multiplexer (Wang et al.’s [0077]).
7. Claim(s) 11-12 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cok et al. (US Patent/PGPub. No. 20170330509) and Yang et al. (US Patent/PGPub. No. 20240249768) in view of LIM et al. (US Patent/PGPub. No. 20220137743).
Regarding Claim 11, (Currently Amended)
Cok et al. and Yang et al. teach
the electronic display of claim 1.
However, Cok et al. and Yang et al. do not explicitly teach
wherein the pixel active array comprises rows and columns of display pixels, wherein the number of column lines used by the driver circuits exceeds the number of columns of display pixels of the pixel active array.
In the same field of endeavor, LIM et al. teach
wherein the pixel active array ([0203], FIG. 12, i.e. PX11 to PX14, PX21 to PX24, and PX31 to PX34) comprises rows ([0203], FIG. 12, i.e. SL1 to SL6) and columns ([0203], FIG. 12, i.e. DL1 to DL4) of display pixels, wherein the number of column lines ([0206], FIG. 12, i.e. pixel data signal PD1… CD4 (that is, four pixel data signals PD1-PD4 and four compensation signals CD1-CD4, total of 8 lines)) used by the column driver circuits ([0204], FIG. 12, i.e. data driving circuit 100C3-1) exceeds the number of columns of display pixels ([0206], FIG. 12, i.e. data line DL1… DL4 (that is, total of 4 lines)) of the pixel active array (i.e. please see above citation(s)).
It would have been obvious to a person having ordinary skill in the art at the time the invention’s effective date was filed to combine Cok et al. and Yang et al. teaching of display comprising content-addressable memory driving display pixels with LIM et al. teaching of display comprising column driver having multiplexers to effectively transmit image data and/or compensating data to respective pixels utilizing column driver having multiplexers selecting according data lines (LIM et al.’s [0011]).
Regarding Claim 12, (Currently Amended)
the electronic display of claim 11, wherein
LIM et al. teach
the number of column lines ([0206], FIG. 12, i.e. pixel data signal PD1… CD4 (that is, four pixel data signals PD1-PD4 and four compensation signals CD1-CD4, total of 8 lines)) used by the column driver circuits is at least double ([0206], FIG. 12, i.e. (that is, 8 = 4x2 )) the number of columns of display pixels ([0206], FIG. 12, i.e. data line DL1… DL4 (that is, total of 4 lines)) of the pixel active array (i.e. please see above citation(s)).
Regarding Claim 22, (Currently Amended)
Cok et al. and Yang et al. teach
the electronic device of claim 21.
However, Cok et al. and Yang et al. do not explicitly teach
wherein the column driver of each control cell comprises a digital multiplexer configured to select between the control signal of its control cell or the another control signal corresponding to a different control cell.
In the same field of endeavor, Wang et al. teach
wherein the column driver of each control cell ([0070], FIG. 6-7, i.e. columns of pixels 72) comprises a digital multiplexer ([0077], FIG. 6-7, i.e. multiplexing circuit 96 that receives image data 98 of size N bits) configured to select between the control signal of its control cell ([0077], FIG. 6-7, i.e. multiplexing control signal (MUX control signal) 100) or the another control signal corresponding to a different control cell.
It would have been obvious to a person having ordinary skill in the art at the time the invention’s effective date was filed to combine Cok et al. teaching of display comprising content-addressable memory driving display pixels with Wang et al. teaching of display comprising column driver having digital multiplexer to effectively transmit image data to respective pixels utilizing column driver having digital multiplexer (Wang et al.’s [0077]).
Response to Amendment/Argument
8. Applicant's arguments filed 09/04/2026 have been fully considered but they are not persuasive.
On P. 3-4, applicant argues that Cok et al. do not teach “control signals propagated to the pixel active array on column lines by column driver circuits” by arguing mapping of components to the claims. However, the Examiner respectfully disagrees because components mapping to the claims have been revised. Especially, the disputed limitation of
“control signals ([0096], FIG. 11, i.e. output of the comparator circuit 90) propagated ([0087], FIG. 2, 6, & 9-13, i.e. “the next set of multi-bit digital values … provided in step 155” (output signal from comparator circuit 90, which is a part of digital memory 28 comparing digital value to stored value, propagated from digital memory 28 to drive circuit 26 driving output device 27)) to the pixel active array ([0072], FIG. 1-2, i.e. light emitters 50 … used herein, a pixel includes a single output device 27) on column lines ([0069], FIG. 1-2, i.e. drive circuit 26) by column driver circuits ([0069], FIG. 2, 6, & 9-13, i.e. digital memory 28)”.
9. Applicant’s arguments with respect to claim(s) 1, 14, and 21 regarding the feature “serially connected downstream column driver circuit”, “serially connected downstream content-addressable memory control cell”, and/or “serially connected upstream control cell” have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Allowable Subject Matter
10. Claim(s) 3-10, 13, 16-20, and 23 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
11. The reasons for allowance have been set forth in the Non-Final Office Action dated 06/04/2026.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VINH T. LAM whose telephone number is (571) 270-3704. The examiner can normally be reached Monday to Friday 8:00 AM to 5:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nitin K Patel can be reached at (571) 272-7677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/VINH T LAM/Primary Examiner, Art Unit 2628
Prosecution Insights