DETAILED ACTION
Status of the Claims
The filing dated 9/29/25 is entered. Claims 1-20 are pending.
Foreign Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statements
The information disclosure statement (IDS) submitted on 9/29/26 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4, 6-11, and 14-20 is/are rejected under 35 U.S.C. 102(a)(a) as being anticipated by Song, US-20200075701.
In regards to claim 1, Song discloses a display device (Par. 0003 display panel) comprising: a substrate (Fig. 5b, 11 substrate body) including a display area (Fig. 5a, 21 light emitting region) and a transmissive area (Fig. 5a, 22 transparent region); a plurality of sub-pixels (Fig. 3, sub-pixel; Par. 0027 “a plurality of sub-pixels, arranged on the substrate, each of the plurality of sub-pixels comprising a light emitting region and a first transparent region”) disposed in the display area (Fig. 5a, 21 light emitting region) on the substrate (Fig. 5b, 11 substrate body); a driving thin film transistor (Fig. 3, driving TFT; Fig. 5a-d, 211 driving TFT); disposed in each of the plurality of sub-pixels (Fig. 3, sub-pixel; Par. 0027 “a plurality of sub-pixels, arranged on the substrate, each of the plurality of sub-pixels comprising a light emitting region and a first transparent region”), the driving thin film transistor (Fig. 3, driving TFT; Fig. 5a-d, 211 driving TFT); including a gate electrode (Fig. 3, driving TFT gate; Fig. 5a-d, 211 driving TFT gate), a source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source), a drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain), and an active layer (Fig. 3, driving TFT active layer; Fig. 5a-d, 211 driving TFT active layer); a first electrode (Fig. 3, VDD electrode; Fig. 5a-d, VDD electrode) disposed in each of the plurality of sub-pixels (Fig. 3, sub-pixel; Par. 0027 “a plurality of sub-pixels, arranged on the substrate, each of the plurality of sub-pixels comprising a light emitting region and a first transparent region”) and electrically connected to either the source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source) or the drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain); and a plurality of capacitors (Fig. 3, 220 capacitor) including a first capacitor electrode (Fig. 5a-d, 2202 second capacitor electrode) electrically connected to the gate electrode (Fig. 3, driving TFT gate; Fig. 5a-d, 211 driving TFT gate), and a second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode) electrically connected to either the source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source) or the drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain), wherein the first capacitor electrode (Fig. 5a-d, 2202 second capacitor electrode) and the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode) overlap each other in the transmissive area (Fig. 5a, 22 transparent region).
In regards to claim 15, Song discloses a display device (Par. 0003 display panel) comprising: a substrate (Fig. 5b, 11 substrate body) including a circuit area (Fig. 5a, 21 light emitting region) and a light emitting area (Fig. 5a, 22 transparent region; external light is emitted through the transparent region); a plurality of sub-pixels (Fig. 3, sub-pixel; Par. 0027 “a plurality of sub-pixels, arranged on the substrate, each of the plurality of sub-pixels comprising a light emitting region and a first transparent region”) on the substrate (Fig. 5b, 11 substrate body); a driving thin film transistor (Fig. 3, driving TFT; Fig. 5a-d, 211 driving TFT); disposed in each of the plurality of sub-pixels (Fig. 3, sub-pixel; Par. 0027 “a plurality of sub-pixels, arranged on the substrate, each of the plurality of sub-pixels comprising a light emitting region and a first transparent region”), the driving thin film transistor (Fig. 3, driving TFT; Fig. 5a-d, 211 driving TFT); including a gate electrode (Fig. 3, driving TFT gate; Fig. 5a-d, 211 driving TFT gate), a source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source), a drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain), and an active layer (Fig. 3, driving TFT active layer; Fig. 5a-d, 211 driving TFT active layer); a first electrode (Fig. 3, VDD electrode; Fig. 5a-d, VDD electrode) disposed in each of the plurality of sub-pixels (Fig. 3, sub-pixel; Par. 0027 “a plurality of sub-pixels, arranged on the substrate, each of the plurality of sub-pixels comprising a light emitting region and a first transparent region”) and electrically connected to either the source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source) or the drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain); and a capacitor (Fig. 3, 220 capacitor) including a first capacitor electrode (Fig. 5a-d, 2202 second capacitor electrode) electrically connected to the gate electrode (Fig. 3, driving TFT gate; Fig. 5a-d, 211 driving TFT gate), and a second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode) electrically connected to either the source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source) or the drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain), wherein the first capacitor electrode (Fig. 5a-d, 2202 second capacitor electrode) and the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode) overlap each other in the light emitting area (Fig. 5a, 22 transparent region; external light is emitted through the transparent region).
In regards to claim 2, Song discloses each of the plurality of capacitors (Fig. 3, 220 capacitor) further includes: a first capacitor electrode extension part (Fig. 5a-d, portion of 2202 second capacitor electrode in 21 light emitting region) extending from the display area (Fig. 5a, 21 light emitting region) to the transmissive area (Fig. 5a, 22 transparent region) and connecting the gate electrode (Fig. 3, driving TFT gate; Fig. 5a-d, 211 driving TFT gate) with the first capacitor electrode (Fig. 5a-d, 2202 second capacitor electrode); and a second capacitor electrode extension part (Fig. 5a-d, portion of 2201 first capacitor electrode in 21 light emitting region) extending from the display area (Fig. 5a, 21 light emitting region) to the transmissive area (Fig. 5a, 22 transparent region) and connecting the source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source) or the drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain) with the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode).
In regards to claim 3, Song discloses the first capacitor electrode extension part (Fig. 5a-d, portion of 2202 second capacitor electrode in 21 light emitting region) and the second capacitor electrode extension part (Fig. 5a-d, portion of 2201 first capacitor electrode in 21 light emitting region) overlap each other in the display area (Fig. 5a, 21 light emitting region) and the transmissive area (Fig. 5a, 22 transparent region; Fig. 5a-d portion of 2202 second capacitor electrode in 21 light emitting region and portion of 2201 first capacitor electrode in 21 light emitting region overlap in both 21 light emitting region and 22 transparent region).
In regards to claim 4, Song discloses the first capacitor electrode (Fig. 5a-d, 2202 second capacitor electrode) and the first capacitor electrode extension part (Fig. 5a-d, portion of 2202 second capacitor electrode in 21 light emitting region) are formed as one body (Fig. 5a-d, 2202 second capacitor electrode), and the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode) and the second capacitor electrode extension part (Fig. 5a-d, portion of 2201 first capacitor electrode in 21 light emitting region) are formed as one body (Fig. 5a-d, 2201 first capacitor electrode).
In regards to claim 6, Song discloses the first capacitor electrode (Fig. 5a-d, 2202 second capacitor electrode) is formed of a same material on a same layer as the active layer (Fig. 3, driving TFT active layer; Fig. 5a-d, 211 driving TFT active layer; Par. 0079 capacitor electrode is formed of ITO; Par. 0086 TFT made of ITO; 2202 second capacitor electrode is formed on insulating layer 30 same as TFT 211).
In regards to claim 7, Song discloses the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode) is disposed above either the source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source) or the drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain).
In regards to claim 8, Song discloses at least one connection electrode (Fig. 5a-d, portion of 2113 at contact of VDD electrode) connecting either the source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source) or the drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain) with the first electrode (Fig. 3, VDD electrode; Fig. 5a-d, VDD electrode), and wherein the at least one connection electrode (Fig. 5a-d, portion of 2113 at contact of VDD electrode) is formed of a same material on a same layer as the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode and 2113 are on same layer; Par. 0079 capacitor electrode is formed of ITO; Par. 0086 TFT made of ITO).
In regards to claim 9, Song discloses the at least one connection electrode (Fig. 5a-d, portion of 2113 at contact of VDD electrode) and the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode) are formed as one body (Fig. 5a-d, portion of 2113 at contact of VDD electrode and Fig. 5a-d, 2201 first capacitor electrode are one body).
In regards to claim 10, Song discloses the at least one connection electrode (Fig. 5a-d, portion of 2113 at contact of VDD electrode) is connected to the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode) through a second capacitor electrode extension part (Fig. 5a-d, portion of 2201 first capacitor electrode in 21 light emitting region), and wherein the second capacitor electrode extension part (Fig. 5a-d, portion of 2201 first capacitor electrode in 21 light emitting region) is formed of a same material on a same layer as the gate electrode (Fig. 3, driving TFT gate; Fig. 5a-d, 211 driving TFT gate and portion of 2201 first capacitor electrode in 21 light emitting region; Par. 0079 capacitor electrode is formed of ITO; Par. 0086 TFT made of ITO).
In regards to claim 11, Song discloses the first electrode (Fig. 3, VDD electrode; Fig. 5a-d, VDD electrode) includes a first sub-electrode (Fig. 5a-d, portion of VDD electrode one side of contact hole) and a second sub-electrode (Fig. 5a-d, portion of VDD electrode other side of contact hole) spaced apart from each other, wherein the first sub-electrode (Fig. 5a-d, portion of VDD electrode one side of contact hole) is electrically connected to either the source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source) or the drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain) through a first connection electrode (Fig. 3, VDD electrode; Fig. 5a-d, VDD electrode), and the second sub-electrode (Fig. 5a-d, portion of VDD electrode other side of contact hole) is electrically connected to either the source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source) or the drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain) through a second connection electrode (Fig. 5a-d, portion of 2113 at contact of VDD electrode), and wherein the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode) constituting one capacitor of the plurality of capacitors (Fig. 3, 220 capacitor) is connected to the first connection electrode (Fig. 3, VDD electrode; Fig. 5a-d, VDD electrode).
In regards to claim 14, Song discloses a shielding layer (Fig. 5a-d, 30 insulating layer) disposed between the second capacitor electrode extension part (Fig. 5a-d, portion of 2201 first capacitor electrode in 21 light emitting region) and the first electrode (Fig. 3, VDD electrode; Fig. 5a-d, VDD electrode) of the second sub-pixel (Fig. 3, sub-pixel; Par. 0027 “a plurality of sub-pixels (Fig. 3, sub-pixel; Par. 0027 “a plurality of sub-pixels, arranged on the substrate, each of the plurality of sub-pixels comprising a light emitting region and a first transparent region”).
In regards to claim 16, Song discloses the capacitor (Fig. 3, 220 capacitor) further includes: a first capacitor electrode extension part (Fig. 5a-d, portion of 2202 second capacitor electrode in 21 light emitting region) extending from the circuit area (Fig. 5a, 21 light emitting region) to the light emitting area (Fig. 5a, 22 transparent region; external light is emitted through the transparent region) and connecting the gate electrode (Fig. 3, driving TFT gate; Fig. 5a-d, 211 driving TFT gate) with the first capacitor electrode (Fig. 5a-d, 2202 second capacitor electrode); and a second capacitor electrode extension part (Fig. 5a-d, portion of 2201 first capacitor electrode in 21 light emitting region) extending from the circuit area (Fig. 5a, 21 light emitting region) to the light emitting area (Fig. 5a, 22 transparent region; external light is emitted through the transparent region) and connecting either the source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source) or the drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain) with the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode).
In regards to claim 17, Song discloses the first capacitor electrode extension part (Fig. 5a-d, portion of 2202 second capacitor electrode in 21 light emitting region) and the second capacitor electrode extension part (Fig. 5a-d, portion of 2201 first capacitor electrode in 21 light emitting region) overlap each other in the circuit area (Fig. 5a, 21 light emitting region) and the light emitting area (Fig. 5a, 22 transparent region; external light is emitted through the transparent region; Fig. 5a-d portion of 2202 second capacitor electrode in 21 light emitting region and portion of 2201 first capacitor electrode in 21 light emitting region overlap in both 21 light emitting region and 22 transparent region).
In regards to claim 18, Song discloses the first capacitor electrode (Fig. 5a-d, 2202 second capacitor electrode) and the first capacitor electrode extension part (Fig. 5a-d, portion of 2202 second capacitor electrode in 21 light emitting region) are formed as one body (Fig. 5a-d, 2202 second capacitor electrode), and the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode) and the second capacitor electrode extension part (Fig. 5a-d, portion of 2201 first capacitor electrode in 21 light emitting region) are formed as one body (Fig. 5a-d, 2201 first capacitor electrode).
In regards to claim 19, Song discloses the first capacitor electrode (Fig. 5a-d, 2202 second capacitor electrode) and the first capacitor electrode extension part (Fig. 5a-d, portion of 2202 second capacitor electrode in 21 light emitting region) are formed of a same material on a same layer as the active layer (Fig. 3, driving TFT active layer; Fig. 5a-d, 211 driving TFT active layer; Par. 0079 capacitor electrode is formed of ITO; Par. 0086 TFT made of ITO; 2202 second capacitor electrode is formed on insulating layer 30 same as TFT 211).
In regards to claim 20, Song discloses the second capacitor electrode (Fig. 5a-d, 2201 first capacitor electrode) and the second capacitor electrode extension part (Fig. 5a-d, portion of 2201 first capacitor electrode in 21 light emitting region) are disposed above either the source electrode (Fig. 3, driving TFT source; Fig. 5a-d, 211 driving TFT source) or the drain electrode (Fig. 3, driving TFT drain; Fig. 5a-d, 211 driving TFT drain).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Song, US-20200075701.
In regards to claim 5, Song discloses the first capacitor electrode (Fig. 5a-d, 2202 second capacitor electrode) and the first capacitor electrode extension part (Fig. 5a-d, portion of 2202 second capacitor electrode in 21 light emitting region) are formed as one body (Fig. 5a-d, 2202 second capacitor electrode).
Song does not disclose expressly the second capacitor electrode and the second capacitor electrode extension part are connected to each other through a contact hole.
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art that the second capacitor electrode and the second capacitor electrode extension part are connected to each other through a contact hole and located on different layers. The motivation for doing so would have been to provide the electrodes on different layers to save space.
Allowable Subject Matter
Claims 12 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
In regards to claim 12, the prior art of record fails to disclose, teach or fairly suggest to one of ordinary skill in the art, in conjunction with all the other claimed limitations: a display device and specifically including “the second capacitor electrode constituting the other capacitor of the plurality of capacitors is connected to the second connection electrode.”
In regards to claim 13, the prior art of record fails to disclose, teach or fairly suggest to one of ordinary skill in the art, in conjunction with all the other claimed limitations: a display device and specifically including “the plurality of sub-pixels include a first sub-pixel and a second sub-pixel adjacent to each other, wherein at least a portion of the driving thin film transistor of the second sub-pixel overlaps the first sub-pixel, and wherein the second capacitor electrode extension part is disposed between the at least a portion of the driving thin film transistor of the second sub-pixel and the first electrode of the first sub-pixel.”
Conclusion
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/CORY A ALMEIDA/Primary Examiner, Art Unit 2628 7/17/26
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