DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 4, 11 and 12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 4 recites the limitation "the first side surface" in line 1. There is insufficient antecedent basis for this limitation in the claim because it is unclear which of the “at least one first side surface” is being referenced by the limitation. Clarification is requested. Similar deficiency is found in claims 11 and 12.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1,3, 4, 9-11, and 16-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cheong et al. (KR 10-1740524; see English machine translation) in view of Yi et al. (US 2017/0047459).
Regarding claim 1, Cheong discloses a solar cell (see Figure 1), comprising:
a substrate (10), including a first surface (top surface), a second surface (bottom surface), and at least one first side surface (left side surface in Figure 1), the first surface and the second surface being opposite to each other (see Figure 1), the at least one first side surface being adjacent to and between the first surface and the second surface (see Figure 1), and at least the first surface and a portion of the at least one first side surface of the substrate including a textured structure (see Figure 1);
a doped conducting layer (30), disposed at least on the first surface (see Figure 1);
a first passivation layer (34 and 36), stacked on the doped conducting layer and covering the first surface and at least the portion of the at least one first side surface (see Figure 1), thereby covering at least the doped conducting layer (see Figure 1);
a passivating contact layer (20 and 22), disposed on the second surface (see Figure 1);
a second passivation layer (24), stacked on the passivating contact layer and covering the second surface, thereby covering the passivating contact layer (see Figure 1),
wherein the second passivation layer further at least partially covers the at least one first side surface (see Figure 1), thereby covering at least a portion of the first passivation layer on the at least one first side surface (see Figure 1).
Cheong does not expressly disclose the doped conducting layer is disposed on the portion of the at least one first side surface to cover the textured structure.
Yi discloses a silicon solar cell comprising a doped conducting layer (120) disposed at least on the first surface and the portion of the at least one first side surface ([0040]; see Figure 1).
Cheong and Yi are analogous arts because both are directed to silicon solar cell structures.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a known technique to improve similar devices such as including the doped conducting layer on a portion of the at least one first side surface and the first surface to cover the textured structure in the device of Cheong, as taught by Yi above, such that the surface area between the substrate and the emitter region (read upon the doped conducting layer) is increased and the carriers can be transported more efficiently than if the emitter region is only formed on the first surface. It is noted that if a technique is known to improve a device and one of ordinary skill in the art recognizes it would improve similar devices in the same way, the use of the known technique to improve similar devices would be prima facie obvious as the results would have been predictable to one of ordinary skill in the art unless the actual application of the technique would have been beyond the skill of one of ordinary skill in the art. KSR, 550 U.S. at 417, 82 USPQ2d at 1396.
Regarding claim 3, modified Cheong discloses all the claim limitations as set forth above, and further discloses an edge of the first passivation layer away from the first surface is flush with a surface of the passivating contact layer away from the substrate (see Figure 1).
Regarding claim 4, modified Cheong discloses all the claim limitations as set forth above, and further discloses on the first side surface, an edge of the first passivation layer is flush with an edge of the doped conducting layer (Cheong discloses the edge of the first passivation layer to be flush with the second surface of the substrate in Figure 1, where Yi discloses the doped conducting layer can extend to the second surface of the substrate, such that they would be flush with each other).
Regarding claim 9, modified Cheong discloses all the claim limitations as set forth above, and further discloses the substrate further includes at least one cut edge side surface adjacent to and between the first surface and the second surface (the other side surface on the right);
at least a portion of the at least one cut edge side surface includes the textured structure (see Figure 1) and the doped conducting layer is disposed on the first surface, the portion of the at least one first side surface, and the portion of the at least one cut edge side surface, thereby covering the textured structure (as set forth above); and
the first passivation layer further covers at least the portion of the at least one cut edge side surface, thereby covering at least the doped conducting layer (as set forth above).
Regarding claim 10, modified Cheong discloses all the claim limitations as set forth above, and further discloses the second passivation layer at least partially covers the at least one cut edge side surface (24a; see Figure 1), thereby covering at least a portion of the first passivation layer located on the at least one cut edge side surface (see Figure 1).
Regarding claim 11, modified Cheong discloses all the claim limitations as set forth above, and further discloses on the first side surface, an edge of the first passivation layer is flush with an edge of the doped conducting layer (as set forth above, the edge of the doped conducting layer as taught by Yi would be flush with the edge of the first passivation layer of Cheong); and on the at least one cut edge side surface, an edge of the first passivation layer away from the first surface is flush with another edge of the doped conducting layer (as set forth above, as the device is symmetrical).
Regarding claim 16, modified Cheong discloses all the claim limitations as set forth above, and further discloses the textured structure of the first surface and the textured structure of the at least one first side surface form a continuous structure (as set forth above); or the textured structure of the first surface is spaced from the textured structure of the first side surface.
Regarding claim 17, modified Cheong discloses all the claim limitations as set forth above, and further discloses the first passivation layer includes a first passivation film and a first anti-reflection film stacked on the doped conducting layer (it is disclosed 34 and 36 are both passivating layers; [0045] and [0046]); and/or the second passivation layer comprises at least one second anti-reflection film stacked on the passivating contact layer.
Regarding claim 18, modified Cheong discloses all the claim limitations as set forth above, and further discloses
a first electrode (44) and a second electrode (42), wherein the first electrode penetrates the first passivation layer and is in contact with the doped conducting layer (see Figure 1), the second electrode penetrates the second passivation layer and is in contact with the passivating contact layer (see Figure 1), and the first electrode and the second electrode are spaced from the substrate (see Figure 1).
Claim(s) 2 and 13-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cheong et al. (KR 10-1740524; see English machine translation) in view of Yi et al. (US 2017/0047459) in view of Chang et al. (US 2020/0220039).
Regarding claim 2, modified Cheong discloses all the claim limitations as set forth above, and further discloses the portion of the at least one first side surface of the substrate including the textured structure is a textured region (as set forth above), but the reference does not expressly disclose the at least one first side surface further includes a flat region adjacent to the textured region; on the at least one first side surface, the first passivation layer completely covers the textured region and covers at least a portion of the flat region.
Chang discloses texturing the front surface, back surface of as silicon semiconductor substrate 110 and the side surface of the semiconductor substrate may be partially or entirely textured ([0138]).
As modified Cheong is not limited to any specific examples of the extent of texturing on the side surface of the semiconductor substrate and as partially or entirely texturing the side surface of semiconductor substrates were well known in the art before the effective filing date of the claimed invention, as evidenced by Chang above, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have partially textured the side surface of the semiconductor substrate in the device of modified Cheong in order to reduce reflection of incident light. Said combination would amount to nothing more than the use of a known element for its intended use in a known environment to accomplish an entirely expected result.
It is noted that by partially texturing the at least one first side surface of the semiconductor substrate, as set forth above, modified Cheong would disclose the at least one first side surface includes a flat region adjacent to the textured region, and on the at least one first side surface, the first passivation layer completely covers the textured region and covers at least a portion of the flat region as recited.
Regarding claim 13, modified Cheong discloses all the claim limitations as set forth above, and further discloses the portion of the at least one first side surface of the substrate including the textured structure is a textured region (as set forth above),
the first passivation layer includes a first portion (34a) located on the at least one first side surface (see Figure 1), and the second passivation layer covers at least the first portion (see Figure 1), but the reference does not expressly disclose the at least one first side surface further includes a flat region adjacent to the textured region, and the first portion covers the flat region.
Chang discloses texturing the front surface, back surface of as silicon semiconductor substrate 110 and the side surface of the semiconductor substrate may be partially or entirely textured ([0138]).
As modified Cheong is not limited to any specific examples of the extent of texturing on the side surface of the semiconductor substrate and as partially or entirely texturing the side surface of semiconductor substrates were well known in the art before the effective filing date of the claimed invention, as evidenced by Chang above, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have partially textured the side surface of the semiconductor substrate in the device of modified Cheong in order to reduce reflection of incident light. Said combination would amount to nothing more than the use of a known element for its intended use in a known environment to accomplish an entirely expected result.
It is noted that by partially texturing the at least one first side surface of the semiconductor substrate, as set forth above, modified Cheong would disclose the at least one first side surface includes a flat region adjacent to the textured region, and the first portion covers the flat region as recited.
Regarding claim 14, modified Cheong discloses all the claim limitations as set forth above, and further discloses the first passivation layer further includes a second portion located on the at least one first side surface, and the second portion covers the textured region (the first passivation layer extends along the entire length of the first side surface, as shown in Figure 1, such that it would have a second portion covering the textured region); and the second passivation layer covers the first portion and at least a portion of the second portion (as shown in Figure 1, the second passivation layer covers the entire length of the first side surface, so it would cover the first portion and the second portion as recited above).
Regarding claim 15, modified Cheong discloses all the claim limitations as set forth above, and further discloses an edge of the second passivation layer away from the second surface is flush with an outer surface of the first passivation layer on the first surface (see Figure 1).
Claim(s) 19 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cheong et al. (KR 10-1740524; see English machine translation) in view of Yi et al. (US 2017/0047459) in view of Pethe et al. (US 2012/0279547).
Regarding claim 19, modified Cheong discloses all the claim limitations as set forth above, but the reference does not expressly disclose a photovoltaic module, comprising at least one cell group, wherein the cell group comprises at least two solar cells according to claim 1.
Pethe discloses it is well known in the art before the effective filing date of the claimed invention to interconnect at least two solar cells into a cell group to form a photovoltaic module ([0006] and [0013]; Figure 10).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have connected at least two solar cells according to claim 1 into at least one cell group to form a photovoltaic module, as evidenced by Pethe, so that desired outputs can be achieved depending on the application and usage of the solar cells.
Regarding claim 20, modified Cheong discloses all the claim limitations as set forth above, and further discloses a photovoltaic system, comprising the photovoltaic module according to claim 19 (as set forth above).
Allowable Subject Matter
Claims 5-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The cited references do not teach nor render obvious the claimed subject matter of at least one cut edge side surface adjacent to and between the first surface and the second surface, only the first surface and the portion of the at least one first side surface include the textured structure, and the doped conducting layer is only disposed on the first surface and the portion of the at least one first side surface to cover the textured structure because there is no suggestion to modify the solar cell to exclude texturing on one of the at least one side surfaces and only dispose the doped conducting layer on the first surface and the portion of the at least one first side surface to cover the textured structure.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTINA CHERN whose telephone number is (408)918-7559. The examiner can normally be reached Monday-Friday, 9:30 AM-5:30 PM PT.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Niki Bakhtiari can be reached at 571-272-3433. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CHRISTINA CHERN/Primary Examiner, Art Unit 1722