Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 3 of U.S. Patent No. 12,451,058 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because:
Current Application – Claim 1
USPatent 12,451,058 B2 – Claims 1 & 2
A display apparatus, comprising:
A display apparatus, comprising:
a display panel including an active area in which a plurality of pixels including a plurality of sub pixels is disposed and a non-active area disposed so as to enclose the active area; and
a display panel including an active area in which a plurality of pixels including a plurality of sub pixels is disposed and a non-active area disposed so as to enclose the active area; and
a mode controller which is disposed in the active area and configured to supply a mode signal to the plurality of sub pixels,
a mode controller which is disposed in the active area and which supplies a mode signal to the plurality of sub pixels,
wherein each of the plurality of sub pixels includes: a first light emitting diode; a first lens which refracts light from the first light emitting diode; a second light emitting diode which emits a same color light as the first light emitting diode; and a second lens which refracts light from the second light emitting diode and has a shape different from a shape of the first lens.
wherein the mode controller is disposed between adjacent the plurality of pixels.
(Claim 3) The display apparatus according to claim 2, wherein the first mode controllers and the second mode controllers are divided into a plurality of parts disposed between the plurality of sub pixels.
The instant application claim is broader in every aspect than the patent claim and is therefore an obvious variant thereof.
This discussion further applies to claims 2, 3, 4 of the instant application and claims 2, 5, 4 of the patent application respectively.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-6 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Dai et al (PGPUB 2024/0321191 A1).
As to claim 1, Dai (Fig. 1) teaches, a display apparatus (display panel 100), comprising:
a display panel (display panel 100) including an active area (display area aaa) in which a plurality of pixels (pixel circuits 3 and light-emitting element rows 2) including a plurality of sub pixels (i.e. three subpixels shown per pixel in Figs. 1 and 12) is disposed and a non-active area (non-display area) disposed so as to enclose the active area (Fig. 1, ¶ 37, 38); and
a mode controller (shift register circuits 40) which is disposed in the active area and configured to supply a mode signal (scan signal SCAN and emitting control lines EMIT) to the plurality of sub pixels (¶ 62, 122),
wherein the mode controller is disposed between adjacent the plurality of pixels (¶ 62, 63).
As to claim 2, Dai (Figs. 8, 10) teaches, wherein the mode controller includes:
a plurality of first mode controllers (scan shift register circuit 401)configured to supply a first mode signal (i.e. scan signal via SCAN)(¶ 93); and
a plurality of second mode controllers (light-emitting control shift register circuit 402) configured to supply a second mode signal (light emitting control signal via EMIT)(¶ 94),
wherein the active area includes a plurality of areas divided in a row direction, (Fig. 1: i.e. multiple areas of pixels that runs horizontally) and the plurality of first mode controllers and the plurality of second mode controllers are disposed one by one for each of the plurality of areas (Fig. 1: i.e. pixel and shift register alternately disposed in vertical direction).
As to claim 3, Dai (Fig. 7) teaches,
a first mode signal line (i.e. horizontal line from scan shift register circuit 401 as shown in Fig. 7) which extends in the row direction and connected to the plurality of first mode controllers configured to transmit the first mode signal to the plurality of sub pixels (¶ 78); and
a second mode signal line (i.e. horizontal line from light emitting control shift register circuit as shown in Fig. 9) which extends in the row direction and connected to the plurality of second mode controllers configured to transmit the second mode signal to the plurality of sub pixels (¶ 78).
As to claim 4, Dai (Figs. 8 and 10) teaches,
a power line (i.e. lines for VGH and VGL) disposed in an area between the plurality of sub pixels excluding an area in which the plurality of first mode controllers and the plurality of second mode controllers are disposed (Figs. 8 and 10: i.e. power lines VGH and VGL are provided to shift register, which is placed between different rows of pixels).
As to claim 5, Dai (Fig. 5) teaches, wherein the first mode controller is
divided into a 1-1-th mode controller, a 1-2-th mode controller, and a 1-3-th mode controller to be disposed in every area (Fig. 5: i.e. there are at least 3 or more shift registers in each horizontal areas as shown in Fig. 5); and
the second mode controller is divided into a 2-1-th mode controller, a 2-2-th mode controller, and a 2-3-th mode controller to be disposed in every area (Fig. 12: i.e. there are a plurality of light emitting control shift register).
As to claim 6, Dai (Figs. 7 and 9) teaches a first connection line connects the 1-1-th mode controller and the 1-2-th mode controller (Figs. 7 and 8: i.e. latch modules 4011, 4012 are connected to each other),
a second connection line connects the 1-2-th mode controller and the 1-3-th mode controller (Figs. 7 and 8: i.e. latch modules 4012 and 4013 are connected to each other);
a third connection line connects the 2-1-th mode controller and the 2-2-th mode controller (Fig. 10: i.e. latch modules 4021 and 4022 are connected to each other); and
a fourth connection line connects the 2-2-th mode controller and the 2-3-th mode controller (Fig 10: i.e. different light emitting control shift registers connect to same input signal such as NEXT).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dai in view of Shikina et al (PGPUB 2011/0284881).
As to claim 7, Dai (Fig. 1) teaches the active area includes a plurality of areas divided in a matrix (Fig. 1).
Dai does not specifically teach wide-view mode and narrow-view mode.
Shikina (Figs. 8, 10) teaches, the mode controller configured to independently control driving of each of the plurality of areas in any one of a wide-view mode (i.e. mode having a wide viewing angle characteristic) or a narrow-view mode (high front luminance priority mode).
It would have been obvious to a person of ordinary skilled in the art before the effective filing date of the claimed invention to incorporate Shikina’s pixel structure into Dai’s pixel structure, so as to provide different viewing angle modes based on user’s situation (¶ 172).
As to claim 8, Dai (Fig.4) teaches, wherein each of the plurality of sub pixels (pixel 3) includes:
a first light emitting diode (light-emitting elements 20) configured to emit light by a driving current (drive current)(¶ 37);
a driving transistor (third transistor M3 is a drive transistor) configured to control the driving current (¶ 43);
a first emission control transistor (seventh transistor M7) which is connected between the driving transistor and the first light emitting diode (light-emitting elements 20) and configured to be turned on to transmit the driving current to the first light emitting diode (Fig. 4).
Dai does not specifically teach a second light emitting diode and a second emission control transistor.
Shikina (Fig. 6) teaches, a second light emitting diode (organic EL element B 27) configured to emit light by the driving current (¶ 36);
a second emission control transistor (TFT M$) which is connected between the driving transistor and the second light emitting diode and configured to be turned on to transmit the driving current to the second light emitting diode (¶ 73).
It would have been obvious to a person of ordinary skilled in the art before the effective filing date of the claimed invention to incorporate Shikina’s pixel structure into Dai’s pixel structure, so as to provide different viewing angle modes based on user’s situation (¶ 172).
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dai and Shikina as applied to claim 1 above, and further in view of Choi et al (PGPUB 2015/0048333 A1).
As to claim 9, Dai teaches the apparatus of claim 8 but does not specifically teach a lens.
Shikina (Figs. 7, 8) teaches, a first lens (Fig. 8) but does not specifically teach a second lens for adjusting viewing angle.
Choi (Fig. 3) teaches, wherein each of the plurality of sub pixels further includes:
a first lens (i.e. lens for red and green pixel 230a and 230b) disposed on the first light emitting diode which refracts light emitted from the first light emitting diode so that a first viewing angle is limited to a first direction and a second direction (Fig. 3: i.e. light beam is illuminated forward and slanted angles); and
a second lens (i.e. lens for red and green pixels 230c) disposed on the second light emitting diode which refracts light emitted from the second light emitting diode so that a second viewing angle is limited to only the first direction (Fig. 15: i.e. lens for pixel 230c illuminates forward only).
It would have been obvious to a person of ordinary skilled in the art before the effective filing date of the claimed invention to incorporate Choi’s method of different lens for generating different viewing angles into Dai’s display as modified with the teaching of Shikina, which achieves two different viewing angles with only one lens and absence of lens, so as to improve light efficiency of light generated (¶ 49) by accurately directing light direction.
Inquiry
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SANGHYUK PARK whose telephone number is (571)270-7359. The examiner can normally be reached on 10:00AM - 6:00 M-F.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chanh Nguyen can be reached on ((571) 272-7772. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at (866) 217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call (800) 786-9199 (IN USA OR CANADA) or (571) 272-1000.
/SANGHYUK PARK/Primary Examiner, Art Unit 2623