Prosecution Insights
Last updated: October 26, 2026
Application No. 19/358,839

DISPLAY DEVICE INCLUDING A TOUCH SENSING UNIT AND ELECTRONIC DEVICE USING THE SAME

Final Rejection §103
Filed
Oct 15, 2025
Priority
Mar 13, 2025 — RE 10-2025-0032538
Examiner
LIN, HANG
Art Unit
2626
Tech Center
2600 — Communications
Assignee
Samsung Display Co., Ltd.
OA Round
2 (Final)
66%
Grant Probability
Favorable
3-4
OA Rounds
1y 5m
Est. Remaining
68%
With Interview

Examiner Intelligence

Grants 66% — above average
66%
Career Allowance Rate
311 granted / 471 resolved
+4.0% vs TC avg
Minimal +2% lift
Without
With
+2.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
5 currently pending
Career history
484
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
61.6%
+21.6% vs TC avg
§102
25.3%
-14.7% vs TC avg
§112
8.2%
-31.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 471 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment In an amendment filed 09/17/2026, claims 1-6, 8-13, 15-18 and 20 have been amended. Currently, claims 1-20 are pending. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1, 9 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20230038990 A1), further in view of Lo et al. (US 20060082715 A1). Regarding claim 1, Kim teaches a display device, comprising: a display panel including a plurality of pixels disposed within a display area of the display panel; (Para 105, 130. Fig. 3 shows pixels) a touch driving circuit including a touch sensing unit disposed within the display panel, the touch sensing unit configured to generate touch coordinate data; (Para 111-114. Fig. 4 shows touch panel) a display driving circuit configured to supply a data voltage to the plurality of pixels of the display area and control an image display timing of the plurality of pixels; (Para 84-88, 110. touch driving circuit 400 and display driving circuit are located on circuit board 300) a circuit board that includes touch lines, ground lines, interface lines, power lines, and option control lines, (Para 79: Scan lines SL (e.g., refer to FIG. 3), data lines DL (e.g., refer to FIG. 3), and power lines PL (e.g., refer to FIG. 3) are the lines Which are connected to the pads which are connected to the display circuitry on the circuit board which means there are interface line, option control lines and power lines to connect to the lines respectively. Para 116, 122-123. The touch lines TL1, TL2, and RL may be disposed in the touch peripheral area TPA. A first guard line GL1 may be disposed on an outer side of the outermost one of the sensing lines RL. A first ground line GRL1 may be disposed on an outer side of the first guard line GL1. Are line lines which are connected to the pads which are connected to the touch driving circuit 400 which means there are touch lines, option control lines, ground lines respectively.) the circuit board being electrically connected to the display panel; (Para 84-88. touch driving circuit 400 and display driving circuit are located on circuit board 300) However Kim does not teach and a impedance-control film disposed on an upper surface of the circuit board, wherein the impedance-control film is disposed on an upper surface of the interface lines, and wherein the impedance-control film is non-conductive or insulating. However Lo teaches and an impedance-control film disposed on an upper surface of the circuit board, wherein the impedance-control film is disposed on an upper surface of the interface lines, and wherein the impedance-control film is non-conductive or insulating. (Para 8, 18-20. Fig. 5. impedance-control film 35). Therefore it would have been obvious to one with ordinary skill, before the effective filing date of the invention, to modify Kim with Lo to teach and a impedance-control film disposed on an upper surface of the circuit board, wherein the impedance-control film is disposed on an upper surface of the interface lines, and wherein the impedance-control film is non-conductive or insulating in order to produce the predictable result of attaching the circuit board to the display panel for signal and power transmission for image production. Regarding claim 9, Kim teaches a display device, comprising a display panel including pixels disposed in a display area thereof; (Para 105, 130. Fig. 3 shows pixels) a touch driving circuit including a touch sensing unit disposed within the display panel, the touch sensing unit configured to generate touch coordinate data; (Para 111-114. Fig. 4 shows touch panel) a display driving circuit configured to supply a data voltage to the pixels of the display area and control an image display timing of the plurality of pixels; (Para 84-88, 110. touch driving circuit 400 and display driving circuit are located on circuit board 300) and a circuit board that includes touch lines, ground lines, interface lines, power lines, and option control lines, (Para 79: Scan lines SL (e.g., refer to FIG. 3), data lines DL (e.g., refer to FIG. 3), and power lines PL (e.g., refer to FIG. 3) are the lines Which are connected to the pads which are connected to the display circuitry on the circuit board which means there are interface line, option control lines and power lines to connect to the lines respectively. Para 116, 122-123. The touch lines TL1, TL2, and RL may be disposed in the touch peripheral area TPA. A first guard line GL1 may be disposed on an outer side of the outermost one of the sensing lines RL. A first ground line GRL1 may be disposed on an outer side of the first guard line GL1. Are line lines which are connected to the pads which are connected to the touch driving circuit 400 which means there are touch lines, option control lines, ground lines respectively.) the circuit board being electrically connected to the display panel, (Para 84-88. touch driving circuit 400 and display driving circuit are located on circuit board 300) However Kim does not teach and a impedance-control film disposed on an upper surface of the circuit board, wherein the impedance-control film is disposed on an upper surface of the interface lines, and wherein the impedance-control film is non-conductive or insulating. However Lo teaches and an impedance-control film disposed on an upper surface of the circuit board, wherein the impedance-control film is disposed on an upper surface of the interface lines, and wherein the impedance-control film is non-conductive or insulating. (Para 8, 18-20. Fig. 5. impedance-control film 35). Therefore it would have been obvious to one with ordinary skill, before the effective filing date of the invention, to modify Kim with Lo to teach and a impedance-control film disposed on an upper surface of the circuit board, wherein the impedance-control film is disposed on an upper surface of the interface lines, and wherein the impedance-control film is non-conductive or insulating in order to produce the predictable result of attaching the circuit board to the display panel for signal and power transmission for image production. Regarding claim 16, Kim teaches an electronic device, comprising a display device; (Para 105, 130. Fig. 3 shows pixels) an image signal processor configured to control an image display timing of the display device; (Para 110: The display driving circuit 210 may be electrically connected to the display pads DP and receive digital video data and timing signals. The display driving circuit 210 may convert the digital video data into analog positive/negative data voltages and supply the converted analog positive/negative data voltages to the data lines DL through the link lines LL. The display driving circuit 210 may generate and supply the scan control signal for controlling the scan driver 110 through the scan control line SCL. This means there is an image signal processor) a memory configured to store data and an application program for operating the display device; (Para 110: The display driving circuit 210 may be electrically connected to the display pads DP and receive digital video data and timing signals. The display driving circuit 210 may convert the digital video data into analog positive/negative data voltages and supply the converted analog positive/negative data voltages to the data lines DL through the link lines LL. The display driving circuit 210 may generate and supply the scan control signal for controlling the scan driver 110 through the scan control line SCL. The pixels P to which the data voltages are supplied are selected by the scan signals of the scan driver 110, and the data voltages are supplied to the selected pixels P. The display driving circuit 210 may be implemented as an integrated circuit (IC) and may be attached to the substrate SUB by a chip on glass (COG) technique, a chip on plastic (COP) technique, or an ultrasonic bonding. This means there is memory.) and a power module configured to provide a power signal to the display device, (Para 79: there is power line which means there is power module) wherein the display device includes: a display panel including pixels disposed in a display area thereof; (Para 105, 130. Fig. 3 shows pixels) a touch driving circuit including a touch sensing unit disposed within the display panel, the touch sensing unit configured to generate touch coordinate data; (Para 111-114. Fig. 4 shows touch panel) a display driving circuit configured to supply a data voltage to the pixels of the display area and control an image display timing of the pixels; (Para 84-88, 110. touch driving circuit 400 and display driving circuit are located on circuit board 300) a circuit board that includes touch lines, ground lines, interface lines, power lines, and option control lines, (Para 79: Scan lines SL (e.g., refer to FIG. 3), data lines DL (e.g., refer to FIG. 3), and power lines PL (e.g., refer to FIG. 3) are the lines Which are connected to the pads which are connected to the display circuitry on the circuit board which means there are interface line, option control lines and power lines to connect to the lines respectively. Para 116, 122-123. The touch lines TL1, TL2, and RL may be disposed in the touch peripheral area TPA. A first guard line GL1 may be disposed on an outer side of the outermost one of the sensing lines RL. A first ground line GRL1 may be disposed on an outer side of the first guard line GL1. Are line lines which are connected to the pads which are connected to the touch driving circuit 400 which means there are touch lines, option control lines, ground lines respectively.) the circuit board being electrically connected to the display panel; (Para 84-88. touch driving circuit 400 and display driving circuit are located on circuit board 300) However Kim does not teach and a impedance-control film disposed on an upper surface of the circuit board, wherein the impedance-control film is disposed on an upper surface of the interface lines, and wherein the impedance-control film is non-conductive or insulating. However Lo teaches and an impedance-control film disposed on an upper surface of the circuit board, wherein the impedance-control film is disposed on an upper surface of the interface lines, and wherein the impedance-control film is non-conductive or insulating. (Para 8, 18-20. Fig. 5. impedance-control film 35). Therefore it would have been obvious to one with ordinary skill, before the effective filing date of the invention, to modify Kim with Lo to teach and a impedance-control film disposed on an upper surface of the circuit board, wherein the impedance-control film is disposed on an upper surface of the interface lines, and wherein the impedance-control film is non-conductive or insulating in order to produce the predictable result of attaching the circuit board to the display panel for signal and power transmission for image production. Allowable Subject Matter Claims 2-8, 10-15 and 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant’s arguments with respect to claims 1, 9 and 16 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HANG LIN whose telephone number is (571)270-7596. The examiner can normally be reached Monday-Friday, 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae can be reached at 571-272-3017. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HANG LIN/Primary Examiner, Art Unit 2626
Read full office action

Prosecution Timeline

Oct 15, 2025
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §103
Aug 21, 2026
Response Filed
Oct 01, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
66%
Grant Probability
68%
With Interview (+2.0%)
2y 6m (~1y 5m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 471 resolved cases by this examiner. Grant probability derived from career allowance rate.

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