DETAILED ACTION
The present Office action is in response to the application filing on 21 OCTOBER 2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The Information Disclosure Statement (IDS) submitted on 10/21/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the Information Disclosure Statement is being considered by the Examiner.
Claim Objections
Claims 1-5 are objected to because of the following informalities:
Claim 1, l. 5 requires, “the version” and should read --the respective versions--
Claim 2, l. 6 requires, “the version” and should read --the respective versions--
Claim 3, l. 3 requires, “the version” and should read --the respective versions--
Claim 4, l. 4 requires, “the version” and should read --the respective versions--
Claim 5, l. 3 requires, “the version” and should read --the respective versions--
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Publication No. 2015/0365686 A1 (hereinafter “Kang”) in view of U.S. Publication No. 2016/0212437 A1 (hereinafter “Tsukuba”).
Regarding claim 1, Kang discloses an encoder ([0046], “a bitstream output by an encoder”) comprising:
generate maximum temporal IDs for respective versions of a subset of a bitstream, the subset of the bitstream including the versions, the respective versions of the bitstream each including one or more sublayers for temporal scalability, the one or more sublayers each having a temporal ID, each of the maximum temporal IDs being a maximum of one or more temporal IDs of the one or more sublayers included in a corresponding one of the versions ([0131], “At present, profile_tier_level (profile, tier, and level information) is configured to be signaled as many as the number (that is, vps_max_sub_layers_minus1+1) of maximum sub-layers (alternatively, temporal sub-layers) in a bitstream for respective layers (layers having layer_id values) in an extension part of the VPS. However, the respective layers may have different numbers of sub-layers and it may be preferable to describe the number of sub-layers in each layer for a middle box.” [0133], “max_sub_layers_minus1[i] + 1 represents a max sub-layer value of a maximum temporal sub-layer of the layer i.” [0123], “Each scalable layer is identified by layer_id and temporal_id values.” [0220], “The profile, tier, and level information represents information such as a profile, a tier, and a level for each layer included in the bitstream and may be signaled as many as the maximum number of sub-layers of each layer”);
generate the bitstream including the maximum temporal IDs and the level information ([0046], “a bitstream output by an encoder.” [0220], “The profile, tier, and level information represents information such as a profile, a tier, and a level for each layer included in the bitstream and may be signaled as many as the maximum number of sub-layers of each layer.” Table 5 depicts the VPS syntax extension for sublayers, including the function profile_tier_level(). Note, the syntax for profile_tier_level() is not described and therefore the specific level information is not expressly disclosed by Kang).
Kang fails to expressly disclose a memory; and circuit coupled to the memory; and
generate level information indicating conformance levels of the respective versions of the subset of the bitstream.
However, Tsukuba teaches a memory; and circuit coupled to the memory ([0844], “the recording apparatus PROD_C includes a coder PROD_C1 coding a moving image to obtain coded data and a writer PROD_C2 writing the coded data obtained by the coder PROD_C1 into a recording medium PROD_M. The hierarchical moving image coding device 2 described above is utilized as the coder PROD_C1”); and
generate level information indicating conformance levels of the respective versions of the subset of the bitstream (FIGS. 9, 32, and 54 each disclose profile_tier_level() syntax, including level information, such as general_level_idc and sub_layer_level_idc. FIG. 52 depicts the tier and level limits).
Before the effective filing date of the claimed invention, it would have been obvious to a person having ordinary skill in the art to have included identified level information, as taught by Tsukuba (FIGS. 52 and 54), in Kang’s invention. One would have been motivated to modify Kang’s invention, by incorporating Tsukuba’s invention, to improve syntax and data structure related to PTL information necessary for determining decoder capabilities, thereby reducing the processing and coding amount relating to coding PTL information (Tsukuba: [0037]).
Regarding claim 2, the limitations are the same as those in claim 1; however, written from the decoder’s perspective, which is well-known as the inverse operations of the encoder. For instance, Tsukuba discloses in [0611], “a relationship in which the image coding device 2 and the image decoding device 1 perform the same process or the inverse of the process of each other.” Therefore, the same rationale of claim 1 applies equally as well to claim 2.
Regarding claim 3, the limitations are the same as those in claim 1; however, written in process form instead of machine form. Therefore, the same rationale of claim 1 applies equally as well to claim 3.
Regarding claim 4, the limitations are the same as those in claim 2; however, written in process form instead of machine form. Therefore, the same rationale of claim 2 applies equally as well to claim 4.
Regarding claim 5, the limitations are the same as those in claim 1. Therefore, the same rationale of claim 1 applies equally as well to claim 5.
Examiner’s Note: The subject matter of claim is directed to the transmitting of a bitstream with the steps of generating said bitstream. That is to say, the broadest reasonable interpretation of claim 5 includes the steps of both generating a bitstream (i.e., maximum temporal IDs, level information, and bitstream) and the transmitting of the bitstream.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-5 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,553,195 (hereinafter “Patent ‘195”) in view of U.S. Publication No. 2016/0212437 A1 (hereinafter “Tsukuba”).
Regarding claim 1, Patent ‘195 discloses every limitation in the instant application, except for: generate level information indicating conformance levels of the respective versions of the subset of the bitstream.
However, Tsukuba teaches generate level information indicating conformance levels of the respective versions of the subset of the bitstream ([0019], “ In the PTL information profile_tier_level( ) illustrated in FIG. 54, profile information (hereinafter, referred to as sub-layer profile information; a syntax group SYNPTL 05 in FIG. 54) per layer related to temporal scalability (hereinafter, referred to as a sub-layer or a temporal sub-layer as well) and level information (hereinafter, referred to as sub-layer level information; a syntax SYNPTL06 in FIG. 54) can be explicitly specified if each of a sub-layer profile presence flag sub_layer_profile_present_flag[i] (in a syntax group SYNPTL03 of FIG. 54) and a sub-layer level presence flag sub_layer_level_present_flag[i] (in the syntax group SYNPTL03 of FIG. 54) is set to one.” FIG. 54 describes the syntax group SYNPTL06 as including sub_layer_level_idc[i]).
Before the effective filing date of the claimed invention, it would have been obvious to a person having ordinary skill in the art to have used level information for the sublayers, as taught by Tsukuba (FIG. 54), in Patent ‘195. One would have been motivated to modify Patent ‘195, by incorporating Tsukuba, to conform with HEVC standard so as to define processing performance necessary for an image decoding device (Tsukuba: [0009-0010]) and to provide variety between sublayers for meeting different end user image decoding device capabilities.
Regarding claims 2-5, the rationale of claim 1 applies equally as well.
Claims 1-5 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-5 of U.S. Patent No. 11,936,887 (hereinafter “Patent ‘887”). Although the claims at issue are not identical, they are not patentably distinct from each other because the instant application is entirely anticipated by Patent ‘887. The patent encodes identification information into a header of a bitstream, including (i) plurality of maximum temporal IDs and (ii) level information. These two pieces of identification information are the same two required in the instant application that are also part of a bitstream.
The following table exemplifies the similarities between the instant application and Patent ‘887.
Instant Application
Patent ‘887
Claim 1: An encoder comprising:
Claim 1: An encoder, comprising:
a memory; and circuit coupled to the memory and configured to:
circuitry; and memory coupled to the circuitry, wherein the circuitry, in operation,
generate maximum temporal IDs for respective versions of subsets of a bitstream, the subset of the bitstream including the versions, the respective version of the subset of the bitstream each including one or more sublayers for temporal scalability, the one or more sublayers each having a temporal ID, each of the maximum temporal IDs being a maximum of one or more temporal IDs of the one or more sublayers included in a corresponding one of the versions;
encodes identification information into a header of a bitstream including a plurality of sub-bitstreams respectively having mutually different frame rates, the identification information indicating a plurality of maximum temporal IDs which correspond to the plurality of sub-bitstreams, each of the plurality of maximum temporal IDs being a maximum identifier of one or more temporal layers related to a temporal scalability,
generate level information indicating conformance levels of the respective version of the subset of the bitstream; and
for each of the plurality of sub-bitstreams, encodes level information indicating a conformance level of the sub-bitstream.
generate the bitstream including the maximum temporal IDs and the level information.
Claims 1-5 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-4 of U.S. Patent No. 12,477,132 (hereinafter “Patent ‘132”). Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the instant application are entirely anticipated by Patent ‘132.
Instant Application
Patent ‘887
Claim 1: An encoder comprising:
Claim 1: An encoder comprising:
a memory; and
a memory; and
circuit coupled to the memory and configured to:
circuitry coupled to the memory and configured to:
generate maximum temporal IDs for respective versions of subsets of a bitstream, the subset of the bitstream including the versions, the respective version of the subset of the bitstream each including one or more sublayers for temporal scalability, the one or more sublayers each having a temporal ID, each of the maximum temporal IDs being a maximum of one or more temporal IDs of the one or more sublayers included in a corresponding one of the versions;
generate maximum temporal IDs for respective versions of a subset of a bitstream, the subset of the bitstream including the version, the respective versions of the subset of the bitstream each including one or more sublayers for temporal scalability, the one or more sublayers each having a temporal ID, each of the maximum temporal IDs being a maximum of one or more temporal IDs of the one or more sublayers included in a corresponding one of the versions;
generate level information indicating conformance levels of the respective version of the subset of the bitstream; and
generating level information indicating conformance levels of the respective versions of the subset of the bitstream; and
generate the bitstream including the maximum temporal IDs and the level information.
generate the bitstream including the maximum temporal IDs and the level information, wherein
the maximum temporal IDs and the level information are included in a sequence parameter set in the bitstream.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
U.S. Publication No. 2017/0134747 A1 (hereinafter “Lee”) – Discloses the variable sub_layer_vps_max_minus1[i] for indicating the maximum of temporal IDs allocated to the temporal sublayers in the i-th layer. See Lee, [0225].
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/STUART D BENNETT/Examiner, Art Unit 2481
