DETAILED ACTION
Status of the Application
1. Claims 1 – 8 are pending and are under examination in this action.
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claims 1 and 4 – 5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kang (U.S. Pub. 2019/0103060).
Regarding claim 1, Kang teaches: a display device (FIG. 1; paragraph [0039]; display device), comprising
a display panel including a first display area and a second display area each having a plurality of pixel circuits disposed therein (FIGS. 1, 6; paragraphs [0042], [0078]; display panel 100 includes a left half [first display area] and a right half [second display area]. Each display area includes a plurality of subpixels 101 [pixel circuit]),
wherein each of the pixel circuits includes:
a first light-emitting element (FIG. 9; paragraph [0105]; OLED1);
a second light-emitting element (FIG. 9; paragraph [0105]; OLED2);
a driving element configured to generate a driving current of each of the first and second light-emitting elements (FIG. 9; paragraph [0106]; driving element DT generates a driving current for OLED1 and OLED2);
a first switch element connected between a gate electrode of the driving element and a power line through which a reference voltage is applied (FIG. 9; paragraph [0108]; [first] switching element S2 is connected between a gate electrode of driving element DT and sensing [power] line 103 to which a reference voltage Vref is applied), and including a gate electrode connected to a common gate line (FIGS. 3B; 9; paragraphs [0055], [0108]; [first] switching element S2 includes a gate connected to second gate line 1042 to which the signal SENSE is applied. The SENSE signal is interpreted as a common gate line because it is applied during an entirety of each active period AT of frames of the display driving period);
a second switch element connected between the driving element and the first light-emitting element (FIG. 9; paragraph [0113]; [second] switching element s31 is connected between the driving element DT and OLED1); and
a third switch element connected between the driving element and the second light-emitting element (FIG. 9; paragraph [0113]; [third] switching element s32 is connected between the driving element DT and OLED2).
Regarding claim 4, Kang teaches: wherein, in a first mode, the driving element, the first switch element, and the second switch element are turned on, and the third switch element is turned off so that the first light-emitting element emits light (FIGS. 4, 11; paragraphs [0075], [0113] – [0115]; the time period during which the first emission control signal EMT is on is interpreted as the “first mode”. As set forth above with regard to claim 1, [first] switching element S2 is turned on via SENSE signal during an entirety of each active period AT of frames of the display driving period. Accordingly, during the “first mode”, the driving element DT, [first] switching element S2, and [second] switching element s31 are turned on, [third] switching element s32 is turned off, and OLED1 emits light).
Regarding claim 5, Kang teaches: wherein, in a second mode, the driving element, the first switch element, and the third switch element are turned on, and the second switch element is turned off so that the second light-emitting element emits light (FIGS. 4, 11; paragraphs [0075], [0113] – [0115]; the time period during which the second emission control signal EMB is on is interpreted as the “second mode”. As set forth above with regard to claim 1, [first] switching element S2 is turned on via SENSE signal during an entirety of each active period AT of frames of the display driving period. Accordingly, during the “second mode”, the driving element DT, [first] switching element S2, and [third] switching element s32 are turned on, [second] switching element s31 is turned off, and OLED2 emits light).
Claim Rejections - 35 USC § 103
5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
6. Claims 6 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Kang, as applied to claim 1, in view of Gu et al. (U.S. Pub. 2017/0200412).
Regarding claim 6, Kang teaches: further comprising a gate driving unit configured to apply gate signals to the plurality of pixel circuits, wherein the gate driving unit includes: a first shift register configured to apply a first gate signal to the first switch element (FIG. 1; paragraph [0053]; gate driver 120 applies gate signals to subpixels 101. Gate driver 120 includes a shift register that shifts gate signals including sensing signal SENSE, which is a first gate signal, to [first] switching element S2); and
a second gate signal is applied to the second switch element (FIG. 9; paragraph [0113]; first emission control [gate] signal EMT is applied to the [second] switching element s31); and
a third gate signal is applied to the third switch element (FIG. 9; paragraph [0114]; second emission control [gate] signal EMB is applied to the [third] switching element s32).
Kang fails to explicitly disclose: a second shift register configured to apply a second gate signal to the second switch element; and a third shift register configured to apply a third gate signal to the third switch element.
However, in a related field of endeavor, Gu discloses a display panel 210 having a light emitting driver 402 and a gate scanning driver 404 which combined constitute a gate driving unit (FIG. 4; paragraph [0090]).
With regard to claim 6, Gu teaches: a second shift register configured to apply a second gate signal to the second switch element (FIGS. 4, 5, 7, 14; paragraphs [0090], [0091], [0100], [0109]; the “gate driving unit” includes light emitting driver 402 which includes light emitting circuit 504. Light emitting circuit 504 includes a [second] shift register 1402 that outputs a light emitting signal EM1 [second gate signal] to a [second] switch element [708-1] that is connected to first light emitting element D1); and
a third shift register configured to apply a third gate signal to the third switch element (FIGS. 4, 5, 7, 14; paragraphs [0090], [0091], [0100], [0109]; the “gate driving unit” includes light emitting driver 402 which includes light emitting circuit 504. Light emitting circuit 504 includes a [third] shift register 1404 that outputs a light emitting signal EM2 [third gate signal] to a [third] switch element [708-2] that is connected to second light emitting element D2).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to combine the known teachings of Kang and Gu to yield predictable results. More specifically, the teachings of a display device having first and second light emitting signals applied to control first and second OLEDs of a pixel, as taught by Kang, are known. Additionally, the teachings of a display device having a gate driving unit with a first shift register that outputs a first light emitting signal that is applied to control a first OLED of a pixel and a second shift register that outputs a second light emitting signal that is applied to control a second OLED of a pixel, as taught by Gu, are known as well. The combination of the known teachings of Kang and Gu would yield the predictable results of a display device having a gate driving unit with a first shift register that outputs a first light emitting signal that is applied to control a first OLED of a pixel and a second shift register that outputs a second light emitting signal that is applied to control a second OLED of a pixel. In other words, it would have been obvious to simply incorporate the shift registers of Gu as the source of light emitting signals of Kang. Such a modification of Kang merely fills in the gaps thereof as to what circuitry generates the disclosed light emitting signals using the similar display, pixels, and circuitry of Gu. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to combine the known teachings of Kang and Gu to yield the aforementioned predictable results.
Regarding claim 7, Kang teaches: wherein the first gate signal is applied to the pixel circuits disposed in the first and second display areas through the common gate line (FIGS. 1, 3B, 6, 9; paragraphs [0042], [0055], [0078], [0108]; as set forth above with regard to claim 1, display panel 100 includes a left half [first display area] and a right half [second display area], each of which include a plurality of subpixels 101 [pixel circuit]. Each subpixel 101, in both the “first” and “second” display areas, receives the signal SENSE which is interpreted as a common gate line because it is applied during an entirety of each active period AT of frames of the display driving period), and the second gate signal and the third gate signal are applied to the pixel circuits disposed in the first display area and the pixel circuits disposed in the second display area, respectively, through individual gate lines (FIGS. 9, 11; paragraphs [0113], [0114]; first emission control [gate] signal EMT and second emission control [gate] signal EMB are applied to each subpixel 101, in both the “first” and “second” display areas. These are interpreted as being applied through “individual gate lines” because they are applied for only parts of each active period AT by alternating, as illustrated in FIG. 11).
7. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Gu, as applied to claim 6, in view of Wu et al. (U.S. Pub. 2022/0334440).
Regarding claim 8, neither Kang nor Gu explicitly disclose: wherein the second shift register comprises a second-first shift register configured to apply a second-first gate signal to the second switch element of pixel circuits disposed in the first display area, and a second-second shift register configured to apply a second-second gate signal to the second switch element of pixel circuits disposed in the second display area, and wherein the third shift register comprises a third-first shift register configured to apply a third-first gate signal to the third switch element of pixel circuits disposed in the first display area, and a third-second shift register configured to apply a third-second gate signal to the third switch element of pixel circuits disposed in the second display area.
However, Wu teaches a display device that includes a scan driver circuit 40 having a first scan driver circuit 41 that includes first shift register units 411 that drive pixel circuits 101 in a left [first] display area, and a second scan driver circuit 42 that includes second shift register units 411 that drive pixel circuits 101 in a right [display] area (FIG. 13; paragraphs [0059], [0060], [0062]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to combine the known teachings of Kang, Gu, and Wu to yield predictable results. More specifically, the teachings of having a gate driving unit with a first shift register that outputs a first light emitting signal that is applied to control a first OLED of a pixel and a second shift register that outputs a second light emitting signal that is applied to control a second OLED of a pixel, as taught by the combination of Kang and Gu, are known. Additionally, the teachings of a display device having a gate driving unit having a left driver with left shift registers for driving pixels in a left display area and a right driver with right shift registers for driving pixels in a right display area, as taught by Wu, are known as well. The combination of the known teachings of Kang, Gu, and Wu would yield the predictable results of a display device having a gate driving unit with a first shift register that outputs a first light emitting signal that is applied to control a first OLED of a pixel and a second shift register that outputs a second light emitting signal that is applied to control a second OLED of a pixel, wherein the gate driving unit includes a left driver that drives pixels in a left display area and a right driver that drives pixels in a right display area using respective shift registers. In other words, it would have been obvious to simply incorporate the left and right gate driving of Wu to the combination of Kang and Gu. Such a modification of the combination of Kang and Gu merely uses well-known left and right side gate driving, as taught by Wu using known methods to yield predictable results. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to combine the known teachings of Kang, Gu, and Wu to yield the aforementioned predictable results.
Allowable Subject Matter
8. Claims 2 and 3 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RYAN A LUBIT whose telephone number is (571)270-3389. The examiner can normally be reached M - F, ~6am - 3pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae can be reached at 571-272-3017. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/RYAN A LUBIT/Primary Examiner, Art Unit 2626
Prosecution Insights