DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
2. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claim(s) 1, 12, 14 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Peng et al. (US 2018/0151106 A1, hereinafter referred as “Peng”) in view of Choi et al. (US 2023/0122018 A1, hereinafter referred as “Choi”).
Regarding claim(s) 1, Peng discloses an apparatus, comprising: an array of light emitting elements (abstract discloses subpixels correspond to an array of pixels), wherein the array of light emitting elements corresponds to an array of pixels arranged in M rows and N columns (¶0051 discloses the plurality of subpixels correspond to an array of pixels arranged in M rows and N columns), and a number of the light emitting elements is k times of a number of the pixels (¶0051 discloses k subpixels may constitute one pixel, and each pixel may consist of k subpixels. k may be any positive integer larger than 1. In some embodiments, k may be 2, 3, or 4), each of M, N, and k is a positive integer (¶0052 discloses M and N are positive integers since the array of pixels are arranged in 2560 rows and 1440 columns; and ¶0051 discloses k is a positive integer);
an array of driving elements configured to drive the array of light emitting elements (¶0049 discloses each OLED subpixel has a respective pixel circuit containing TFTS and configure to drive the corresponding OLED), wherein a number of the driving elements is k times of a number of the pixels (¶0049 and ¶0051 discloses one respective pixel circuit for each OLED subpixel, while the number of sub pixels is x times the number of pixels. Thus, k driving circuits per pixel); and
x*M gate lines (¶0055 discloses M gate lines for M rows, where x=1) and ((k/x)*N+1) source lines operatively coupled to the array of driving elements (¶0058-¶0059 discloses kN+1 zigzag source lines. Since kN+1=(k/x)N+1, and setting x=1, Peng discloses the claimed source-line relationship), wherein x is a positive integer (¶0055 discloses M gate lines for M rows; and ¶0059 discloses M gate lines and kN+1 zigzag source lines. Because kN+1=(k/x)N+1), Peng discloses the claimed source-line relationship, with x=1, a positive integer),
Peng doesn’t disclose wherein each source line is operatively coupled to the driving elements configured to drive the light emitting elements that emit lights of a same color.
However, in the same field of endeavor, Choi discloses wherein each source line is operatively coupled to the driving elements configured to drive the light emitting elements that emit lights of a same color (¶0072-¶0073 discloses the column lines are connected to sub pixel circuits driving emissive elements of only one color).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Peng so that during operation of the display, as compared with a conventional configuration in which a column line is connected to subpixels of different color emissive elements, more than one color, thus reducing power losses due to column line parasitic capacitance (¶0073).
Regarding claim(s) 12, Peng discloses the apparatus of claim 1, wherein x=2, and k=3 (¶0010, ¶0013, ¶0016 and 0036 discloses 3n/2 data lines, and each data line is connected to two TFTS whose gates are connected to different gate lines; where k=3 and x=2).
Regarding claim(s) 14, Peng discloses an apparatus, comprising: an array of light emitting elements (abstract discloses subpixels correspond to an array of pixels), wherein the array of light emitting elements corresponds to an array of pixels arranged in M rows and N columns (¶0051 discloses the plurality of subpixels correspond to an array of pixels arranged in M rows and N columns), and a number of the light emitting elements is k times of a number of the pixels (¶0051 discloses k subpixels may constitute one pixel, and each pixel may consist of k subpixels. k may be any positive integer larger than 1. In some embodiments, k may be 2, 3, or 4), each of M, N, and k is a positive integer (¶0052 discloses M and N are positive integers since the array of pixels are arranged in 2560 rows and 1440 columns; and ¶0051 discloses k is a positive integer);
an array of driving elements configured to drive the array of light emitting elements (¶0049 discloses each OLED subpixel has a respective pixel circuit containing TFTS and configure to drive the corresponding OLED), wherein a number of the driving elements is k times of a number of the pixels (¶0049 and ¶0051 discloses one respective pixel circuit for each OLED subpixel, while the number of sub pixels is x times the number of pixels. Thus, k driving circuits per pixel); and
M gate lines (¶0055 discloses M gate lines for M rows) and ((k/x)*N+1) source lines operatively coupled to the array of driving elements (¶0058-¶0059 discloses kN+1 zigzag source lines. Since kN+1=(k/x)N+1), and setting x=1, Peng discloses the claimed source-line relationship), wherein x is a positive integer (¶0055 discloses M gate lines for M rows; and ¶0059 discloses M gate lines and kN+1 zigzag source lines. Because kN+1=(k/x)N+1), Peng discloses the claimed source-line relationship, with x=1, a positive integer),
Peng doesn’t disclose wherein each source line is operatively coupled to the driving elements configured to drive the light emitting elements that emit lights of a same color.
However, in the same field of endeavor, Choi discloses wherein each source line is operatively coupled to the driving elements configured to drive the light emitting elements that emit lights of a same color (¶0072-¶0073 discloses the column lines are connected to sub pixel circuits driving emissive elements of only one color).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Peng so that during operation of the display, as compared with a conventional configuration in which a column line is connected to subpixels of different color emissive elements, more than one color, thus reducing power losses due to column line parasitic capacitance (¶0073).
Regarding claim(s) 19, Peng discloses the apparatus of claim 14, wherein x=1 (¶0055 discloses M gate lines for M rows, with each row coupled to one gate line. Thus, xM=M, and x=1), and k=3 (¶0051 discloses k may be 2, 3, or 4).
4. Claim(s) 2-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Peng in view of Choi, and in further view of Kim et al. (US 2013/0235020 A1, hereinafter referred as Kim).
Regarding claim(s) 2, Peng as modified doesn’t disclose the apparatus of claim 1, wherein: at least one source line included in the ((k/x)*N+1) source lines is operatively coupled to the driving elements positioned in odd rows in the array of driving elements via a plurality of first output pins, and operatively coupled to the driving elements positioned in even rows in the array of driving elements via a plurality of second output pins; the first output pins extend toward a first direction; and the second output pins extend toward a second, different direction.
However, in the same field of endeavor, Kim discloses wherein: at least one source line included in the ((k/x)*N+1) source lines is operatively coupled to the driving elements positioned in odd rows in the array of driving elements via a plurality of first output pins (Figs. 8-10 and ¶0055-¶0056 disclose a data line connected to TFTS in the first and third rows of one column; the short TFT to data line connection portions correspond to the output pins), and operatively coupled to the driving elements positioned in even rows in the array of driving elements via a plurality of second output pins (Figs. 8-10 and ¶0055-¶0056 disclose a data line connected to TFTS in the second and fourth rows of an adjacent column; the short TFT to data line connection portions correspond to the output pins); the first output pins extend toward a first direction (Fig. 8 and ¶0055 discloses selected TFTs connect to the data line immediately to the left); and the second output pins extend toward a second, different direction (Fig. 8 and ¶0055 discloses intervening row TFTs connect to the data line immediately to the right).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Peng in order to implement the Z inversion with low power and dot inversion like image quality.
Regarding claim(s) 3, Peng as modified doesn’t disclose the apparatus of claim 2, wherein the first output pins and the second output pins are alternatively arranged along a column direction of the array of the driving elements, and are spaced apart by a predetermined distance along the column direction of the array of the driving elements.
However, in the same field of endeavor, Kim discloses wherein the first output pins and the second output pins are alternatively arranged along a column direction of the array of the driving elements (Fig. 8 and ¶0055 discloses TFTs being oppositely coupled to data lines in a line by line manner, where the first and third row TFTs connect on one side, and the second row TFTs couple on the opposite side), and are spaced apart by a predetermined distance along the column direction of the array of the driving elements (Fig. 8 and ¶0055 discloses alternating left and right directed connections at regularly spaced successive pixel/TFT rows, and the separation is the predetermined row pitch of array).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Peng in order to implement the Z inversion with low power and dot inversion like image quality.
Regarding claim(s) 4, Peng as modified doesn’t disclose the apparatus of claim 3, wherein the predetermined distance is one driving element.
However, in the same field of endeavor, Kim discloses wherein the predetermined distance is one driving element (Fig. 8 and ¶0055 discloses alternating left and right directed connections at regularly spaced successive pixel/TFT rows, and the separation is the predetermined row pitch of array).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Peng in order to implement the Z inversion with low power and dot inversion like image quality.
Regarding claim(s) 5, Peng as modified doesn’t disclose the apparatus of claim 2, wherein the at least one source line is operatively coupled to the driving elements positioned in two adjacent columns in the array of driving elements via the first output pins and the second output pins, respectively.
However, in the same field of endeavor, Kim discloses wherein the at least one source line is operatively coupled to the driving elements positioned in two adjacent columns in the array of driving elements via the first output pins and the second output pins, respectively (Fig. 9 and ¶0056 discloses the first data line drives the first and third row TFTs of the first column and second and fourth row TFTs of the adjacent second column).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Peng since it was a known way for a common data line to serve pixel circuits in adjacent columns while retaining the same color column assignment and reduced voltage switching.
5. Claim(s) 6, 8-10, 15, and 17-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Peng in view of Choi, and in further view of Ma et al. (US 2023/0028604 A1, hereinafter referred as “Ma”).
Regarding claim(s) 6, Peng as modified doesn’t disclose the apparatus of claim 1, wherein: at least one source line included in the ((k/x)*N+1) source lines includes a first source line and a second source line arranged adjacent to one another; the first source line is operatively coupled to the driving elements positioned in odd rows in the array of driving elements via a plurality of first output pins; and the second source line is operatively coupled to the driving elements positioned in even rows in the array of driving elements via a plurality of second output pins.
However, in the same field of endeavor, Ma discloses wherein: at least one source line included in the ((k/x)*N+1) source lines includes a first source line and a second source line arranged adjacent to one another (¶0025-¶0026 and ¶0114-¶0117 discloses the data lines may be between adjacent pixel columns or on opposite sides of the same column); the first source line is operatively coupled to the driving elements positioned in odd rows in the array of driving elements via a plurality of first output pins (Fig. 2A-2B, ¶0090-¶0094 and ¶0131 disclose second data line D2 is electrically connected to pixel driving circuits in the odd numbered rows); and the second source line is operatively coupled to the driving elements positioned in even rows in the array of driving elements via a plurality of second output pins (Fig. 2A-2B, ¶0090-¶0094 and ¶0130 disclose first data line D1 is electrically connected the pixel driving circuits of the even numbered rows).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Peng for the purpose of dividing the odd and even rows between two data lines to increase the available data writing and threshold voltage compensation time (¶0004 and ¶0081).
Regarding claim(s) 8, Peng as modified doesn’t disclose the apparatus of claim 6, wherein the first output pins and the second output pins are alternatively arranged along a column direction of the array of the driving elements, and are spaced apart by a predetermined distance along the column direction of the array of the driving elements.
However, in the same field of endeavor, Ma discloses wherein the first output pins and the second output pins are alternatively arranged along a column direction of the array of the driving elements (Fig. 2A and ¶0090-¶0091 disclose since D2 connects excessive odd rows and D1 connects intervening even rows, their connection branches alternate row by row along the column direction), and are spaced apart by a predetermined distance along the column direction of the array of the driving elements (Fig. 2A, and ¶0116-¶0017 discloses alternating connection branches positioned at the regular row pitch of the pixel driving circuit array).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Peng for the purpose of dividing the odd and even rows between two data lines to increase the available data writing and threshold voltage compensation time (¶0004 and ¶0081).
Regarding claim(s) 9, Peng as modified doesn’t disclose the apparatus of claim 8, wherein the predetermined distance is one driving element.
However, in the same field of endeavor, Ma discloses wherein the predetermined distance is one driving element (Fig. 2A and ¶0091 discloses the D2 connection on the odd numbered row and the D1 connection in the immediately succeeding even numbered row are separated by one pixel driving circuit row pitch).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Peng for the purpose of minimizing branch length and maintaining the regular array pitch.
Regarding claim(s) 10, Peng as modified doesn’t disclose the apparatus of claim 6, wherein the first source line and the second source line are operatively coupled to the driving elements positioned at two adjacent columns in the array of driving elements through the first output pins and the second output pins, respectively.
However, in the same field of endeavor, Ma discloses wherein the first source line and the second source line are operatively coupled to the driving elements positioned at two adjacent columns in the array of driving elements (Fig. 2A, ¶0090, and ¶0114-¶0117 discloses adjacent data lines between two adjacent columns are connected to corresponding subpixels in the respective columns, where D2(1) serves as the first column and D(1)2 serves as the second column) through the first output pins and the second output pins (Fig. 2A and ¶0117 discloses respective lateral branch/conductor portions extending from D2(1) and D1(2) to the pixel driving circuits in the respective adjacent columns), respectively.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Peng as an known way to route an adjacent pair of source lines to respective adjacent columns while retaining the alternating odd / even row assignment.
Regarding claim(s) 15, this/these apparatus claim(s) has/have similar limitations as apparatus claim(s) 6, and therefore rejected on similar grounds.
Regarding claim(s) 17, this/these apparatus claim(s) has/have similar limitations as apparatus claim(s) 8 and 9, and therefore rejected on similar grounds.
Regarding claim(s) 18, this/these apparatus claim(s) has/have similar limitations as apparatus claim(s) 10, and therefore rejected on similar grounds.
6. Claim(s) 7 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Peng in view of Choi, in further view of Ma, and still in further view of Kim.
Regarding claim(s) 7, Peng as modified doesn’t disclose the apparatus of claim 6, wherein the first output pins extend toward a first direction; and the second output pins extend toward a second, different direction.
However, in the same field of endeavor, Ma discloses wherein the first output pins extend toward a first direction (Fig. 8 and ¶0055 discloses selected TFTs connect to the data line immediately to the left); and the second output pins extend toward a second, different direction (Fig. 8 and ¶0055 discloses intervening row TFTs connect to the data line immediately to the right).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Peng in order to implement the Z inversion with low power and dot inversion like image quality.
Regarding claim(s) 16, this/these apparatus claim(s) has/have similar limitations as apparatus claim(s) 7, and therefore rejected on similar grounds.
7. Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Peng in view of Choi, in further view of Ma, and still in further view of Cho (US 2011/0157123 A1, hereinafter referred as “Cho”).
Regarding claim(s) 11, Peng as modified doesn’t disclose the apparatus of claim 6, wherein gate driving periods of two adjacent gate lines in the x*M gate lines are configured to be partially overlapped.
However, in the same field of endeavor, Cho discloses wherein gate driving periods of two adjacent gate lines in the x*M gate lines are configured to be partially overlapped (Fig. 2, ¶0009 and ¶0013 discloses Nth gate pulse and succeeding (N+1)th gate pulse that partially overlap preceding and succeeding clocks by a predetermined time).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Peng in order to reduce kickback or feed through effects (¶0007-¶0009).
8. Claim(s) 13 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Peng in view of Choi, and in further view of Matsueda et al. (US 2013/0106891 A1, hereinafter referred as “Matsueda”).
Regarding claim(s) 13, Peng as modified doesn’t disclose the apparatus of claim 1, wherein: the array of light emitting elements includes a plurality of groups of three light emitting elements that emit lights of different colors; the three light emitting elements in each group are arranged in a triangular pattern; and two adjacent groups along a row direction of the array of light emitting elements are arranged in inverted triangular patterns with respect to one another.
However, in the same field of endeavor, Matsueda discloses wherein: the array of light emitting elements includes a plurality of groups of three light emitting elements that emit lights of different colors (Fig. 1 and ¶0041 discloses sub-pixels are arranged as repeating sequences of R-G-B sub-pixels); the three light emitting elements in each group are arranged in a triangular pattern (Fig. 1 and ¶0041 discloses the delta arrangement of sub-pixels shown in FIG. 1 can also be described as an arrangement of groups of three RGB sub-pixels); and two adjacent groups along a row direction of the array of light emitting elements are arranged in inverted triangular patterns with respect to one another (Fig. 1 and ¶0041 discloses any two adjacent groups in the row direction are inverted triangles with respect to each other).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Peng so that natural color mixing and high apparent spatial resolution can be realized (¶0004 and ¶0052).
Regarding claim(s) 20, this/these apparatus claim(s) has/have similar limitations as apparatus claim(s) 13, and therefore rejected on similar grounds.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PRIYANK J SHAH whose telephone number is (571)270-3732. The examiner can normally be reached on 10:00 - 6:00 M-F.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ghebretinsae, Temesghen can be reached on (571) 272-3017. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PRIYANK J SHAH/Primary Examiner, Art Unit 2626
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